Rename the pl310 save/resume functions to have a l2c310 prefix - this
is it's official name. Use a local cached copy of the l2x0_base
virtual address, and also realise that many of the resume function
tails are the same as the enable functions, so make a call to the
enable function instead of duplicating that code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add the save/resume code hooks to the non-OF implementations as well.
There's no reason for the non-OF implementations to be any different
from the OF implementations.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rather than putting quirk handling in __l2c_init(), move it out to a
separate function which individual implementations can specify. This
helps to localise the quirks to those implementations which require
them.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rather than having this hacked into the OF initialiation function, we
can handle this via the enable function instead. While here, clean
up that code and comments a little.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid unnecessary writes to the auxiliary control register if the
register already contains the required value. This allows us to
avoid invoking the platforms secure monitor code unnecessarily.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
We should write the auxillary control register before unlocking: the
write may be necessary to enable non-secure access to the lock
registers.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Providing an enable method gives L2 cache controllers a chance to do
special handling at enable time. This allows us to remove a hack in
l2x0_unlock() for Marvell Aurora L2 caches.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Back in the mists of time, someone decided that it would be a good idea
to group like functions together - so all the save functions in one
place, all the resume functions in another, all the OF parsing functions
some place else.
This makes it difficult to get an overview on what a particular
implementation is doing - grouping an implementations specific functions
together makes more sense, because you can see what it's doing without
the clutter of other implementations.
Organise it according to implementation.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
There's no reason this functionality should be specific to DT, so move
it into the common initialisation function.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Pass the iomem address into this function so we don't have to keep
accessing it from a global.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rather than having a boolean and other tricks to disable some bits of
l2x0_init(), split this function into two parts: a common part shared
between OF and non-OF, and the non-OF part.
The common part can take a block of function pointers, and the cache
ID (to cope with Aurora's DT specified ID.) Eliminate the redundant
setting of l2x0_base in the OF case, moving it to the non-OF init
function.
This allows us to localise the OF-specific initialisation handling
from the non-OF handling.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The revision namespace is specific to the L2 cache part, so don't name
these with generic identifiers, use a part specific identifier.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
cache_wait_way() is actually used to wait for a particular mask to
report clear; it's not really got much to do with cache ways at all.
Indeed, it gets used to wait for the C bit to clear on older caches.
Rename this with a more generic function name which better reflects
its purpose: l2c_wait_mask().
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Provide a generic helper function for way based operations. These are
always background operations, and thus have to be waited for before a
new operation is commenced. This helper extracts that requirement from
several locations in the code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Split the cache unlock code out of l2x0_unlock(). We want to be able
to re-use this functionality later.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Provide a generic function which always calls the set_debug method.
This will be used later in the series as some work-arounds require
that the debug register be written.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rename a few things to help distinguish their function(s):
l2x0_of_data -> l2c_init_data
setup -> of_parse
add of_ prefix to OF specific data
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Remove NULL initialisers, make these all __initconst structures, and
order their members in the same order as the structure declaration.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Update sunxi_defconfig and multi_v7 with all the latest Allwinner
additions.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
v3.16 that's dts fixes for clocks and enabling few features
that were still being discussed earlier:
- A bunch of omap clock related dts fixes queued by Tero Kristo.
- Enable parallel nand on am437x that was not merged earlier as
I requested more information about the muxing for it. And
we need to also enable ecc hardware support for am43xx.
- Enable the modem support for n900 that was dropped earlier
because we had to fix the related hwmod entry first with patch
ARM: OMAP2+: Fix ssi hwmod entry to allow idling.
- And finally, add the omap2 clock dts files. These will allow
us to enable the dt clocks and drop the legacy clocks for omap2
with a follow-up patch once the related clock driver binding
changes are merged.
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Merge tag 'omap-for-v3.16/dt-part3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "omap dt fixes and and clocks for v3.16 merge window" from Tony Lindgren:
Most likely the last pull request from me for omap changes for
v3.16 that's dts fixes for clocks and enabling few features
that were still being discussed earlier:
- A bunch of omap clock related dts fixes queued by Tero Kristo.
- Enable parallel nand on am437x that was not merged earlier as
I requested more information about the muxing for it. And
we need to also enable ecc hardware support for am43xx.
- Enable the modem support for n900 that was dropped earlier
because we had to fix the related hwmod entry first with patch
ARM: OMAP2+: Fix ssi hwmod entry to allow idling.
- And finally, add the omap2 clock dts files. These will allow
us to enable the dt clocks and drop the legacy clocks for omap2
with a follow-up patch once the related clock driver binding
changes are merged.
* tag 'omap-for-v3.16/dt-part3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap2 clock data
ARM: dts: am437x-gp-evm: add support for parallel NAND flash
ARM: OMAP2+: gpmc: enable BCH_HW ecc-scheme for AM43xx platforms
ARM: dts: omap3 a83x: fix duplicate usb pin config
ARM: dts: omap3: set mcbsp2 status
ARM: dts: omap3-n900: Add modem support
ARM: dts: omap3-n900: Add SSI support
ARM: OMAP2+: Fix ssi hwmod entry to allow idling
ARM: dts: AM4372: clk: efuse based crystal frequency detect
ARM: dts: am43xx-clocks.dtsi: add ti, set-rate-parent to display clock path
ARM: dts: omap5-clocks.dtsi: add ti, set-rate-parent to dss_dss_clk
ARM: dts: omap4: add twd clock to DT
ARM: dts: omap54xx-clocks: Correct abe_iclk clock node
ARM: dts: omap54xx-clocks: remove the autoidle properties for clock nodes
ARM: dts: am43x-clock: add tbclk data for ehrpwm
ARM: dts: am33xx-clock: Fix ehrpwm tbclk data
ARM: dts: set 'ti,set-rate-parent' for dpll4_m5 path
ARM: dts: use ti,fixed-factor-clock for dpll4_m5x2_mul_ck
ARM: dts: am43xx-clocks: use ti, fixed-factor-clock for dpll_per_clkdcoldo
Signed-off-by: Olof Johansson <olof@lixom.net>
When targetting ARCH_MULTIPLATFORM, we may include support for SoCs with
PCI-capable devices (e.g. mach-virt with virtio-pci).
This patch allows PCI support to be selected for these SoCs by selecting
CONFIG_MIGHT_HAVE_PCI when CONFIG_ARCH_MULTIPLATFORM=y and removes the
individual selections from multi-platform enabled SoCs.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- From Daniel Lezcano:
This patchset relies on the cpm_pm notifier to initiate the
powerdown sequence operations from pm.c instead cpuidle.c.
Thus the cpuidle driver is no longer dependent from arch
specific code as everything is called from the pm.c file.
Note, this is based on tags/exnos-mcpm and tags/samsung-clk
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Merge tag 'exynos-cpuidle' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers
Merge "Samsung exynos-cpuidle updates for v3.16" from Kukjin Kim:
- From Daniel Lezcano:
This patchset relies on the cpm_pm notifier to initiate the
powerdown sequence operations from pm.c instead cpuidle.c.
Thus the cpuidle driver is no longer dependent from arch
specific code as everything is called from the pm.c file.
* tag 'exynos-cpuidle' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (94 commits)
ARM: EXYNOS: Fix kernel panic when unplugging CPU1 on exynos
ARM: EXYNOS: Move the driver to drivers/cpuidle directory
ARM: EXYNOS: Cleanup all unneeded headers from cpuidle.c
ARM: EXYNOS: Pass the AFTR callback to the platform_data
ARM: EXYNOS: Move S5P_CHECK_SLEEP into pm.c
ARM: EXYNOS: Move the power sequence call in the cpu_pm notifier
ARM: EXYNOS: Move the AFTR state function into pm.c
ARM: EXYNOS: Encapsulate the AFTR code into a function
ARM: EXYNOS: Disable cpuidle for exynos5440
ARM: EXYNOS: Encapsulate boot vector code into a function for cpuidle
ARM: EXYNOS: Pass wakeup mask parameter to function for cpuidle
ARM: EXYNOS: Remove ifdef for scu_enable in pm
ARM: EXYNOS: Move scu_enable in the cpu_pm notifier
ARM: EXYNOS: Use the cpu_pm notifier for pm
ARM: EXYNOS: Fix S5P_WAKEUP_STAT call for cpuidle
ARM: EXYNOS: Move some code inside the idle_finisher for cpuidle
ARM: EXYNOS: Encapsulate register access inside a function for pm
ARM: EXYNOS: Change function name prefix for cpuidle
ARM: EXYNOS: Use cpuidle_register
ARM: EXYNOS: Prevent forward declaration for cpuidle
...
Signed-off-by: Olof Johansson <olof@lixom.net>
In this time, it is having dependency with arch/arm/ for 3.16,
I pulled them into samsung tree from Tomasz under agreement from Mike.
- Pull for_3.16/exynos5260 from Tomasz Figa:
"This pull request contains patches preparing Samsung Common Clock Framework
helpers to support Exynos5260 by adding support for multiple clock providers
and then adding clock driver for Exynos5260."
- Pull for_3.16/clk_fixes_non_critical from Tomasz Figa:
"This pull requests contains a number of non-critical fixes for Samsung clock
framework and drivers, including:
1) a series of fixes for Exynos5420 to correct clock definitions and make the
driver closer to the documentation,
2) several missing clocks and clock IDs added to Exynos4, Exynos5250 and
Exynos5420 drivers,
3) fix for incorrect initialization of clock table with NULL,
4) compiler warning fix."
- Pull for_3.16/clk_cleanup from Tomasz Figa:
"This pull requests contains minor clean-up related to Samsung clock
support, including:
1) move Kconfig entries of Samsung clock drivers to drivers/clk,
2) compile drivers/clk/samsung conditionally when COMMON_CLK_SAMSUNG is
selected,
3) remove obsolete Kconfig lines after moving s3c24xx to CCF."
- Pull for_3.16/exynos3250 from Tomasz Figa:
"This small pull request contains a patch adding clock driver for Exynos3250,
which depends on previous pull requests in this series."
- add dt bindings for exynos3250 clock
- add exynos5800 specific clocks in current exynos5420 clock
Note that this branch is based on s3c24xx ccf branch
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Merge tag 'samsung-clk' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Merge "Samsung clock updates for 3.16" from Kukjin Kim:
In this time, it is having dependency with arch/arm/ for 3.16,
I pulled them into samsung tree from Tomasz under agreement from Mike.
- Pull for_3.16/exynos5260 from Tomasz Figa:
"This pull request contains patches preparing Samsung Common Clock Framework
helpers to support Exynos5260 by adding support for multiple clock providers
and then adding clock driver for Exynos5260."
- Pull for_3.16/clk_fixes_non_critical from Tomasz Figa:
"This pull requests contains a number of non-critical fixes for Samsung clock
framework and drivers, including:
1) a series of fixes for Exynos5420 to correct clock definitions and make the
driver closer to the documentation,
2) several missing clocks and clock IDs added to Exynos4, Exynos5250 and
Exynos5420 drivers,
3) fix for incorrect initialization of clock table with NULL,
4) compiler warning fix."
- Pull for_3.16/clk_cleanup from Tomasz Figa:
"This pull requests contains minor clean-up related to Samsung clock
support, including:
1) move Kconfig entries of Samsung clock drivers to drivers/clk,
2) compile drivers/clk/samsung conditionally when COMMON_CLK_SAMSUNG is
selected,
3) remove obsolete Kconfig lines after moving s3c24xx to CCF."
- Pull for_3.16/exynos3250 from Tomasz Figa:
"This small pull request contains a patch adding clock driver for Exynos3250,
which depends on previous pull requests in this series."
- add dt bindings for exynos3250 clock
- add exynos5800 specific clocks in current exynos5420 clock
Note that this branch is based on s3c24xx ccf branch
* tag 'samsung-clk' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (59 commits)
clk: exynos5420: Add 5800 specific clocks
dt-bindings: add documentation for Exynos3250 clock controller
ARM: S3C24XX: fix merge conflict
clk: samsung: exynos3250: Add clocks using common clock framework
drivers: clk: use COMMON_CLK_SAMSUNG for Samsung clock support
ARM: S3C24XX: move S3C24XX clock Kconfig options to Samsung clock Kconfig file
ARM: select COMMON_CLK_SAMSUNG for ARCH_EXYNOS and ARCH_S3C64XX
clk: samsung: add new Kconfig for Samsung common clock option
ARM: S3C24XX: Remove omitted Kconfig selects and conditionals
clk: samsung: exynos5420: add more registers to restore list
clk: samsung: exynos5420: add misc clocks
clk: samsung: exynos5420: update clocks for MAU Block
clk: samsung: exynos5420: fix register offset for sclk_bpll
clk: samsung: exynos5420: correct sysmmu-mfc parent clocks
clk: samsung: exynos5420: update clocks for FSYS and FSYS2 blocks
clk: samsung: exynos5420: update clocks for WCORE block
clk: samsung: exynos5420: update clocks for PERIS and GEN blocks
clk: samsung: exynos5420: update clocks for PERIC block
clk: samsung: exynos5420: update clocks for DISP1 block
clk: samsung: exynos5420: update clocks for G2D and G3D blocks
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- adding MCPM backend support for SMP secondary boot and core switching
on Samsung's Exynos5420.
Tested on exynos5420-smdk5420 and exynos5420 based chromebook (peach-pit)
using the "/dev/b.L_switcher" user interface. Secondary core boot-up has
also been tested on both the boards.
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Merge tag 'exynos-mcpm' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Merge "Exynos MCPM support for v3.16" from Kukjin Kim:
- adding MCPM backend support for SMP secondary boot and core switching
on Samsung's Exynos5420.
Tested on exynos5420-smdk5420 and exynos5420 based chromebook (peach-pit)
using the "/dev/b.L_switcher" user interface. Secondary core boot-up has
also been tested on both the boards.
* tag 'exynos-mcpm' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Add MCPM call-back functions
ARM: dts: add CCI node for exynos5420
ARM: EXYNOS: Add generic cluster power control functions
ARM: EXYNOS: use generic exynos cpu power control functions
ARM: EXYNOS: Add generic cpu power control functions for exynos SoCs
Signed-off-by: Olof Johansson <olof@lixom.net>
- exynos4
: add hsotg device, exynos_usbphy nodes
: add PMU syscon and audio subsystem nodes
: replace number by macro in clock binding
- exynos4210-universal_c210
: add external sd card node and multimedia nodes
: enable USB functionality
- exynos4412-trats2
: enable usb nodes and usb gagdet functionality
: add cm36651 light/proximity sensor node
: fixed gpio key node
- exynos5250 and exynos5420
: add pmu syscon handle and sysreg system controller nodes
: add support for usb2phy
: replace number by macro in clock binding
: add USB 2.0 support on exynos5420
- exynos5420-peach-pit
: move dp hpd gpio pin to pinctrl_0
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Merge tag 'samsung-dt-2' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
Merge "Samsung 2nd DT updates for v3.16" from Kukjin Kim:
exynos4
- add hsotg device, exynos_usbphy nodes
- add PMU syscon and audio subsystem nodes
- replace number by macro in clock binding
exynos4210-universal_c210
- add external sd card node and multimedia nodes
- enable USB functionality
exynos4412-trats2
- enable usb nodes and usb gagdet functionality
- add cm36651 light/proximity sensor node
- fixed gpio key node
exynos5250 and exynos5420
- add pmu syscon handle and sysreg system controller nodes
- add support for usb2phy
- replace number by macro in clock binding
- add USB 2.0 support on exynos5420
exynos5420-peach-pit
- move dp hpd gpio pin to pinctrl_0
* tag 'samsung-dt-2' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (21 commits)
ARM: dts: enable usb nodes for exynos4412-trats2
ARM: dts: add hsotg device node for exynos4
ARM: dts: add exynos_usbphy node for exynos4
ARM: dts: add PMU syscon node for exynos4
ARM: dts: add pmu syscon handle to exynos5420 hdmi
ARM: dts: add pmu syscon handle to exynos5250 hdmi
ARM: dts: replace number by macro in clock binding for exynos5420
ARM: dts: replace number by macro in clock binding for exynos5250
ARM: dts: replace number by macro in clock binding for exynos4
ARM: dts: add external sd card node for exynos4210-universal_c210
ARM: dts: add multimedia nodes for exynos4210-universal_c210
ARM: dts: enable USB functionality for exynos4210-universal_c210
ARM: dts: Enable USB gadget functionality for exynos4210-trats
ARM: dts: Add audio subsystem nodes to exynos4.dtsi
ARM: dts: fixed gpio key node for exynos4412-trats2
ARM: dts: add cm36651 light/proximity sensor node for exynos4412-trats2
ARM: dts: Add USB 2.0 support on exynos5420
ARM: dts: Add usb2phy support on exynos5420
ARM: dts: Add usb2phy to exynos5250
ARM: dts: Add sysreg sytem controller node to exynos5250 and exynos5420
...
- use a common macro v7_exit_coherency_flush macro instead of local function
- cleanup mach-exynos/Makefile and remove inclusion plat/cpu.h in mach-exynos
- migrate exynos macros from plat-samsung to mach-exynos
- cleanup s3c24xx debug macro/earlyprintk to remove arch dependency
- fixed compilation error for cpufreq due to moving header in this branch
: use of_machine_is_compatible() instead of soc_is_exynos...()
Note that based on tags/samsung-clk and tags/samsung-fixes.
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Merge tag 'samsung-cleanup' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
Merge "Samsung cleanup for v3.16" from Kukjin Kim:
- use a common macro v7_exit_coherency_flush macro instead of local function
- cleanup mach-exynos/Makefile and remove inclusion plat/cpu.h in mach-exynos
- migrate exynos macros from plat-samsung to mach-exynos
- cleanup s3c24xx debug macro/earlyprintk to remove arch dependency
- fixed compilation error for cpufreq due to moving header in this branch
: use of_machine_is_compatible() instead of soc_is_exynos...()
Note that based on tags/samsung-clk and tags/samsung-fixes.
* tag 'samsung-cleanup' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
cpufreq: exynos: Fix the compile error
ARM: S3C24XX: move debug-macro.S into the common space
ARM: S3C24XX: use generic DEBUG_UART_PHY/_VIRT in debug macro
ARM: S3C24XX: trim down debug uart handling
ARM: compressed/head.S: remove s3c24xx special case
ARM: EXYNOS: Remove unnecessary inclusion of cpu.h
ARM: EXYNOS: Migrate Exynos specific macros from plat to mach
ARM: EXYNOS: Remove exynos_subsys registration
ARM: EXYNOS: Remove duplicate lines in Makefile
ARM: EXYNOS: use v7_exit_coherency_flush macro for cache disabling
ARM: dts: Remove g2d_pd node for exynos5420
ARM: dts: Remove mau_pd node for exynos5420
ARM: exynos_defconfig: enable HS-I2C to fix for mmc partition mount
ARM: dts: disable MDMA1 node for exynos5420
ARM: EXYNOS: fix the secondary CPU boot of exynos4212
Signed-off-by: Olof Johansson <olof@lixom.net>
Add device-tree file for APQ8084-MTP board, which belongs
to the Snapdragon 805 family.
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add support for the Qualcomm Snapdragon 805 APQ8084 SoC. It is
used on APQ8084-MTP and other boards.
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add information about the APQ8084 debug UART physical and virtual
addresses in the DEBUG_QCOM_UARTDM Kconfig help section.
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add basic APQ8064 SoC include device tree and support for basic booting on
the IFC6410 board. Also, keep dtb build list and qcom_dt_match in sorted
order.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
* Move SoC peripherals into an SoC container node
* Move serial enabling into board file (qcom-msm8660-surf.dts)
* Cleanup cpu node to match binding spec, enable-method and compatible
should be per cpu, not part of the container
* Add GSBI node and configuration of GSBI controller
Signed-off-by: Kumar Gala <galak@codeaurora.org>
* Move SoC peripherals into an SoC container node
* Move serial enabling into board file (qcom-msm8960-cdp.dts)
* Cleanup cpu node to match binding spec, enable-method and compatible
should be per cpu, not part of the container
* Drop interrupts property from l2-cache node as its not part of the
binding spec
* Add GSBI node and configuration of GSBI controller
Signed-off-by: Kumar Gala <galak@codeaurora.org>
This has been unused since omap4 board files went away.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
This adds support for the tsc2005 touchscreen
to the Nokia N900 DTS file.
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Put architecture-specific assembly code where it belongs,
allowing for support of additional architectures such as arm64 in
the future.
Signed-off-by: Christopher Covington <cov@codeaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
On sam9x5, dedicated CTS (and RTS) pins are unusable together with the
LCDC, the EMAC, or the MMC because they share the same line.
Moreover, the USART controller doesn't handle DTR/DSR/DCD/RI signals,
so we have to control them via GPIO.
This patch permits to use GPIOs to control the CTS/RTS/DTR/DSR/DCD/RI
signals.
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This is needed for gpiod_get_direction().
Otherwise, it returns -EINVAL.
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Move SoC peripherals into an SoC container node
* Move serial enabling into board file (qcom-apq8074-dragonboard.dts)
* Move spi pinctrl into board file
* Cleanup cpu node to match binding spec, enable-method and compatible
should be per cpu, not part of the container
* Drop interrupts property from l2-cache node as its not part of the
binding spec
* Move timer node out of SoC container
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Now that CONFIG_USB_DEBUG is gone, remove it from a number of defconfig
files that were enabling it.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The content of /sys/devices/system/cpu/cpu*/online is still 1 for those
CPUs that the switcher has removed even though the global state in
/sys/devices/system/cpu/online is updated correctly.
It turns out that commit 0902a9044f ("Driver core: Use generic
offline/online for CPU offline/online") has changed the way those files
retrieve their content by relying on on the generic attribute handling
code. The switcher, by calling cpu_down() directly, bypasses this
handling and the attribute value doesn't get updated.
Fix this by calling device_offline()/device_online() instead.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
To allign the name with the other atl clock names:
atlclkin3_ck -> atl_clkin3_ck
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
OMAP2430 I2CHS modules require specific hardware ops to be used, so added
a new compatible string for this.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
OMAP2 has slightly different DPLL compared to later OMAP generations.
This patch adds support for the ti,omap2-dpll-core-clock and also adds
the bindings documentation.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Move the panel/encoder driver compatible-string converter from
arch/arm/mach-omap2/display.c to omapdss driver. That is a more logical
place for it, as it's really an omapdss internal hack.
The code is rewritten to follow the video node graph, starting from
omapdss. This removes the need to have the device compatible-string
database.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
c7a507eea1
(ASoC: fsi: fixup SND_SOC_DAIFMT_CBx_CFx flags)
fixuped FSI driver's behavior
which didn't match to ALSA flags.
But, it didn't care about armadillo800eva HDMI sound flags.
This patch fixed it.
Reported-by: Bui Duc Phuc(Fukuda) <bd-phuc@jinso.co.jp>
Reported-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
pcibios_penalize_isa_irq() is only implemented by x86 now, and legacy ISA
is not used by some architectures. Make pcibios_penalize_isa_irq() a
__weak function to simplify the code. This removes the need for new
platforms to add stub implementations of pcibios_penalize_isa_irq().
[bhelgaas: changelog, comments]
Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Adds pinmux and DT node for Micron (MT29F4G08AB) x8 NAND device present on
am437x-gp-evm board.
(1) As NAND Flash data lines are muxed with eMMC, Thus at a given time either
eMMC or NAND can be enabled. Selection between eMMC and NAND is controlled:
(a) By dynamically driving following GPIO pin from software
SPI2_CS0(GPIO) == 0 NAND is selected (default)
SPI2_CS0(GPIO) == 1 eMMC is selected
(b) By statically using Jumper (J89) on the board
(2) As NAND device connnected to this board has page-size=4K and oob-size=224,
So ROM code expects boot-loaders to be flashed in BCH16 ECC scheme for
NAND boot.
Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fixes: commit 0611c41934
ARM: OMAP2+: gpmc: update gpmc_hwecc_bch_capable() for new platforms and ECC schemes
Though the commit log of above commit mentions AM43xx platforms, but code change
missed AM43xx. This patch adds AM43xx to list of those SoC which have built-in
ELM hardware engine, so that BCH ecc-schemes with hardware error-correction can
be enabled on AM43xx devices.
Reported-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Node usbhshost is supporting pinctrl, so the deprecated
quirk call can be removed.
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes audio support for omap3-lilly-a83x.
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add modem device tree data to Nokia N900's DTS file.
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Tested-By: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add SSI device tree data for OMAP3 and Nokia N900.
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Tested-By: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The current entry prevents system from idling if
the hwmod is defined in the .dts file so let's
change the idlemodes.
Note that we probably don't have SYSC_HAS_EMUFREE
or SYSS_HAS_RESET_STATUS either. If we do, those
can be added later on.
Acked-by: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
TROUT_CPLD_BASE needs the IOMEM() treatment to avoid warnings
from the read/writeb functions.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
A few drivers for Zynq peripherals made it into mainline recently.
Enable them in the defconfig. The following devices are enabled:
- Cadence Macb Ethernet controller
- Cadence I2C controller
- Arasan SDHCI
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
due to enabling
-- CONFIG_REGULATOR
-- CONFIG_REGULATOR_ACT8865
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
[nicolas.ferre@atmel.com: move added entries to proper location within file]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Commit e71246a23a changes psci_init from a
function returning a void to an int, but does not change the non
CONFIG_ARM_PSCI implementation to return a value, which causes a compile
warning. Just return 0.
Cc: Ashwin Chaugule <ashwin.chaugule@linaro.org>
Cc: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Enable reset driver support in order to have opportunity
to reboot SoC by watchdog and by software.
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
[santosh.shilimkar@ti.com: Fixed the subject line]
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
The pll controller register set and device state control registers
include sets of registers with different purposes, so it's logically
to add syscon entry to be able to access them from appropriate places.
So added pll controller and device state control syscon entries.
The keystone driver requires the next additional properties:
"ti,syscon-pll" - phandle/offset pair. The phandle to syscon used to
access pll controller registers and the offset to use
reset control registers.
"ti,syscon-dev" - phandle/offset pair. The phandle to syscon used to
access device state control registers and the offset
in order to use mux block registers for all watchdogs.
"ti,wdt-list" - option to declare what watchdogs are used to reboot
the SoC, so set "0" WDT as default.
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
By reading the touchscreen configuration from the settings that the
maXTouch chip is actually using, we can remove some platform data.
The matrix size is not used for anything, and results in some rather
confusing code to re-read it because it may change when configuration
is downloaded, so don't print it out.
Signed-off-by: Nick Dyer <nick.dyer@itdev.co.uk>
Acked-by: Benson Leung <bleung@chromium.org>
Acked-by: Yufeng Shen <miletus@chromium.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
1. move dma channel descriptions to generic dma properity;
2. add resets properity for some nodes;
3. add missed pinctrl groups.
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Merge tag 'sirf-dts-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux into next/dt
Merge "ARM: sirf: dts update for 3.16" from Barry Son:
some minor cleanup and add some missed nodes:
1. move dma channel descriptions to generic dma properity
2. add resets properity for some nodes;
3. add missed pinctrl groups.
* tag 'sirf-dts-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux:
ARM: dts: sirf: add resets for dspif, gps and dsp nodes
ARM: dts: atlas6: add cortex-a9-pmu compatible PMU node
ARM: dts: sirf: move to use generic dma dt-binding for spi
ARM: dts: sirf: add pin group for USP0 with only RX or TX frame sync for atlas6
Signed-off-by: Olof Johansson <olof@lixom.net>
information available within the IP instead
of reading it from platform data or DT. Some
other useful clean-ups are included too.
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Merge tag 'davinci-for-v3.16/edma' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/drivers
Merge "DaVinci EDMA clean-up for v3.16" from Sekhar Nori:
This series makes edma use configuration information available within
the IP instead of reading it from platform data or DT. Some other useful
clean-ups are included too.
* tag 'davinci-for-v3.16/edma' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: (34 commits)
ARM: edma: Remove redundant/unused parameters from edma_soc_info
ARM: davinci: Remove redundant/unused parameters for edma
ARM: dts: am4372: Remove obsolete properties from edma node
ARM: dts: am33xx: Remove obsolete properties from edma node
dt/bindings: ti,edma: Remove redundant properties from documentation
ARM: edma: Get IP configuration from HW (number of channels, tc, etc)
ARM: edma: Save number of regions from pdata to struct edma
ARM: edma: Remove num_cc member from struct edma
ARM: edma: Remove queue_tc_mapping data from edma_soc_info
ARM: davinci: Remove eDMA3 queue_tc_mapping data from edma_soc_info
ARM: edma: Do not change TC -> Queue mapping, leave it to default.
ARM: edma: Take the number of tc from edma_soc_info (pdata)
ARM: edma: No need to clean the pdata in edma_of_parse_dt()
ARM: edma: Clean up and simplify the code around irq request
dmaengine: edma: update DMA memcpy to use new param element
dmaengine: edma: Document variables used for residue accounting
dmaengine: edma: Provide granular accounting
dmaengine: edma: Make reading the position of active channels work
dmaengine: edma: Store transfer data in edma_desc and edma_pset
dmaengine: edma: Create private pset struct
...
Signed-off-by: Olof Johansson <olof@lixom.net>
make it work. The patch has been tagged for stable.
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Merge tag 'davinci-fixes-for-v3.15-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/drivers
The patch fixes EDMA crossbar mapping to actually
make it work. The patch has been tagged for stable.
* tag 'davinci-fixes-for-v3.15-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: common: edma: Fix xbar mapping
- Add support for BIG Endian
- Add SOC_BUS support
- Sort Kconfig options
- Fix early console
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Merge tag 'zynq-cleanup-for-3.16' of git://git.xilinx.com/linux-xlnx into next/soc
Merge "Xilinx Zynq changes for v3.16" from Michal Simek:
arm: Xilinx Zynq cleanup patches for v3.16
- Add support for BIG Endian
- Add SOC_BUS support
- Sort Kconfig options
- Fix early console
* tag 'zynq-cleanup-for-3.16' of git://git.xilinx.com/linux-xlnx:
ARM: zynq: Enable big-endian
ARM: zynq: Fix uart0 early console virtual address
clocksource: cadence_ttc: Use readl/writel_relaxed instead of __raw
ARM: zynq: Sort Kconfig options
ARM: zynq: Add support for SOC_BUS
Signed-off-by: Olof Johansson <olof@lixom.net>
from code.
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Merge tag 'davinci-for-v3.16/board' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/boards
Merge "DaVinci board changes for v3.16" from Sekhar Nori:
This patch clean-up an unused #define from code.
* tag 'davinci-for-v3.16/board' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: remove checks for CONFIG_USB_MUSB_PERIPHERAL
Signed-off-by: Olof Johansson <olof@lixom.net>
for a BG2Q SoC provided by Alexandre Belloni and Antoine Tenart. Also,
we gained support for DW gpio and a pinctrl driver.
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Merge tag 'berlin-soc-3.16' of https://github.com/shesselba/linux-berlin into next/soc
Merge "ARM: berlin: SoC changes for v3.16" from Sebastian Hesselbart:
Despite relatively young Berlin SoC support, we already have support
for a BG2Q SoC provided by Alexandre Belloni and Antoine Tenart. Also,
we gained support for DW gpio and a pinctrl driver.
* tag 'berlin-soc-3.16' of https://github.com/shesselba/linux-berlin:
ARM: berlin: add the pinctrl dependency for the Marvell Berlin SoCs
ARM: berlin: add the LIBGPIO as a dependency for the BG2Q
ARM: berlin: add MACH_BERLIN_BG2Q symbol
ARM: berlin: add Marvell Armada 1500 pro to Marvell doc
Signed-off-by: Olof Johansson <olof@lixom.net>
BG2Q joins Berlin SoC family with corresponding development board, DW
gpio nodes for all SoCs. Most notably, we have settled clock bindings
to allow us to continue on drivers requiring clocks and pinctrl bindings.
Last but not least, BG2Q gained SDHCI support and is able to properly
boot into userspace.
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Merge tag 'berlin-dt-3.16' of https://github.com/shesselba/linux-berlin into next/dt
Merge "ARM: berlin: DT changes for v3.16" from Sebastian Hesselbart:
Quite a lot changes but it looks like DT approach is really paying off.
BG2Q joins Berlin SoC family with corresponding development board, DW
gpio nodes for all SoCs. Most notably, we have settled clock bindings
to allow us to continue on drivers requiring clocks and pinctrl bindings.
Last but not least, BG2Q gained SDHCI support and is able to properly
boot into userspace.
* tag 'berlin-dt-3.16' of https://github.com/shesselba/linux-berlin:
ARM: dts: berlin: enable SD card reader and eMMC for the BG2Q DMP
ARM: dts: berlin: add the SDHCI nodes for the BG2Q
ARM: dts: berlin: add the pinctrl node and muxing setup for uarts
dt-binding: ARM: add pinctrl binding docs for Marvell Berlin2 SoCs
ARM: dts: berlin: convert BG2Q to DT clock nodes
ARM: dts: berlin: convert BG2 to DT clock nodes
ARM: dts: berlin: convert BG2CD to DT clock nodes
clk: berlin: add binding include for Berlin SoC clock ids
dt-binding: ARM: add clock binding docs for Marvell Berlin2 SoCs
ARM: dts: berlin: add the BG2CD GPIO nodes
ARM: dts: berlin: add the BG2 GPIO nodes
ARM: dts: berlin: add the BG2Q GPIO nodes
ARM: dts: berlin: add scu and chipctrl device nodes for BG2/BG2Q
ARM: dts: berlin: add the Marvell BG2-Q DMP device tree
ARM: dts: berlin: add the Marvell Armada 1500 pro
Signed-off-by: Olof Johansson <olof@lixom.net>
conversion to device tree. This series sets up the PMIC signaling
in a way where we can test for PM regressions easily by
looking at state of the the sys_clkreq and sys_off_mode pins.
Note that this series alone does not make omap3 PM to cut
off core voltage during off-idle, changes to twl4030-power.c
configurations are still needed. Those will be posted
separately.
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Merge tag 'omap-for-v3.16/pm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Merge "ARM: omap pm changes for v3.16 merge window, resend" from Tony Lindgren:
PM related fixes for omap3 that were discovered during omap3
conversion to device tree. This series sets up the PMIC signaling
in a way where we can test for PM regressions easily by
looking at state of the the sys_clkreq and sys_off_mode pins.
Note that this series alone does not make omap3 PM to cut
off core voltage during off-idle, changes to twl4030-power.c
configurations are still needed. Those will be posted
separately.
* tag 'omap-for-v3.16/pm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Enable CPUidle in omap2plus_defconfig
ARM: dts: Enable N900 keyboard sleep leds by default
ARM: OMAP2+: Fix voltage scaling init for device tree
ARM: dts: Configure omap3 twl4030 I2C4 pins by default
ARM: OMAP3: Fix voltage control for deeper idle states
ARM: OMAP3: Disable broken omap3_set_off_timings function
ARM: OMAP3: Fix idle mode signaling for sys_clkreq and sys_off_mode
ARM: dts: Fix omap serial wake-up when booted with device tree
mfd: twl-core: Fix idle mode signaling for omaps when booted with device tree
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge tag 'omap-for-v3.16/fixes-not-urgent-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical
Merge "ARM: omap non urgent fixes for v3.16 merge window, resend" from Tony
Lindgren:
Non urgent omap fixes for v3.16 merge window.
* tag 'omap-for-v3.16/fixes-not-urgent-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am43xx: fix starting offset of NAND.filesystem MTD partition
ARM: dts: am335x-boneblack: remove use of ti,vcc-aux-disable-is-sleep
ARM: OMAP2+: free use_gptimer_clksrc variable after boot
ARM: OMAP5: Redo THUMB mode switch on secondary CPU
ARM: dts: AM4372: add l3-noc information
ARM: dts: DRA7: Use dra7-l3-noc instead of omap4-l3-noc
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge tag 'omap-for-v3.16/dt-part2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "ARM: omap dt changes for v3.16 merge window, part 2" From Tony Lindgren:
Device tree related changes for omaps.
* tag 'omap-for-v3.16/dt-part2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (49 commits)
ARM: dts: Enable mcpdm and mcbsp1 on DuoVero
ARM: dts: Convert DuoVero Parlor to use IOPAD macro
ARM: dts: am43xx: fix starting offset of NAND.filesystem MTD partition
ARM: dts: dra7: add support for parallel NAND flash
ARM: dts: am437x-gp-evm: Add ethernet support for GP EVM
ARM: dts: am4372: Add cpsw phy sel dt node
ARM: OMAP2+: Use pdata quirks for wl12xx on VAR-STK/DVK-OM44
ARM: dts: Add VAR-SOM-OM44 WLAN nodes
ARM: dts: Add support for OMAP4 VAR-DVK-OM44
ARM: dts: Add support for OMAP4 Variscite OM44 family
ARM: dts: Change IOPAD macro's for OMAP4/5
ARM: dts: AM33XX: fix ethernet and mdio default state
ARM: dts: am4372: Add hdq device tree data
ARM: omap2+: skip device build from platform code for dt
dts: dra7-evm: add USB support
ARM: dts: dra7: Add USB related nodes
ARM: dts: dra7-clock: Add "l3init_960m_gfclk" clock gate
ARM: dts: omap4+: Add clocks to USB2 PHY node
ARM: dts: dra7: add OCP2SCP3 and SATA nodes
ARM: dts: omap5: add sata node
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Merging in a local copy from the next/soc branch to avoid some annoying
context conflicts in the dts Makefile.
* mvebu/soc-orion5x: (29 commits)
ARM: orion: remove no longer needed gpio DT code
ARM: orion: remove no longer needed DT IRQ code
ARM: orion5x: convert Maxtor Shared Storage II to the Device Tree
ARM: orion5x: convert d2net to Device Tree
ARM: orion5x: convert RD-88F5182 to Device Tree
ARM: orion5x: remove unneeded code for edmini_v2
ARM: orion5x: keep TODO list in edmini_v2 DT
ARM: orion5x: use DT to describe NOR on edmini_v2
ARM: orion5x: use DT to describe EHCI on edmini_v2
ARM: orion5x: use DT to describe I2C devices on edmini_v2
ARM: orion5x: convert edmini_v2 to DT pinctrl
ARM: orion5x: add standard pinctrl configs for sata0 and sata1
ARM: orion5x: add Device Bus description at SoC level
ARM: orion5x: update I2C description at SoC level
ARM: orion5x: enable pinctrl driver at SoC level
ARM: orion5x: switch to DT interrupts and timer
ARM: orion: switch to a per-platform handle_irq() function
ARM: orion5x: convert to use 'clocks' property for UART controllers
ARM: orion5x: switch to use the clock driver for DT platforms
ARM: orion5x: add interrupt for Ethernet in Device Tree
...
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Merge tag 'omap-for-v3.16/board-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/boards
Merge "ARM: omap board changes for v3.16 merge window" from Tony Lindgren:
Board related changes for omaps.
* tag 'omap-for-v3.16/board-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP: replace checks for CONFIG_USB_GADGET_OMAP
ARM: OMAP: AM3517EVM: remove check for CONFIG_PANEL_SHARP_LQ043T1DG01
ARM: OMAP: SX1: remove check for CONFIG_SX1_OLD_FLASH
ARM: OMAP: remove some dead code
ARM: OMAP: omap3stalker: remove two Kconfig macros
ARM: OMAP2+: Add support for RNG on DT booted N900
Signed-off-by: Olof Johansson <olof@lixom.net>
big endian changes because of the merge conflicts for read
and write operations. Via Paul Walmsley <paul@pwsan.com>:
Some OMAP PRCM cleanup patches. These help prepare to convert the PRCM
code into drivers.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/prcm-cleanup-v3.16/20140515213244/
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Merge tag 'omap-for-v3.16/prcm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
Merge "ARM: omap prcm changes for v3.16 merge window" from Tony Lindgren:
PRCM changes for omaps. I ended up merging these with the
big endian changes because of the merge conflicts for read
and write operations. Via Paul Walmsley <paul@pwsan.com>:
Some OMAP PRCM cleanup patches. These help prepare to convert the PRCM
code into drivers.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/prcm-cleanup-v3.16/20140515213244/
* tag 'omap-for-v3.16/prcm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP4: PRCM: remove references to cm-regbits-44xx.h from PRCM core files
ARM: OMAP3/4: PRM: add support of late_init call to prm_ll_ops
ARM: OMAP3/OMAP4: PRM: add prm_features flags and add IO wakeup under it
ARM: OMAP3/4: PRM: provide io chain reconfig function through irq setup
ARM: OMAP2+: PRM: remove unnecessary cpu_is_XXX calls from prm_init / exit
ARM: OMAP2+: PRCM: cleanup some header includes
ARM: OMAP4: CM: use cm_base* in register address calculations
ARM: OMAP2/3: CM: remove some external dependencies
ARM: OMAP2+: prcm: add omap_test_timeout to prcm-common.h
ARM: OMAP3: CM: remove a few OMAP34XX_CM_REGADDR defines
ARM: OMAP: debug-leds: raw read and write endian fix
ARM: OMAP: counter-32k: raw read and write endian fix
ARM: OMAP: dmtimer: raw read and write endian fix
ARM: OMAP2+: raw read and write endian fix
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge tag 'omap-for-v3.16/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "ARM: omap soc changes for v3.16 merge window" from Tony Lindgren:
SoC related changes for omaps.
* tag 'omap-for-v3.16/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: DRA752: add detection of SoC information
ARM: OMAP2+: Remove suspend_set_ops from common pm late init
ARM: OMAP2+: hwmod: OMAP5 DSS hwmod data
ARM: omap4: hwmod_data: Clean up audio related structures (remove/merge them)
Signed-off-by: Olof Johansson <olof@lixom.net>
The sunxi reset controller code is only used with sun6i (a31).
After the platform has been split up into per-soc options, it's
now possible to build it without the reset controller code, so
the base platform init must not call into the reset driver
if that is turned off at compile time.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The versatile express changes for 3.16 introduced a number of
build regressions for randconfig kernels by not tracking dependencies
between the components right.
This patch tries to rectify that:
* the mach-vexpress code cannot link without the syscfg driver,
which in turn needs MFD_VEXPRESS_SYSREG
* various drivers call devm_regmap_init_vexpress_config(), which
has to be exported so it can be used by loadable modules
* the configuration bus uses OF DT helper functions that are not
available to platforms disable CONFIG_OF
* The sysreg driver exports GPIOs through gpiolib, which can
be disabled on some platforms.
* The clocksource code cannot be built on platforms that don't
use modern timekeeping but rely on gettimeoffset.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
With the newly introduced CPU_METHOD_OF_DECLARE is not necessary anymore
to reference the relevant smp_ops in the board file, but instead it can
simply be set by the enable-method property of the cpu nodes.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
patch 37ebbcff78 ("arm: iop13xx: Use sparse irqs for MSI") moved
iop13xx over to sparse IRQ support, but this broke the build for the
msi.c file, which now has to include mach/irqs.h itself.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/12285212.fBJyVfk69p@wuerfel
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
The Cortex-A17 PMU is identical to that of the A12, so wire up a new
compatible string to the existing event structures.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
On CPUs with virtualization extensions the kernel installs HYP mode
configuration on both primary and secondary cpus upon cold boot.
On platforms where CPUs are shutdown in idle paths (ie CPU core gating),
when a CPU resumes from low-power states it currently does not execute
code that reinstalls the HYP configuration, which means that the kernel
cannot run eg KVM properly on such machines.
This patch, mirroring cold-boot behaviour, executes position independent
code that reinstalls HYP configuration and drops to SVC mode safely on
warmboot, so that deep idle states can be enabled in kernel running as
hosts on platforms with power management HW.
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Dave Martin <dave.martin@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
After instruction write into xol area, on ARM V7
architecture code need to flush dcache and icache to sync
them up for given set of addresses. Having just
'flush_dcache_page(page)' call is not enough - it is
possible to have stale instruction sitting in icache
for given xol area slot address.
Introduce arch_uprobe_ixol_copy weak function
that by default calls uprobes copy_to_page function and
than flush_dcache_page function and on ARM define new one
that handles xol slot copy in ARM specific way
flush_uprobe_xol_access function shares/reuses implementation
with/of flush_ptrace_access function and takes care of writing
instruction to user land address space on given variety of
different cache types on ARM CPUs. Because
flush_uprobe_xol_access does not have vma around
flush_ptrace_access was split into two parts. First that
retrieves set of condition from vma and common that receives
those conditions as flags.
Note ARM cache flush function need kernel address
through which instruction write happened, so instead
of using uprobes copy_to_page function changed
code to explicitly map page and do memcpy.
Note arch_uprobe_copy_ixol function, in similar way as
copy_to_user_page function, has preempt_disable/preempt_enable.
Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Acked-by: Oleg Nesterov <oleg@redhat.com>
Reviewed-by: David A. Long <dave.long@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The name "power_down_finish" seems to be causing some confusion,
because it suggests that this function is responsible for taking
some action to cause the specified CPU to complete its power down.
This patch renames the affected functions to "wait_for_powerdown"
and similar, since this function's intended purpose is just to wait
for the hardware to finish a powerdown initiated by a previous
cpu_power_down.
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
dsb st can be used to ensure completion of pending cache maintenance
operations, so use it for the v7 cache maintenance operations.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Cortex-A17 has identical initialisation requirements to Cortex-A12, so
hook it up in proc-v7.S in the same way.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
With large kernel builds such as allyesconfig exceeding maximum relative
branch offsets, the init section will be too far away to branch to
directly. This causes veneers to be added by the linker, but veneers
don't work before the MMU is enabled. Fix this by moving __fixup_smp to
the .head.text section as it is not very big.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
According to the ARM ARM, the behaviour is UNPREDICTABLE if the PC read
from the exception return stack is not half word aligned. See the
pseudo code for ExceptionReturn() and PopStack().
The signal handler's address has the bit 0 set, and setup_return()
directly writes this to regs->ARM_pc. Current hardware happens to
discard this bit, but QEMU's emulation doesn't and this makes processes
crash. Mask out bit 0 before the exception return in order to get
predictable behaviour.
Fixes: 19c4d593f0 ("ARM: ARMv7-M: Add support for exception handling")
Cc: stable@kernel.org
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The arm EABI states that unwind opcode 10100nnn means pop register r4-4[4+nnn],aditionally there is a similar unwind opcode: 10101nnn which means the same thing plus popping r14. Those two cases are handled by the unwind_exec_pop_r4_to_rN function which checks whether the 4th bit is set and does r14 popping.
However, up until now it has been checking whether the 8th bit was set (mask & 0x80) instead of the 4th (mask & 0x8), a simple to make typo but this meant that we were always popping r14 even if we had the former opcode.
This patch changes the mask so that the 2 unwind opcodes are being handled correctly.
Signed-off-by: Nikolay Borisov <Nikolay.Borisov@arm.com>
Reviewed-by: Anurag Aggarwal <anurag19aggarwal@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
According to arm procedure call standart r2 register is call-cloberred.
So after the result of x expression was put into r2 any following
function call in p may overwrite r2. To fix this, the result of p
expression must be saved to the temporary variable before the
assigment x expression to __r2.
Signed-off-by: Andrey Ryabinin <a.ryabinin@samsung.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
__v7m_setup_stack currently sits in the .proc.info.init section, and
thus creates a bogus proc info entry (which by the way matches any
unknown CPU IDs, due to the entry's mask being 0). Move it out of
there.
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Rabin Vincent <rabin@rab.in>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
A look at the code reveals use of S5P_VA_SYSRAM macro, in case of certain SoC
revisions, which is not valid any longer, after SYSRAM started to be mapped
dynamically. The new dynamic mapping is stored in sysram_base_addr variable,
which is declared static in platsmp.c
This fix makes sysram_base_addr non-static, declared it in common.h and used
in pm.c instead of S5P_VA_SYSRAM.
Suggested-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
No more dependency on the arch code. The platform_data field is used to set the
PM callback as the other cpuidle drivers.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This macro is only used there.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The code to initiate and exit the powerdown sequence is the same in
pm.c and cpuidle.c.
Let's split the common part in the pm.c and reuse it from the cpu_pm notifier.
That is one more step forward to make the cpuidle driver arch indenpendant.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
In order to remove depedency on pm code, let's move the 'exynos_enter_aftr'
function into the pm.c file as well as the other helper functions.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Let's encapsulate the AFTR state specific call into a single function.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
There is no point to register the cpuidle driver for the 5440 as it has only
one WFI state which is the default idle function when the cpuidle driver is
disabled.
By disabling cpuidle we prevent to enter to the governor computation for
nothing, thus saving a lot of processing time.
The only drawback is the statistic via sysfs on this state which is lost but
it is meaningless and it could be retrieved from the ftrace easily.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Pass the wakeup mask to 'exynos_set_wakeupmask' as this function could
be used for different idle states with different mask.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The scu_enable function is already a noop in the scu's header file is
CONFIG_SMP=n, so no need to use these macros in the code.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
We make the cpuidle code less arch dependent.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Use the cpu_pm_enter/exit notifier to group some pm code inside the
pm file.
The save and restore code is duplicated across pm.c and cpuidle.c. By
using the cpu_pm notifier, we can factor out the routine.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This function should be called only when the powerdown sequence fails.
Even if the current code does not hurt, by moving this line, we have
the same code than the one in pm.c.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Move the code around to differentiate different section of code and
prepare it to be factored out in the next patches.
The call order changed but hat doesn't have a side effect because
they are independent. The important call is cpu_do_idle() which must
be done the last.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
That makes the code cleaner and encapsulted. The function will be
reused in the next patch.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The driver was initially written for exynos4 but the driver is used
also for exynos5.
Change the function prefix name exynos4 -> exynos
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Use the cpuidle generic function 'cpuidle_register'. That saves us
from some extra lines of code and unneeded variables.
A side effect of this change is a bug fix where before the cpuidle
driver was registered for each_online_cpu and now it is for
each_possible_cpu.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Move the structure below the 'exynos4_enter_lowpower' function so no
more need of forward declaration.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Now with common clock support added for exynos5250 it is necessary to
move this code to exynos5250 common clock driver as clock registers
should be handled there. This change is tested in exynos5250 based
arndale platform.
Cc: Abhilash Kesavan <a.kesavan@samsung.com>
Cc: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsugn.com>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
[t.figa: Rebased onto current kernel sources.]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Move debug-macro.S from mach/include to include/debug where
all other common debug macros are.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This removes the need for mach/-headers in the debug macro.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Using the lowlevel debug uart is a corner case - even more so in a
multiplatform environment. So it seems reasonable to simply let the
developer set the appropriate uart type for the debugged SoC.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
addruart from the generic debug macro is doing exactly the same using
the common lowlevel uart definition, so there is no cause for this
special casing for s3c24xx.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Exynos specific macros and declarations have been moved to
mach-exynos. Inclusion of plat/cpu.h is no more necessary.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Move Exynos specific macros to mach-exynos from plat-samsung to avoid
unnecessary dependency on plat based header files.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
'exynos_subsys' has no users. Remove this code.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Group all files compiled under common config option together.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
A common macro v7_exit_coherency_flush available which does the below
tasks in the seqeunce.
-clearing C bit
-clearing L1 cache
-exit SMP
-instruction and data synchronization
So removing the local functions which does the same thing and use the
macro instead.
Signed-off-by: Leela Krishna Amudala <leela.krishna@linaro.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
[cw00.choi@samsung.com: tested on exynos3250 based board]
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Conflicts:
drivers/net/bonding/bond_alb.c
drivers/net/ethernet/altera/altera_msgdma.c
drivers/net/ethernet/altera/altera_sgdma.c
net/ipv6/xfrm6_output.c
Several cases of overlapping changes.
The xfrm6_output.c has a bug fix which overlaps the renaming
of skb->local_df to skb->ignore_df.
In the Altera TSE driver cases, the register access cleanups
in net-next overlapped with bug fixes done in net.
Similarly a bug fix to send ALB packets in the bonding driver using
the right source address overlaps with cleanups in net-next.
Signed-off-by: David S. Miller <davem@davemloft.net>
* only show ARCH_BCM in multi v6/v7 configs
* enable ARM erratum 775420
* bcm_defconfig updates for pwm
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Merge tag 'for-3.16/bcm-soc' of git://github.com/broadcom/mach-bcm into next/soc
Merge "mach-bcm 3.16 soc updates" From Matt Porter:
* only show ARCH_BCM in multi v6/v7 configs
* enable ARM erratum 775420
* bcm_defconfig updates for pwm
* tag 'for-3.16/bcm-soc' of git://github.com/broadcom/mach-bcm:
ARM: bcm_defconfig: Enable PWM and Backlight
ARM: mach-bcm: add ARM_ERRATA_775420
ARM: bcm: Restrict ARCH_BCM selection to ARCH_MULTI_V6_V7
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Clean up bcm281xx/21664 SMC code
* Clean up bcm281xx/21664 L2C code
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Merge tag 'for-3.16/bcm-cleanup' of git://github.com/broadcom/mach-bcm into next/cleanup
* Clean up mach-bcm config and build targets
* Clean up bcm281xx/21664 SMC code
* Clean up bcm281xx/21664 L2C code
* tag 'for-3.16/bcm-cleanup' of git://github.com/broadcom/mach-bcm:
ARM: bcm: rename "kona.h" and "kona.c"
ARM: bcm: rewrite commentary for bcm_kona_do_smc()
ARM: bcm: use inline assembly for "smc" request
ARM: bcm: tidy up a few includes
ARM: bcm: config option for l2 cache support
ARM: bcm: don't special-case CPU 0 in bcm_kona_smc()
ARM: bcm: have bcm_kona_smc() return request result
ARM: bcm: clean up SMC code
ARM: bcm: err, don't BUG() on SMC init failures
ARM: bcm: use memory accessors for ioremapped area
ARM: bcm: clean up config and build targets
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Conflicts:
arch/arm/mach-bcm/Kconfig
Toradex Colibri Evaluation Board uses the DS1307 RTC and the
MCP251x CAN controller. The NVIDIA Tegra 3 based Colibri T30
module can be used on this carrier board, hence enable those
drivers in tegra_defonfig and multi_v7_defconfig.
Furthermore the NVIDIA Tegra 3 based Apalis T30 module too
contains two MCP251x CAN controller.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Marvell Armada 38x platform has a SDHCI interface managed by the
sdhci-pxav3 MMC host driver. It therefore makes sense to enable this
driver in multi_v7_defconfig, which supports the Armada 38x platform.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled
for the xHCI USB hosts, so this commit enables the corresponding
Kconfig option in multi_v7_defconfig.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: arm@kernel.org
Cc: Kevin Hilman <khilman@linaro.org>
Cc: Olof Johansson <olof@lixom.net>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Add a new qcom_defconfig for mach-qcom
* Update msm_defconfig for handling building the old mach-msm
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Merge tag 'qcom-defconfig-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/defconfig
Merge "Qualcomm ARM Based defconfig Updates for v3.16" from Kumar Gala:
* Add a new qcom_defconfig for mach-qcom
* Update msm_defconfig for handling building the old mach-msm
* tag 'qcom-defconfig-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
ARM: config: Update msm_defconfig
ARM: config: Add qcom_defconfig
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add the A31 reset driver to the sunxi-related defconfigs
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Merge tag 'sunxi-defconfig-for-3.16-2' of https://github.com/mripard/linux into next/defconfig
Merge "Allwinner defconfig changes, take 2" from Maxime Ripard:
Add the A31 reset driver to the sunxi-related defconfigs
* tag 'sunxi-defconfig-for-3.16-2' of https://github.com/mripard/linux:
ARM: multi_v7: Add Allwinner reset drivers to multi_v7_defconfig
ARM: sunxi: Add A31 reset driver to sunxi_defconfig
ARM: sunxi: drop CONFIG_COMMON_CLK_DEBUG
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- mvebu
- enable MSI and XHCI in mvebu_v7_defconfig
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Merge tag 'mvebu-defconfig-3.16-2' of git://git.infradead.org/linux-mvebu into next/defconfig
Merge "mvebu defconfig changes for v3.16 (incremental #2)" from Jason Cooper:
- mvebu
- enable MSI and XHCI in mvebu_v7_defconfig
* tag 'mvebu-defconfig-3.16-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: enable MSI support in mvebu_v7_defconfig
ARM: configs: enable XHCI mvebu support in mvebu_v7_defconfig
ARM: multi_v5_defconfig: Enable sound modules needed for t5325
ARM: mvebu_v5_defconfig: Enable sound modules needed for t5325
ARM: mvebu: defconfig: add MTD_SPI_NOR (new dependency for M25P80)
ARM: configs: add ahci_mvebu to mvebu_v7_defconfig
ARM: configs: add CONFIG_MMC_SDHCI_PXAV3 to the mvebu_v7_defconfig
ARM: mvebu: enable fhandle in the defconfigs
ARM: mvebu: Enable nfsroot in the defconfig
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge "mvebu DT changes for v3.16 (incremental #2)" from Jason Cooper:
- kirkwood
- add OpenRD boards
- make keymile boards bootable with latest kernels
- mvebu
- add ehci/xhci to Armada 375/38x boards
* tag 'mvebu-dt-3.16-2' of git://git.infradead.org/linux-mvebu:
ARM: dts: kirkwood: add kirkwood-km_fixedeth DTS file
ARM: dts: kirkwood: add kirkwood-km_common DTSI files
ARM: dts: kirkwood: resynch 98dx4122 dtsi
ARM: mvebu: add Device Tree description for the EHCI controllers on Armada 375
ARM: mvebu: add Device Tree description of the xHCI controller on Armada 375
ARM: mvebu: add Device Tree description of the EHCI controller on Armada 38x
ARM: mvebu: add Device Tree description of xHCI controllers on Armada 38x
ARM: Kirkwood: DT versions of OpenRD boards
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
S5PV210 is going to get DT support, so we can remove the camera
bits from the only board using camera on S5PV210. This allows to
clean the exynos4-is driver by dropping code for non-dt platforms.
This patch can be dropped if a patch removing the whole board
file is applied first.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Merge "Allwinner DT changes for 3.16, take 2" from Maxime Ripard:
- Introduction of a new board, the i12-tvbox
- Enable the MMC and USB controllers on the Colombus
- Add the enable-method to the A31 cpus
- a few fixes
* tag 'sunxi-dt-for-3.16-2' of https://github.com/mripard/linux:
ARM: dts: sun7i: Add new i12-tvbox board
ARM: dts: sun7i: cubietruck: set mmc3 bus-width property
ARM: sun6i: Add MMC0 controller to the Colombus board
ARM: sun6i: Fix OHCI2 node name
ARM: sun6i: Enable USB Host support on the Colombus board
ARM: sunxi: Add fixed 3V regulator
ARM: sun6i: Define the A31 CPUs enable-method
ARM: sunxi: dt: build DTs according to new MACH_SUNxI Kconfig symbols
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Conflicts:
arch/arm/boot/dts/Makefile
Merge "mach-bcm dt updates for 3.16" from Matt Porter:
* Add PWM support to bcm281xx and bcm28155 ap board
* Add gpldo and vbus regulators to bcm590xx
* tag 'for-3.16/bcm-dt' of git://github.com/broadcom/mach-bcm:
ARM: dts: bcm590xx: add support for GPLDO and VBUS regulators
ARM: dts: Enable the PWM for bcm28155 AP board
ARM: dts: Declare the PWM for bcm11351 (bcm281xx)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge "Qualcomm ARM Based Device Tree Updates for v3.16" from Kumar Gala:
* Added device tree nodes for pinctrl and SDHC for msm8974 SoC/DB8074 board
* Added binding spec for GSBI configuration node
* tag 'qcom-dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
soc: qcom: Add device tree binding for GSBI
ARM: dts: msm: Add SDHC controller nodes for MSM8974 and DB8074 board
ARM: dts: MSM8974: Add pinctrl node
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge "ARM: STi: DT changes for v3.16, v3" from Maxime Coquelin:
Please consider these STi DT updates for v3.16.
This 3rd version takes into account Olof's comments on the v2:
- Fix upper-cases in labels and node names
- Sort compatibles order from specific to generic
- Sort dts entries in Makefile
It also adds support for the B2020 revision E board for STiH416 SoC.
Note that two reset patches are part of this pull request, in order to avoid
compilation breakage.
Adding these two patches in this pull request has been accepted by Philipp Zabel.
* tag 'sti-dt-for-v3.16-1' of git://git.stlinux.com/devel/kernel/linux-sti: (23 commits)
ARM: sti: stih41x: Provide a proper header for this DTSI file
ARM: sti: stih416: Enable board LED support for B2020 RevE
ARM: sti: stih416: Add support for B2020 RevE
ARM: STi: DT: STiH41x Add clk_ignore_unused to bootargs
ARM: STi: DT: STiH415: 415 DT Entry for clockgen A9
ARM: STi: DT: STiH415: Remove unused CLK_S_GMAC0_PHY & CLK_S_ETH1_PHY fixed clocks
ARM: STi: DT: STiH415: Remove unused CLK_S_ICN_REG_0 fixed clock
ARM: STi: DT: STiH415: 415 DT Entry for clockgen A0/1/10/11/12
ARM: STi: DT: STiH416: 416 DT Entry for clockgen A9/DDR/GPU
ARM: STi: DT: STiH416: 416 DT Entry for clockgen B/C/D/E/F
ARM: STi: DT: STiH416: Remove unused CLK_S_GMAC0_PHY & CLK_S_ETH1_PHY fixed clocks
ARM: STi: DT: STiH416: Remove unused CLK_S_ICN_REG_0 fixed clock
ARM: STi: DT: STiH416: 416 DT Entry for clockgen A0/1/10/11/12
ARM: STi: DT: STiH41x: Rename CLK_SYSIN into clk_sysin
ARM: STi: DT: add keyscan for stih41x-b2000
ARM: STi: DT: add keyscan for stih416
ARM: STi: DT: add keyscan for stih415
driver: reset: sti: add keyscan for stih416
driver: reset: sti: add keyscan for stih415
ARM: dts: STiH407: Add B2120 board support
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Keystone SOC updates for 3.16
- Drop unused COMMON_CLK_DEBUG option
- Enable MTD_SPI_NOR config needed for M25P80
- Enable coherent higher address memory space
* tag 'keystone-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: keystone: Update the dma offset for non-dt platform devices
ARM: keystone: Switch over to coherent memory address space
ARM: configs: keystone: add MTD_SPI_NOR (new dependency for M25P80)
ARM: configs: keystone: drop CONFIG_COMMON_CLK_DEBUG
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This branch has been picked up by rmk to be merged through his tree,
and is required as a base for the keystone changes.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge "Allwinner Core additions for 3.16, take 2" from Maxime Ripard:
- Convert the A31 SMP operations to the CPU_METHOD_OF_DECLARE mechanism
- Remove the reset code from the machine definition, that removes pretty much
all the code left in mach-sunxi
* tag 'sunxi-core-for-3.16-2' of https://github.com/mripard/linux:
ARM: sunxi: Remove init_machine callback
ARM: sunxi: Remove reset code from the platform
ARM: sun6i: Retire the smp field in A31 machine
Documentation: dt: bindings: Document Allwinner A31 enable method
ARM: sun6i: Use CPU_METHOD_OF_DECLARE
Documentation: dt: bindings: Document ARM PSCI enable method
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge "Qualcomm ARM Based SoC Updates for v3.16" from Kumar Gala:
* Enabling building pinctrl and AMBA bus support
* Clean up debug UART selection
* tag 'qcom-soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
ARM: qcom: Select PINCTRL by default for ARCH_QCOM
ARM: debug: qcom: make UART address selection configuration option
ARM: qcom: Enable ARM_AMBA option for Qualcomm SOCs.
Conflicts:
arch/arm/Kconfig.debug
arch/arm/mach-qcom/Kconfig
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge "mvebu SoC changes for v3.16 (incremental #2)" from Jason Cooper <jason@lakedaemon.net>:
- mvebu
- fix coherency on big-endian in -next
- hardware IO coherency
- L2/PCIe deadlock workaround
- small coherency cleanups
* tag 'mvebu-soc-3.16-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: returns ll_get_cpuid() to ll_get_coherency_cpumask()
ARM: mvebu: improve comments in coherency_ll.S
ARM: mvebu: fix indentation of assembly instructions in coherency_ll.S
ARM: mvebu: fix big endian booting after coherency code rework
ARM: mvebu: coherency: fix registration of PCI bus notifier when !PCI
ARM: mvebu: implement L2/PCIe deadlock workaround
ARM: mvebu: use hardware I/O coherency also for PCI devices
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Patches from Anders Berg applied individually:
Here is version 4 of platform support for AXM5516 SoC.
The clk driver is now applied to clk-next. The rest should be ready for
arm-soc. Haven't got any response from the power/reset maintainers... I hope
this driver can be taken via arm-soc as well.
The AXM55xx family consists of devices that may contain up to 16 ARM Cortex-A15
cores (in a 4x4 cluster configuration). The cores within each cluster share an
L2 cache, and the clusters are connected to each other via a CCN-504 cache
coherent interconnect.
This machine requires CONFIG_ARM_LPAE enabled as all peripherals are located
above 4GB in the memory map.
* axxia/soc:
ARM: dts: axxia: Add reset controller
power: reset: Add Axxia system reset driver
ARM: axxia: Adding defconfig for AXM55xx
ARM: dts: Device tree for AXM55xx.
ARM: Add platform support for LSI AXM55xx SoC
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The setup_max_cpus variable is only defined if CONFIG_SMP is set. Add
a preprocessor condition to avoid the following compilation error if
CONFIG_SMP is not set:
arch/arm/include/asm/trusted_foundations.h: In function 'register_trusted_foundations':
arch/arm/include/asm/trusted_foundations.h:57:2: error: 'setup_max_cpus' undeclared (first use in this function)
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add a defconfig file for the LSI Axxia family of devices (CONFIG_ARCH_AXXIA).
Signed-off-by: Anders Berg <anders.berg@lsi.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add device tree for the Amarillo validation board with an AXM5516 SoC.
Signed-off-by: Anders Berg <anders.berg@lsi.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The AXM55xx family consists of devices that may contain up to 16 ARM Cortex-A15
cores (in a 4x4 cluster configuration). The cores within each cluster share an
L2 cache, and the clusters are connected to each other via a CCN-504 cache
coherent interconnect.
This machine requires CONFIG_ARM_LPAE enabled as all peripherals are located
above 4GB in the memory map.
Signed-off-by: Anders Berg <anders.berg@lsi.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- two fixes concerning iio ADC triggers for at91sam9260 and at91sam9g20
one for the "device" file, the other for the DT.
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Merge tag 'at91-fixes2' of git://github.com/at91linux/linux-at91 into fixes
Second 3.15 fixes for AT91
- two fixes concerning iio ADC triggers for at91sam9260 and at91sam9g20
one for the "device" file, the other for the DT.
* tag 'at91-fixes2' of git://github.com/at91linux/linux-at91:
ARM: at91: sam9260: fix compilation issues
ARM: at91/dt: sam9260: correct external trigger value
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Adds additional nodes to support GPLDO1-6 and VBUS regulators which
are now supported in the bcm590xx regulator driver.
Signed-off-by: Matt Porter <mporter@linaro.org>
- The 'dma-ranges' helps to take care of few DMAable system memory
restrictions by use of dma_pfn_offset which is maintained per
device. Arch code then uses it for dma address translations for such
cases. We update the dma_pfn_offset accordingly during DT the device
creation process.
- The 'dma-coherent' property is used to setup arch's coherent dma_ops.
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Merge tag 'dt-dma-properties-for-arm' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into devel-stable
DT support for 'dma-ranges'and 'dma-coherent' properties with ARM updates
- The 'dma-ranges' helps to take care of few DMAable system memory
restrictions by use of dma_pfn_offset which is maintained per
device. Arch code then uses it for dma address translations for such
cases. We update the dma_pfn_offset accordingly during DT the device
creation process.
- The 'dma-coherent' property is used to setup arch's coherent dma_ops.
Currently oscillator frequency is determined based on sysboot settings,
it may not be the case always. To determine it properly, efuse settings
also has to be read. CONTROL_STATUS register holds this information.
Bit 31: if 0, frequency to be determined based on sysboot
if 1, frequency to be determined based on efuse
Bit 29,30 - for efuse detection of frequency
Bit 22,23 - for sysboot detection of frequency
Add clock nodes (mux) to determine oscillator frequency as above.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
We need set-rate-parent flags for the display's clock path so that the
DSS driver can change the clock rate of the PLL.
This patchs adds the ti,set-rate-parent flag to disp_clk and
dpll_disp_m2_ck clock nodes.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Add ti,set-rate-parent to dss_dss_clk so that the DSS driver can
set the rate.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Booting Linux 3.14 on Pandaboard currently gets the following
message displayed:
smp_twd: clock not found -2
Define "mpu_periphclk" as the twd clock in omap4 dts to avoid this.
Signed-off-by: Gilles Chanteperdrix <gilles.chanteperdrix@xenomai.org>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
abe_iclk's parent is aess_fclk and not abe_clk.
Also correct the parameters for clock rate calculation as used for OMAP4
since in PRCM level there's no difference between the two platform
regarding to AESS/ABE clocking.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
In OMAP5 bit 8 in PRCM registers are not defined (Reserved) unlike their
counterpart in OMAP4.
It is better to not write to these bits.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
We need "tbclk" clock data for the functioning of ehrpwm
module. Hence, populating the required clock information
in clock dts file.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
tbclk does not need to be a composite clock, we can simply
use gate clock for this purpose.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Now that the reset code are part of drivers of their own, we need those in the
defconfig.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The init_machine hook is now at its default value. We can remove it.
Even though the sun4i and sun7i machines are nothing more than generic machines
now, leave them in so that we won't have to add them back if needed, and so
that the machine is still displayed in /proc/cpuinfo.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that reset is handled either by the watchdog driver for the sun4i, sun5i
and sun7i, and by a driver of its own for sun6i, we can remove it from the
platform code.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Not a lot here during this merge window. Mostly we just have
the usual miscellaneous patches (removal of unnecessary prints,
proper dependencies being added to Kconfig, build warning fixes,
new device ID, etc.
Other than those, the only important new features are the
new support for OS Strings which should help Linux Gadget
Drivers behave better under MS Windows. Also Babble Recovery
implementation for MUSB on AM335x. Lastly, we also have
ARCH_QCOM PHY support though phy-msm.
Signed-of-by: Felipe Balbi <balbi@ti.com>
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Merge tag 'usb-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
Felipe writes:
usb: patches for v3.16 merge window
Not a lot here during this merge window. Mostly we just have
the usual miscellaneous patches (removal of unnecessary prints,
proper dependencies being added to Kconfig, build warning fixes,
new device ID, etc.
Other than those, the only important new features are the
new support for OS Strings which should help Linux Gadget
Drivers behave better under MS Windows. Also Babble Recovery
implementation for MUSB on AM335x. Lastly, we also have
ARCH_QCOM PHY support though phy-msm.
Signed-of-by: Felipe Balbi <balbi@ti.com>
Conflicts:
drivers/usb/phy/phy-mv-u3d-usb.c
Add support for the 2 SDHC controllers on the DB8074 board. The first
controller (at 0xf9824900) is connected to an on board soldered eMMC.
The second controller (at 0xf98a4900) is connected to a uSD card slot.
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
The SoCFPGA has two watchdog timers. Add them to the dtsi.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
[dinh: modified patch to have correct irq flag]
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
The cycloneV has three gpio controllers, each one with 29 gpios. This patch
adds the three controller with the gpio driver which is now sitting the
gpio tree.
Cc: devicetree@vger.kernel.org
Acked-by: Alan Tull <atull@altera.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
This patch enables exynos_usbphy and hsotg device nodes.
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: Kamil Debski <k.debski@samsung.com>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds a hsotg node for exynos4 USB2.0 device controller.
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: Kamil Debski <k.debski@samsung.com>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch enables a exynos_usbphy node for exynos4 SoCs.
A exynos4x12 usb phy node is almost same with 4210's one
except compatible string and pmu syscon.
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: Kamil Debski <k.debski@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds a PMU(Power Management Unit) syscon node. This
should be required for USB Phy syscon regmap I/F.
Cc: Kamil Debski <k.debski@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
sss module device node missed clock macro.
This patch replace magic number with macro in clock
binding for exynos5420.
Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Reviewed-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Phy and sss module device node missed clock macro.
This patch replace magic number with macros in clock
binding for exynos5250.
Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Reviewed-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch replaces magic number of MIPI DSI Master node with
macros in clock binding for exynos4
Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Reviewed-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch enables support external SD card slot.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch enables support for multimedia blocks - fimc in
mem2mem mode, no camera sensors support yet.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds device tree nodes necessary to enable USB support on
universalc210 board, this includes UDC controller (USB gadget) as well
as EHCI and OHCI host ports. LDO3 and LDO8 regulators are switched to
always on mode until EHCI and OHCI drivers will support them correctly.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds device tree nodes necessary to enable USB
gadget functionality on Exynos4210-based Trats board.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds the audio subsystem clock controller and the I2S
IP block nodes for Exynos4 SoC series.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch fixed gpio key device node.
First, fix incorrect gpio property.
And then, add ok-key node where locate bottom center.
I have tested on exynos4412-trats2 board.
Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Exynos4412-trats2 board have light/proximity sensor.
This patch add cm36651 light/ proximity sensor node for exynos4412.
cm36651 is required properties as below.
- Use i2c-gpio for cm36651 sensor.
- Use fixed regulator for the IR LED.
It is a part of the cm36651 for proximity detection.
- cm36651 is i2c device driver so need to use i2c-gpio driver.
Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add the pin control node and pin definitions of SPI8.
Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add missing PINCTRL selection. This enables selection of pinctrollers for
Qualcomm processors.
Signed-off-by: Andy Gross <agross@codeaurora.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Separate Qualcomm low-level debugging UART to two options.
DEBUG_MSM_UART is used in earlier non-multi platform arches,
like MSM7X00A, QSD8X50 and MSM7X30.
DEBUG_QCOM_UARTDM is used in multi-plafrom arches and have
embedded data mover.
Make DEBUG_UART_PHYS and DEBUG_UART_BASE user adjustable by
Kconfig menu.
Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
As some of the IPs on Qualcomm SOCs are based on ARM PrimeCell IPs.
For example SDCC controller is PrimeCell MCI pl180. Adding this option will
give flexibility to reuse the existing drivers as it is without major
modifications.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Use the hexadecimal values for the triggers to match what is done for the device
tree. This also fixes compilation issues as the defines have been moved
elsewhere.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Now that DT based platforms are split out of mach-msm into
mach-qcom, put back a non-DT based SoC into the msm_defconfig and
stop selecting unsupported drivers.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
This patch removes the selection of AT91_USE_OLD_CLK when selecting
sam9n12 SoC support. This will automatically enable COMMON_CLK_AT91 option
and add support for at91 common clk implementation.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Tested-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Define sam9n12ek's main and slow crystal frequencies.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Tested-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Define sam9n12 clocks and make use of them in peripheral definitions.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Tested-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This patch encloses sam9n12 old clk registration in
"#if defined(CONFIG_OLD_CLK_AT91) #endif" sections.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Tested-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This patch removes the selection of AT91_USE_OLD_CLK when selecting
sam9x5 SoCs support. This will automatically enable COMMON_CLK_AT91 option
and add support for at91 common clk implementation.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Define sam9x5ek's main and slow crystal frequencies.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Define sam9x5 clocks in sam9x5 dt files and make use of them in peripheral
definitions.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This patch encloses sam9x5 old clk registration in
"#if defined(CONFIG_OLD_CLK_AT91) #endif" sections.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add some documentation to cover the outer cache functions so that their
requirements can be better understood. Of particular note are the
flush_all() and disable() methods which must not be called except in
very specific circumstances.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
They're u32, they're not unsigned long. The UL suffix is not required
here.
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Santosh says:
> But we should kill all of that since we long back decided to remove
> ES1.0 related code. The mach-omap code alreasy has removed the ES1.0
> compatibility so feel free to remove any specific ES1.0
> related stuff. That silicon is long dead.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Spear calls outer_flush_all() from it's SMP bringup function. This
is potentially dangerous as the L2C set/way operations which implement
this don't take kindly to concurrent operations. Besides, there's
better solutions to this, as implemented on other platforms.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
outer_disable() is defined to safely turn the L2 cache off without data
loss: this means that outer_flush_all() should never be called unless
you need to implement some special L2 cache disabling, and even then
only from your replacement L2 cache disable function.
Acked-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When we unwind through an exception stack, include the saved PC value
into the stack trace: this fills in an otherwise missed functions from
the trace (as indicated below):
[<c03f4424>] fec_enet_interrupt+0xa0/0xe8
[<c0066c0c>] handle_irq_event_percpu+0x68/0x228
[<c0066e18>] handle_irq_event+0x4c/0x6c
[<c006a024>] handle_fasteoi_irq+0xac/0x198
[<c00664b0>] generic_handle_irq+0x4c/0x60
[<c000f014>] handle_IRQ+0x40/0x98
[<c0008554>] gic_handle_irq+0x30/0x64
[<c0012900>] __irq_svc+0x40/0x50
[<c0029030>] __do_softirq+0xe0/0x2fc <====
[<c0029500>] irq_exit+0xb0/0x100
[<c000f018>] handle_IRQ+0x44/0x98
[<c0008554>] gic_handle_irq+0x30/0x64
[<c0012900>] __irq_svc+0x40/0x50
[<c000f34c>] arch_cpu_idle+0x30/0x38 <====
[<c005e1e4>] cpu_startup_entry+0xac/0x214
[<c066297c>] rest_init+0x68/0x80
[<c08ccb10>] start_kernel+0x2fc/0x358
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
While debugging the FEC ethernet driver using stacktrace, it was noticed
that the stacktraces always begin as follows:
[<c00117b4>] save_stack_trace_tsk+0x0/0x98
[<c0011870>] save_stack_trace+0x24/0x28
...
This is because the stack trace code includes the stack frames for itself.
This is incorrect behaviour, and also leads to "skip" doing the wrong
thing (which is the number of stack frames to avoid recording.)
Perversely, it does the right thing when passed a non-current thread. Fix
this by ensuring that we have a known constant number of frames above the
main stack trace function, and always skip these.
Cc: <stable@vger.kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid calling dma_cache_maint_page() when unmapping a DMA_TO_DEVICE
buffer. The L1 cache ops never do anything in this circumstance, nor
do they ever need to - all that matters for this case is that the data
written is visible to the device before DMA starts. What happens during
the transfer (provided the buffer is not written to) is of no real
consequence.
We already do this optimisation for the L2 cache.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Rather than reading the cr_alignment variable, use get_cr() to read
directly from the hardware instead. We have two places where this
occurs, neither of them are performance critical.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
No one ever calls this function anywhere in the kernel, so let's
completely remove it from the outer cache API and turn it into an
internal-only thing.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
In the refactoring of the coherency fabric assembly code, a function
called ll_get_cpuid() was created to factorize common logic between
functions adding CPU to the SMP coherency group, enabling and
disabling the coherency.
However, the name of the function is highly misleading: ll_get_cpuid()
makes one think tat it returns the ID of the CPU, i.e 0 for CPU0, 1
for CPU1, etc. In fact, this is not at all what this function returns:
it returns a CPU mask for the current CPU, usable for the coherency
fabric configuration and control registers.
Therefore this commit renames this function to
ll_get_coherency_cpumask(), and adds additional comments on top of the
function to explain in more details what it does, and also how the
endianess issue is handled.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1400762882-10116-5-git-send-email-thomas.petazzoni@free-electrons.com
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit makes no functional change, it only improves a bit the
various code comments in mach-mvebu/coherency_ll.S, by fixing a few
typos and adding a few more details.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1400762882-10116-4-git-send-email-thomas.petazzoni@free-electrons.com
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit does not make any functional change, it only fixes the
indentation of a few assembly instructions in
arch/arm/mach-mvebu/coherency_ll.S.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1400762882-10116-3-git-send-email-thomas.petazzoni@free-electrons.com
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
As part of the introduction of the cpuidle support for Armada XP, the
coherency code was significantly reworked, especially in the
coherency_ll.S file. However, when the ll_get_cpuid function was
created, the big-endian specific code that switches the endianess of
the register was not updated properly.
This patch fixes this code, and therefore makes big endian systems
bootable again.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1400762882-10116-2-git-send-email-thomas.petazzoni@free-electrons.com
Fixes: 2e8a5942f8 ("ARM: mvebu: Split low level functions to manipulate HW coherency")
Reported-by: Kevin Hilman <khilman@linaro.org>
Cc: Kevin Hilman <khilman@linaro.org>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Commit b0063aad5d ("ARM: mvebu: use hardware I/O coherency also for
PCI devices") added a reference to the pci_bus_type variable, but this
variable is only available when CONFIG_PCI is enabled. Therefore,
there is now a build failure in !CONFIG_PCI situations.
This commit fixes that by enclosing the entire initcall into a
IS_ENABLED(CONFIG_PCI) condition.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1400598783-706-1-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Due a copy/paste error, the 'reg' values for the third PCIe interface
on Armada 380, and the third and fourth PCIe interfaces on Armada 385
are wrong: they are equal to the one of the second PCIe interface.
This patch fixes this by using the appropriate 'reg' values for those
PCIe interfaces.
Without this fix, the third and fourth PCIe interfaces are unusable on
those platforms.
Reported-by: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1400597008-4148-1-git-send-email-thomas.petazzoni@free-electrons.com
Fixes: 0d3d96ab00 ("ARM: mvebu: add Device Tree description of the Armada 380/385 SoCs")
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Marvell Armada 375 and Armada 38x SOCs, which use the Cortex-A9
CPU core, the PL310 cache and the Marvell PCIe hardware block are
affected a L2/PCIe deadlock caused by a system erratum when hardware
I/O coherency is used.
This deadlock can be avoided by mapping the PCIe memory areas as
strongly-ordered (note: MT_UNCACHED is strongly-ordered), and by
removing the outer cache sync done in software. This is implemented in
this patch by:
* Registering a custom arch_ioremap_caller function that allows to
make sure PCI memory regions are mapped MT_UNCACHED.
* Adding at runtime the 'arm,io-coherent' property to the PL310 cache
controller. This cannot be done permanently in the DT, because the
hardware I/O coherency can only be enabled when CONFIG_SMP is
enabled, in the current kernel situation.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1400165974-9059-4-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Kconfig symbol USB_MUSB_PERIPHERAL was removed in v3.1. The last two
checks for its macro now always evaluate to false. So remove these
checks.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
[nsekhar@ti.com: also cleaned-up usage in defconfig file]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The i12 tvbox is an A20 based android tvbox, with 512M / 1G RAM, 4G nand flash,
ap6210 or ap6330 sdio wifi + bt (broadcom sdio wifi + uart attached brcm bt),
2USB host ports using USB-A receptacles and a micro-usb receptacle for USB OTG,
and 100Mbit ethernet using an IP101a phy.
The PCB is labelled i12-a20 hence I've named the board i12-a20. It is used
in noname allwinner A20 tv-boxes, which are sometimes sold with Q5 or
QT840A as product name.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
bus-width defaults to 1, and all 4 lines are hooked up at the cubietruck,
properly set bus-width to 4.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The following parameters are no longer needed by the edma driver since the
information can be obtained from the IP's CCCFG register:
n_channel, n_region, n_slot and n_tc.
Remove the initialization of n_cc as well since in this context it has no
meaning. We have separate edma_soc_info struct/eDMA3_CC instance so this
member does not make any sense (and the driver no longer uses it).
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
dma-channels, ti,edma-regions and ti,edma-slots no longer needed in DT since
the the same information is available in the IP's CCCFG register.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
dma-channels, ti,edma-regions and ti,edma-slots no longer needed in DT since
the the same information is available in the IP's CCCFG register.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
From CCCFG register of eDMA3 we can get all the needed information for the
driver about the IP:
Number of channels: NUM_DMACH
Number of regions: NUM_REGN
Number of slots (PaRAM sets): NUM_PAENTRY
Number of TC/EQ: NUM_EVQUE
In case when booted with DT or the queue_priority_mapping is not provided
set up a default priority map.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Joel Fernandes <joelf@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
To be consistent in the code that we take parameters from edma_cc[j] struct
and not randomly from info[j] as well.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The struct edma is allocated per CC bases so the member num_cc does not make
any sense. One CC is one CC, it does not have sub CCs.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
