Pull objtool build fix from Ingo Molnar:
"Fix objtool builds with more exotic, user-defined CFLAGS"
* 'core-objtool-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
objtool: Clobber user CFLAGS variable
This is another huge branch with close to 450 changessets related to
devicetree files, roughly half of this for 32-bit and 64-bit respectively.
There are lots of cleanups and additional hardware support for platforms
we already support based on SoCs from Renesas, ST-Microelectronics,
Intel/Altera, Rockchips, Allwinner, Broadcom and other manufacturers.
A total of 6 new SoCs and 37 new boards gets added this time, one more
SoC will come in a follow-up branch. Most of the new boards are for
64-bit ARM SoCs, the others are typically for the 32-bit Cortex-A7.
Going more into details for SoC platforms with new hardware support:
The Snapdragon 855 (SM8150) is Qualcomm's current high-end phone platform,
usually paired with an external 5G modem. So far we only support the
Qualcomm SM8150 MTP reference platform, but no actual products.
For the slightly older Qualcomm platforms, support for several interesting
products is getting added: Three laptops based on Snapdragon 835/MSM8998
(Asus NovaGo, HP Envy X2 and Lenovo Miix 630), one laptop based on
Snapdragon 850/sdm850 (Lenovo Yoga C630) and several phones based on
the older Snapdragon 410/MSM8916 (Samsung A3 and A5, Longcheer L8150
aka Android One 2nd gen "seed" aka Wileyfox Swift).
Mediatek MT7629 is a new wireless network router chip, similar to
the older MT7623. It gets added together with the reference board
implementation.
Allwinner V3 is a repackaged version of the existing low-end V3s chip,
and is used in the tiny Lichee Pi Zero plus, also added here. There is
also a new TV set-top box based on Allwinner H6, the Tanix TX6, and the
eMMC variant of the Olimex A64-Olinuxino development board.
NXP i.MX8M Nano is a new member of the ever-expanding i.MX SoC family,
similar to the i.MX8M Mini. As usual, there is a large number of new
boards for i.MX SoCs: Einfochips i.MX8QXP AI_ML, SolidRun Hummingboard
Pulse baseboard and System-on-Module, Boundary Devices i.MX8MQ Nitrogen8M,
and TechNexion PICO-PI-IMX8M-DEV for the 64-bit i.MX8 line. For 32-bit,
we get the Kontron i.MX6UL N6310 SoM with two baseboards, the PHYTEC
phyBOARD-Segin SoM with three baseboards, and the Zodiac Inflight
Innovations i.MX7 RMU2 board.
In a different NXP product line, the Layerscape LS1046A "Freeway"
reference board gets added.
Amlogic SM1 (S905X3) and G12B (S922X, A311D) are updated chips from their
set-top-box line and smart speaker with newer CPU and GPU cores compared
to their predecessors. Both are now also supported by the Khadas VIM3
development board series, and the dts files for that get reorganized a
bit to better deal with all variants. Another board based on SM1 that
gets added is the SEI Robotics SEI610.
There are a handful of new x86 and Power9 server boards using Aspeed BMC
chips that are gaining support for running Linux on the BMC through the
OpenBMC project: Facebook Minipack/Wedge100/Wedge40, Lenovo Hr855xg2,
and Mihawk. Notably these are still new machines using SoCs based on
the ARM9 and ARM11 CPU cores, as support for the new Cortex-A7 based
AST2600 is still ramping up.
There are three new end-user products using 32-bit Rockchips SoCs:
Mecer Xtreme Mini S6 is an Android "mini PC" box based on the low-end
RK3229 chip, while the two AOpen products Chromebox Mini (Fievel) and
Chromebase Mini (Tiger) run ChromeOS and are meant for commercial settings
(digital signage, PoS, ...).
One more single-board computer based on the popular 64-bit RK3399 is
added: the Leez RK3399 P710.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJdf6StAAoJEJpsee/mABjZDfEP/3h0GusRkoQ6PJ5FHsj4nIR6
NJK8RxmX4B4ctXxBc+Rbt8bHp1d/IdHL4Jcqe7xgR2OIVQPloJz1lFrLaF0wn4Mu
G1EP2DzcLym3K0lBwhByvXfU1s2lhaTYdT594J8kTEVgcPXe79LKqH42A1T+1IlC
7+xAh9sU++NLo64w+Iam3d3T72ugyeO7THWiie7Rb9wACS94i7cZwvasur35aHxf
Ut5nOQYPbTuVVvN1FfZAdrHJpK9r7pbJLVwHLMdHnUYup2XDmoC6iuDrKlsWxqjs
SBL0u+dO5pkdKQp17RZFQZwrx2Y97E9KLWaT9Cqb7nwJ+ftYf419TUioQvmyJRZd
DEsCz6GVCCOs2zFcGj+9iGRr5wA2O3I42dOZkkkTciztksFwSmomrSlwAgVBT2ms
In6K3g2DrN31aDGFW9dZnxBXHVHWXkqr/TN4UIO2h0jfR4bazAvPzBiDpJdkz1NY
KPpDrdTRA2k4UnSimot/7Pw8y2NtsTDVJeQS1KydSe44PiLLumO8hg+FfnhJoW5s
oaSjX89549JvUIrA7TbXPxpyGS8oo7a1XkQyzfWZs8l7JMWoR5oK/VdiuDBL7YDE
XFlcZmCmB+kUgtSgXjw9FflkoMn06usVZBo1rnWFApYmzZ3htnniNSgz/zjMJpXn
OtQTQnP2LzS+ioxqB2Se
=Bm5T
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM DT updates from Arnd Bergmann:
"This is another huge branch with close to 450 changessets related to
devicetree files, roughly half of this for 32-bit and 64-bit
respectively. There are lots of cleanups and additional hardware
support for platforms we already support based on SoCs from Renesas,
ST-Microelectronics, Intel/Altera, Rockchips, Allwinner, Broadcom and
other manufacturers.
A total of 6 new SoCs and 37 new boards gets added this time, one more
SoC will come in a follow-up branch. Most of the new boards are for
64-bit ARM SoCs, the others are typically for the 32-bit Cortex-A7.
Going more into details for SoC platforms with new hardware support:
- The Snapdragon 855 (SM8150) is Qualcomm's current high-end phone
platform, usually paired with an external 5G modem. So far we only
support the Qualcomm SM8150 MTP reference platform, but no actual
products.
- For the slightly older Qualcomm platforms, support for several
interesting products is getting added: Three laptops based on
Snapdragon 835/MSM8998 (Asus NovaGo, HP Envy X2 and Lenovo Miix
630), one laptop based on Snapdragon 850/sdm850 (Lenovo Yoga C630)
and several phones based on the older Snapdragon 410/MSM8916
(Samsung A3 and A5, Longcheer L8150 aka Android One 2nd gen "seed"
aka Wileyfox Swift).
- Mediatek MT7629 is a new wireless network router chip, similar to
the older MT7623. It gets added together with the reference board
implementation.
- Allwinner V3 is a repackaged version of the existing low-end V3s
chip, and is used in the tiny Lichee Pi Zero plus, also added here.
There is also a new TV set-top box based on Allwinner H6, the Tanix
TX6, and the eMMC variant of the Olimex A64-Olinuxino development
board.
- NXP i.MX8M Nano is a new member of the ever-expanding i.MX SoC
family, similar to the i.MX8M Mini. As usual, there is a large
number of new boards for i.MX SoCs: Einfochips i.MX8QXP AI_ML,
SolidRun Hummingboard Pulse baseboard and System-on-Module,
Boundary Devices i.MX8MQ Nitrogen8M, and TechNexion
PICO-PI-IMX8M-DEV for the 64-bit i.MX8 line. For 32-bit, we get the
Kontron i.MX6UL N6310 SoM with two baseboards, the PHYTEC
phyBOARD-Segin SoM with three baseboards, and the Zodiac Inflight
Innovations i.MX7 RMU2 board.
- In a different NXP product line, the Layerscape LS1046A "Freeway"
reference board gets added.
- Amlogic SM1 (S905X3) and G12B (S922X, A311D) are updated chips from
their set-top-box line and smart speaker with newer CPU and GPU
cores compared to their predecessors. Both are now also supported
by the Khadas VIM3 development board series, and the dts files for
that get reorganized a bit to better deal with all variants.
Another board based on SM1 that gets added is the SEI Robotics
SEI610.
- There are a handful of new x86 and Power9 server boards using
Aspeed BMC chips that are gaining support for running Linux on the
BMC through the OpenBMC project: Facebook
Minipack/Wedge100/Wedge40, Lenovo Hr855xg2, and Mihawk. Notably
these are still new machines using SoCs based on the ARM9 and ARM11
CPU cores, as support for the new Cortex-A7 based AST2600 is still
ramping up.
- There are three new end-user products using 32-bit Rockchips SoCs:
Mecer Xtreme Mini S6 is an Android "mini PC" box based on the
low-end RK3229 chip, while the two AOpen products Chromebox Mini
(Fievel) and Chromebase Mini (Tiger) run ChromeOS and are meant for
commercial settings(digital signage, PoS, ...).
- One more single-board computer based on the popular 64-bit RK3399
is added: the Leez RK3399 P710"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (467 commits)
arm64: dts: qcom: Add Lenovo Yoga C630
ARM: dts: aspeed-g5: Fixe gpio-ranges upper limit
ARM; dts: aspeed: mihawk: File should not be executable
ARM: dts: aspeed: swift: Change power supplies to version 2
ARM: dts: aspeed: vesnin: Add secondary SPI flash chip
ARM: dts: aspeed: vesnin: Add wdt2 with alt-boot option
ARM: dts: aspeed-g4: Add all flash chips
ARM: dts: exynos: Enable GPU/Mali T604 on Arndale board
ARM: dts: exynos: Enable GPU/Mali T604 on Chromebook Snow
ARM: dts: exynos: Add GPU/Mali T604 node to Exynos5250
ARM: dts: exynos: Fix min/max buck4 for GPU on Arndale board
ARM: dts: exynos: Mark LDO10 as always-on on Peach Pit/Pi Chromebooks
ARM: dts: exynos: Remove not accurate secondary ADC compatible
arm64: dts: rockchip: limit clock rate of MMC controllers for RK3328
arm64: dts: meson-sm1-sei610: add stdout-path property back
arm64: dts: meson-sm1-sei610: enable DVFS
arm64: dts: khadas-vim3: add support for the SM1 based VIM3L
dt-bindings: arm: amlogic: add Amlogic SM1 based Khadas VIM3L bindings
arm64: dts: khadas-vim3: move common nodes into meson-khadas-vim3.dtsi
arm64: dts: meson: g12a: add reset to tdm formatters
...
As usual, a bunch of commits, mostly adding drivers and other
options to defconfigs after the code was merged through another
tree.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJdf6RsAAoJEJpsee/mABjZwBIP/i3PQZslQ8LaJ2mtqHSB6QQr
br7R0lPr46iGSeEh9bt3b/Ut1cC5WM+Wq2mMeXAmIbJVgpoITFcfU3axaDYdKxuK
B4OsVcmoOlhTMiLeRNKaZT8ELojdLR5G2PknZ1d0xrRp+0ImNomaAFrZ9snzoLx2
SyYaAaPmNkOoorSbxiTVRWmNNjLHXF0j1g9kzjxe4q4JwL7e0dhJwJjBu5TjL2UD
JhqqZr03xkW4YMlyoLV3lQqxLuZvfA61E40UeJNTEc/cXlTxwz6hVwIQhkRHYvbS
eyx3oD8bYiJKBNv0j+M1m2VKafekNlC8pXpEp5Q/PELDjufhuwgrX+wscT+iWJuQ
gI8L8hurcxDzI/6YiSziNOTj37VjjFAx+SS2vKAxWcA7fFxTh64X9r3VRQFtcehJ
MS843UdhLZV5YdZIj1+HtNsNSJGJORaoVse7S+YOzbMw3TBxWGS1VRGNJPuYRvWA
WanfiGEnCFuKm+63a40W29E5cDSr6o1i65Zzpa62VFFkyN5T8MUTXF07MZT25t3W
vJxVOUv7KouRq0X+tvCbAfeOjqGWICkRSQGArdzZLWwiMVEm3h9m/o7+kYZFE1rK
fL3hKYk7iZcQouQ8z7PwSQJBC8Z3VprszBy9naVoTtJDqtjWrXEo9XtRYRnX+HDV
sRZznduLQhoXiV025cVM
=S1hW
-----END PGP SIGNATURE-----
Merge tag 'armsoc-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC defconfig updates from Arnd Bergmann:
"As usual, a bunch of commits, mostly adding drivers and other options
to defconfigs after the code was merged through another tree"
* tag 'armsoc-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (32 commits)
arm64: defconfig: Enable Qualcomm QUSB2 PHY
arm64: defconfig: Enable the EFI Framebuffer
arm64: defconfig: Enable Qualcomm GENI based I2C controller
ARM: multi_v7_defconfig: Make MAX77802 regulator driver built-in
arm64: defconfig: Enable CPU clock drivers for Qualcomm msm8916
arm64: defconfig: Add DRM_MSM to defconfigs with ARCH_QCOM
ARM: multi_v7_defconfig: Add DRM_MSM to defconfigs with ARCH_QCOM
ARM: qcom_defconfig: Add DRM_MSM to defconfigs with ARCH_QCOM
ARM: configs: aspeed_g5: Enable AST2600
ARM: configs: multi_v7: Add ASPEED G6
arm64: defconfig: Enable SM8150 GCC and pinctrl driver
arm64: defconfig: Enable CONFIG_ACPI_APEI_PCIEAER
arm64: defconfig: Enable the DesignWare watchdog
ARM: multi_v7_defconfig: Enable SPI_STM32_QSPI support
ARM: imx_v6_v7_defconfig: Enable the PSCI CPUidle driver
arm64: defconfig: Enable the PSCI CPUidle driver
arm64: defconfig: Enable Sun4i SPDIF module
ARM: exynos_defconfig: Enable AHCI-platform SATA driver
arm64: defconfig: CONFIG_DRM_ETNAVIV=m
ARM: imx_v6_v7_defconfig: Select the OV5645 camera driver
...
The branch contains driver changes that are tightly
connected to SoC specific code. Aside from smaller
cleanups and bug fixes, here is a list of the notable
changes.
New device drivers:
- The Turris Mox router has a new "moxtet" bus driver
for its on-board pluggable extension bus. The
same platform also gains a firmware driver.
- The Samsung Exynos family gains a new Chipid driver
exporting using the soc device sysfs interface
- A similar socinfo driver for Qualcomm Snapdragon
chips.
- A firmware driver for the NXP i.MX DSP IPC protocol
using shared memory and a mailbox
Other changes:
- The i.MX reset controller driver now supports the
NXP i.MX8MM chip
- Amlogic SoC specific drivers gain support for
the S905X3 and A311D chips
- A rework of the TI Davinci framebuffer driver to
allow important cleanups in the platform code
- A couple of device drivers for removed ARM SoC
platforms are removed. Most of the removals were
picked up by other maintainers, this contains
whatever was left.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJdf6SUAAoJEJpsee/mABjZAfwP/01bXBOlGVusNH2zuh8IUSHb
//5sTdWpwa2ugRekLOJUOjo2p9Fu70yH6xr4RUHI0rcRjZA0xR3bZPx45gI8LRHQ
tfb25LaKqfgZjWMCJ8due1Lh7B6ffOQukryMtM/LoiCtqsy7b6aThEKaLpM9/Owl
t53o4wKaVQJK5He9JQom9NOZidkl7tYLHmDQTOXhX2UEA/i45vtfjdsEBvoFPbTx
+bYvlqs+SWlpDJk29j+oBOeKadPF+TFboLDiUCxH44MC3OsH51zjtKVBRTtbNMkb
ek/ci5x9hCeHcYSEigNq2EMzEln09Yxyvjk8U/jLiJ1h1kz3p5MjqJbVMF1rYXpe
ALuAwinM8Zv2o5/UOCkiQTWq79PtpOKHZKpNBXkaJ8kyqBLMSy8Fs3hCvXrDnjnQ
TC8jX7UBqHRV2rbQIYehAQAxTvcRgTbqusQGLkUJInlux6go57LoMYHPABpHftJV
kRdVeT0KzdCz1pvQwyekIog5hPLNTBi4jw6eQcOgeENvAea1MJa8lMMfKcVbIdS0
ZVvxLl+K6noEKAv5lSeHAzjXq+cQFr3zDCsWy351mJETDHmE8zjsaHN1SgbRYLEk
ZqzNwUYaPYBis38g85qaY/TSsJrWJ+jP8u7s9HTw3Oywg8SRy5vtW177s00/9VOd
PYZ2UpqUeX8cdvggqUUU
=lxFi
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"This contains driver changes that are tightly connected to SoC
specific code. Aside from smaller cleanups and bug fixes, here is a
list of the notable changes.
New device drivers:
- The Turris Mox router has a new "moxtet" bus driver for its
on-board pluggable extension bus. The same platform also gains a
firmware driver.
- The Samsung Exynos family gains a new Chipid driver exporting using
the soc device sysfs interface
- A similar socinfo driver for Qualcomm Snapdragon chips.
- A firmware driver for the NXP i.MX DSP IPC protocol using shared
memory and a mailbox
Other changes:
- The i.MX reset controller driver now supports the NXP i.MX8MM chip
- Amlogic SoC specific drivers gain support for the S905X3 and A311D
chips
- A rework of the TI Davinci framebuffer driver to allow important
cleanups in the platform code
- A couple of device drivers for removed ARM SoC platforms are
removed. Most of the removals were picked up by other maintainers,
this contains whatever was left"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (123 commits)
bus: uniphier-system-bus: use devm_platform_ioremap_resource()
soc: ti: ti_sci_pm_domains: Add support for exclusive and shared access
dt-bindings: ti_sci_pm_domains: Add support for exclusive and shared access
firmware: ti_sci: Allow for device shared and exclusive requests
bus: imx-weim: remove incorrect __init annotations
fbdev: remove w90x900/nuc900 platform drivers
spi: remove w90x900 driver
net: remove w90p910-ether driver
net: remove ks8695 driver
firmware: turris-mox-rwtm: Add sysfs documentation
firmware: Add Turris Mox rWTM firmware driver
dt-bindings: firmware: Document cznic,turris-mox-rwtm binding
bus: moxtet: fix unsigned comparison to less than zero
bus: moxtet: remove set but not used variable 'dummy'
ARM: scoop: Use the right include
dt-bindings: power: add Amlogic Everything-Else power domains bindings
soc: amlogic: Add support for Everything-Else power domains controller
fbdev: da8xx: use resource management for dma
fbdev: da8xx-fb: drop a redundant if
fbdev: da8xx-fb: use devm_platform_ioremap_resource()
...
The main change this time around is a cleanup of some of the oldest
platforms based on the XScale and ARM9 CPU cores, which are between 10
and 20 years old.
The Kendin/Micrel/Microchip KS8695, Winbond/Nuvoton W90x900 and Intel
IOP33x/IOP13xx platforms are removed after we determined that nobody is
using them any more.
The TI Davinci and NXP LPC32xx platforms on the other hand are still in
active use and are converted to the ARCH_MULTIPLATFORM build, meaning
that we can compile a kernel that works on these along with most other
ARMv5 platforms. Changes toward that goal are also merged for IOP32x,
but additional work is needed to complete this. Patches for the
remaining ARMv5 platforms have started but need more work and some
testing.
Support for the new ASpeed AST2600 gets added, this is based on the
Cortex-A7 ARMv7 core, and is a newer version of the existing ARMv5 and
ARMv6 chips in the same family.
Other changes include a cleanup of the ST-Ericsson ux500 platform
and the move of the TI Davinci platform to a new clocksource driver.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJdf6RZAAoJEJpsee/mABjZDO0QAKGkhoEdUmrar0Yf7/ibTrLK
0naWvQtPEm6dv+u1zNfe2IWchVRbBVm+YSLbyaAZwJQknV5gdxgd/UyQrSG9yywg
xDEUdnj03AksYreWbr1tfcA6kQQJEeqZeysNej0v7MAd6MFz5O4M4CgYfAnCLCc4
5rzSqbtFgv4uNMnMTJGKk8anFWNYLbewoBGVcGIEQ/KQlf1+NrlqBWk7CgvencaF
VLqpK0mllhKxAOJHGz6Q/XXiJnj0u56X9GvfcJoaxDWVrAnC6ii29NOHKeXhxS5W
/EmhIEuqCRoGLAMYmml+NbCv43Z1L7neDJwg6sf9cVqNrB9L1Ldlgpr/uoj++Z+l
wdZ297Ogs4mKYx5CCdK4X1TaFOH3s+/awFr1uEP70p+QsPDMrCTuLSjgeQziylgO
kBGIGkqG4l48V9psQy/9SaalgGSB8w6Ta/ms1+rWc99Qj3ExDFCAMIl4uzOxjxT1
9MZbvhc3ulLT4BBXNGhvNaPJxYGk+ggV/ObsqF9+GkxLcVPR8L1tPIzZMB5dB1YR
0YcwyK2jlZGKIwMjLYDT+axGGPh9G+LV6INjRbW5BGJHgNZF844Bxw/eFYushLAu
KHrbpm3ImzJw9eHlgIRtFRTy8ZKPuvv7fGg3zzKSHT4ZmC3tEM68PnQGuMEvVX8Q
+Oa6OiDb0pkV1zsACSZn
=u+ew
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC platform updates from Arnd Bergmann:
"The main change this time around is a cleanup of some of the oldest
platforms based on the XScale and ARM9 CPU cores, which are between 10
and 20 years old.
The Kendin/Micrel/Microchip KS8695, Winbond/Nuvoton W90x900 and Intel
IOP33x/IOP13xx platforms are removed after we determined that nobody
is using them any more.
The TI Davinci and NXP LPC32xx platforms on the other hand are still
in active use and are converted to the ARCH_MULTIPLATFORM build,
meaning that we can compile a kernel that works on these along with
most other ARMv5 platforms. Changes toward that goal are also merged
for IOP32x, but additional work is needed to complete this. Patches
for the remaining ARMv5 platforms have started but need more work and
some testing.
Support for the new ASpeed AST2600 gets added, this is based on the
Cortex-A7 ARMv7 core, and is a newer version of the existing ARMv5 and
ARMv6 chips in the same family.
Other changes include a cleanup of the ST-Ericsson ux500 platform and
the move of the TI Davinci platform to a new clocksource driver"
[ The changes had marked INTEL_IOP_ADMA and USB_LPC32XX as being
buildable on other platforms through COMPILE_TEST, but that causes new
warnings that I most definitely do not want to see during the merge
window as that could hide other issues.
So the COMPILE_TEST option got disabled for them again - Linus ]
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (61 commits)
ARM: multi_v5_defconfig: make DaVinci part of the ARM v5 multiplatform build
ARM: davinci: support multiplatform build for ARM v5
arm64: exynos: Enable exynos-chipid driver
ARM: OMAP2+: Delete an unnecessary kfree() call in omap_hsmmc_pdata_init()
ARM: OMAP2+: move platform-specific asm-offset.h to arch/arm/mach-omap2
ARM: davinci: dm646x: Fix a typo in the comment
ARM: davinci: dm646x: switch to using the clocksource driver
ARM: davinci: dm644x: switch to using the clocksource driver
ARM: aspeed: Enable SMP boot
ARM: aspeed: Add ASPEED AST2600 architecture
ARM: aspeed: Select timer in each SoC
dt-bindings: arm: cpus: Add ASPEED SMP
ARM: imx: stop adjusting ar8031 phy tx delay
mailmap: map old company name to new one @microchip.com
MAINTAINERS: at91: remove the TC entry
MAINTAINERS: at91: Collect all pinctrl/gpio drivers in same entry
ARM: at91: move platform-specific asm-offset.h to arch/arm/mach-at91
MAINTAINERS: Extend patterns for Samsung SoC, Security Subsystem and clock drivers
ARM: s3c64xx: squash samsung_usb_phy.h into setup-usb-phy.c
ARM: debug-ll: Add support for r7s9210
...
Pull parisc updates from Helge Deller:
- Make the powerpc implementation to read elf files available as a
public kexec interface so it can be re-used on other architectures
(Sven)
- Implement kexec on parisc (Sven)
- Add kprobes on ftrace on parisc (Sven)
- Fix kernel crash with HSC-PCI cards based on card-mode Dino
- Add assembly implementations for memset, strlen, strcpy, strncpy and
strcat
- Some cleanups, documentation updates, warning fixes, ...
* 'parisc-5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: (25 commits)
parisc: Have git ignore generated real2.S and firmware.c
parisc: Disable HP HSC-PCI Cards to prevent kernel crash
parisc: add support for kexec_file_load() syscall
parisc: wire up kexec_file_load syscall
parisc: add kexec syscall support
parisc: add __pdc_cpu_rendezvous()
kprobes/parisc: remove arch_kprobe_on_func_entry()
kexec_elf: support 32 bit ELF files
kexec_elf: remove unused variable in kexec_elf_load()
kexec_elf: remove Elf_Rel macro
kexec_elf: remove PURGATORY_STACK_SIZE
kexec_elf: remove parsing of section headers
kexec_elf: change order of elf_*_to_cpu() functions
kexec: add KEXEC_ELF
parisc: Save some bytes in dino driver
parisc: Drop comments which are already in pci.h
parisc: Convert eisa_enumerator to use pr_cont()
parisc: Avoid warning when loading hppb driver
parisc: speed up flush_tlb_all_local with qemu
parisc: Add ALTERNATIVE_CODE() and ALT_COND_RUN_ON_QEMU
...
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJdf64MAAoJEKurIx+X31iBB20P/07o93sBT92SiA2/ety9sLqV
BGJmEdw7gyb9WVbUip6s71FIEKZw4foCGkqDiX+lr5Fw2A9tiK7LmFgTLi4LLwg+
syhYZ1y5/mwBI4FLlJudKjQdFZjr/n7DNlz4H67woE2kK+FyRsOKEaFUhuR8+0rC
mKJBKtIGnoIOPG06PT1k5qfdpzlreCFoWdIhjO55LfDgZnnDiMaX5h0vcBQ9xgCp
xGV0n/f7+qn4pzB4hGvNV209Sdgv2V4t77bHNvyXlJrM5Hqzafo5MzFgEJv+fRqJ
2RnkWVhwctfbid/2ggf2aAsYnMK3GigEaOCsYW2oWJESVUQhxIi3ndF/Jt9fraZv
ZouD7G/s64P5lUQuCT9JnKGzJrSgxvkd37049AZ4pFVc2MzLC6o6dyyP8pu5ARe8
T0shFik3+gsml2US/vSUzxvrg1saRQjl9E/AJ0RTZ8oyP4FNnFmkJf38qj3a0L0k
ILFYscM5q7WPggoDA/m6F96tLGhdK/sKjDzrADjEh2dIvn4woqoEJSDn+rXuP+Gm
UOj1v8mILZCqvOAmc9IkGCkPUlbrmNV/1FYh5+GWudtillEaD82vjSqm+jnVbfXD
REvHlR/kxCSj1gg/+nk+NFdZCkW3xETOcTZohhDkR7du2mHjTwBMZ2YRPrqoX4c8
VZA57Mrqm5Uk5601qYRl
=L5e+
-----END PGP SIGNATURE-----
Merge tag 'please-pull-ia64_for_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux
Pull ia64 updates from Tony Luck:
"The big change here is removal of support for SGI Altix"
* tag 'please-pull-ia64_for_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux: (33 commits)
genirq: remove the is_affinity_mask_valid hook
ia64: remove CONFIG_SWIOTLB ifdefs
ia64: remove support for machvecs
ia64: move the screen_info setup to common code
ia64: move the ROOT_DEV setup to common code
ia64: rework iommu probing
ia64: remove the unused sn_coherency_id symbol
ia64: remove the SGI UV simulator support
ia64: remove the zx1 swiotlb machvec
ia64: remove CONFIG_ACPI ifdefs
ia64: remove CONFIG_PCI ifdefs
ia64: remove the hpsim platform
ia64: remove now unused machvec indirections
ia64: remove support for the SGI SN2 platform
drivers: remove the SGI SN2 IOC4 base support
drivers: remove the SGI SN2 IOC3 base support
qla2xxx: remove SGI SN2 support
qla1280: remove SGI SN2 support
misc/sgi-xp: remove SGI SN2 support
char/mspec: remove SGI SN2 support
...
Add the following new features:
- Generic CPU topology description support for DT-based platforms,
including ARM64, ARM and RISC-V.
- Sparsemem support
- Perf callchain support
- SiFive PLIC irqchip modifications, in preparation for M-mode Linux
and clean up the code base:
- Clean up chip-specific register (CSR) manipulation code, IPIs, TLB
flushing, and the RISC-V CPU-local timer code
- Kbuild cleanup from one of the Kbuild maintainers
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEElRDoIDdEz9/svf2Kx4+xDQu9KksFAl1/pGEACgkQx4+xDQu9
Kkvkyw/9GulLK2yeXG8SoXiXWZAhrgUn487GM87BJXFwXkjDCRvYVk4RD8BKfOGt
w1td6BXK5PjceH+d2m3kHa1aBQwT7sgsfQD0mBiHQ7TG+CMHMPV31eqjgIgnklEY
f6bRl4JGokanPnLWE8tnQrMpu91kDI0XS2pnnQNNrAK3DbWocsdUIei14+auwygp
Djbwssb8R/5RQdFO1dRa+0dWo1omzCJBgkMQBXipvD/z7u8BApioYdEUN1pEg6Yg
YLdVtBUIF5gXIsq9jdqEZHWzvTPnq+5HZPy8pAYe/fPcnga89fCfgpWA9DfqjIEA
bNFHJJKWc/lFAcMmXWWkYwgIbx8PUiktdv27S/DYLdyZ4SIX5YEtmdD6aK4ZStQT
ZQcvCMDq9C3Y4s1PIwl9ORI8aVs3k1cI4Ee0xWS/x6D9h/84Ky1uBFgrPXai2G6q
AUxnu0zWhllNahxp+rvUh0rnfHOMalaTG8eUb1GEoLzFcRhKYrKWLgFG/eBCAiit
dofD24KpYSpZNrhZWgVUuE0Jcc58JSHp/LzDUloR2AcAvdxyQZ2Vd+vwE5BGGTzR
t/V4zjSvndXUxFBVe28zHO2qrDzA+jUE8d+vO8w+lDGjbITYYZwIJPBL3f8Z0s6b
wQWBwWlM4ZATqR662sBpz8P/t+RCcTMfLlatIV/07GRerjvPrd8=
=N9WW
-----END PGP SIGNATURE-----
Merge tag 'riscv/for-v5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V updates from Paul Walmsley:
"Add the following new features:
- Generic CPU topology description support for DT-based platforms,
including ARM64, ARM and RISC-V.
- Sparsemem support
- Perf callchain support
- SiFive PLIC irqchip modifications, in preparation for M-mode Linux
and clean up the code base:
- Clean up chip-specific register (CSR) manipulation code, IPIs, TLB
flushing, and the RISC-V CPU-local timer code
- Kbuild cleanup from one of the Kbuild maintainers"
[ The CPU topology parts came in through the arm64 tree with a shared
branch - Linus ]
* tag 'riscv/for-v5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
irqchip/sifive-plic: set max threshold for ignored handlers
riscv: move the TLB flush logic out of line
riscv: don't use the rdtime(h) pseudo-instructions
riscv: cleanup riscv_cpuid_to_hartid_mask
riscv: optimize send_ipi_single
riscv: cleanup send_ipi_mask
riscv: refactor the IPI code
riscv: Add support for libdw
riscv: Add support for perf registers sampling
riscv: Add perf callchain support
riscv: add arch/riscv/Kbuild
RISC-V: Implement sparsemem
riscv: Using CSR numbers to access CSRs
- 52-bit virtual addressing in the kernel
- New ABI to allow tagged user pointers to be dereferenced by syscalls
- Early RNG seeding by the bootloader
- Improve robustness of SMP boot
- Fix TLB invalidation in light of recent architectural clarifications
- Support for i.MX8 DDR PMU
- Remove direct LSE instruction patching in favour of static keys
- Function error injection using kprobes
- Support for the PPTT "thread" flag introduced by ACPI 6.3
- Move PSCI idle code into proper cpuidle driver
- Relaxation of implicit I/O memory barriers
- Build with RELR relocations when toolchain supports them
- Numerous cleanups and non-critical fixes
-----BEGIN PGP SIGNATURE-----
iQFEBAABCgAuFiEEPxTL6PPUbjXGY88ct6xw3ITBYzQFAl1yYREQHHdpbGxAa2Vy
bmVsLm9yZwAKCRC3rHDchMFjNAM3CAChqDFQkryXoHwdeEcaukMRVNxtxOi4pM4g
5xqkb7PoqRJssIblsuhaXjrSD97yWCgaqCmFe6rKoes++lP4bFcTe22KXPPyPBED
A+tK4nTuKKcZfVbEanUjI+ihXaHJmKZ/kwAxWsEBYZ4WCOe3voCiJVNO2fHxqg1M
8TskZ2BoayTbWMXih0eJg2MCy/xApBq4b3nZG4bKI7Z9UpXiKN1NYtDh98ZEBK4V
d/oNoHsJ2ZvIQsztoBJMsvr09DTCazCijWZiECadm6l41WEPFizngrACiSJLLtYo
0qu4qxgg9zgFlvBCRQmIYSggTuv35RgXSfcOwChmW5DUjHG+f9GK
=Ru4B
-----END PGP SIGNATURE-----
Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 updates from Will Deacon:
"Although there isn't tonnes of code in terms of line count, there are
a fair few headline features which I've noted both in the tag and also
in the merge commits when I pulled everything together.
The part I'm most pleased with is that we had 35 contributors this
time around, which feels like a big jump from the usual small group of
core arm64 arch developers. Hopefully they all enjoyed it so much that
they'll continue to contribute, but we'll see.
It's probably worth highlighting that we've pulled in a branch from
the risc-v folks which moves our CPU topology code out to where it can
be shared with others.
Summary:
- 52-bit virtual addressing in the kernel
- New ABI to allow tagged user pointers to be dereferenced by
syscalls
- Early RNG seeding by the bootloader
- Improve robustness of SMP boot
- Fix TLB invalidation in light of recent architectural
clarifications
- Support for i.MX8 DDR PMU
- Remove direct LSE instruction patching in favour of static keys
- Function error injection using kprobes
- Support for the PPTT "thread" flag introduced by ACPI 6.3
- Move PSCI idle code into proper cpuidle driver
- Relaxation of implicit I/O memory barriers
- Build with RELR relocations when toolchain supports them
- Numerous cleanups and non-critical fixes"
* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (114 commits)
arm64: remove __iounmap
arm64: atomics: Use K constraint when toolchain appears to support it
arm64: atomics: Undefine internal macros after use
arm64: lse: Make ARM64_LSE_ATOMICS depend on JUMP_LABEL
arm64: asm: Kill 'asm/atomic_arch.h'
arm64: lse: Remove unused 'alt_lse' assembly macro
arm64: atomics: Remove atomic_ll_sc compilation unit
arm64: avoid using hard-coded registers for LSE atomics
arm64: atomics: avoid out-of-line ll/sc atomics
arm64: Use correct ll/sc atomic constraints
jump_label: Don't warn on __exit jump entries
docs/perf: Add documentation for the i.MX8 DDR PMU
perf/imx_ddr: Add support for AXI ID filtering
arm64: kpti: ensure patched kernel text is fetched from PoU
arm64: fix fixmap copy for 16K pages and 48-bit VA
perf/smmuv3: Validate groups for global filtering
perf/smmuv3: Validate group size
arm64: Relax Documentation/arm64/tagged-pointers.rst
arm64: kvm: Replace hardcoded '1' with SYS_PAR_EL1_F
arm64: mm: Ignore spurious translation faults taken from the kernel
...
Including:
- Batched unmap support for the IOMMU-API
- Support for unlocked command queueing in the ARM-SMMU driver
- Rework the ATS support in the ARM-SMMU driver
- More refactoring in the ARM-SMMU driver to support hardware
implemention specific quirks and errata
- Bounce buffering DMA-API implementatation in the Intel VT-d driver
for untrusted devices (like Thunderbolt devices)
- Fixes for runtime PM support in the OMAP iommu driver
- MT8183 IOMMU support in the Mediatek IOMMU driver
- Rework of the way the IOMMU core sets the default domain type for
groups. Changing the default domain type on x86 does not require two
kernel parameters anymore.
- More smaller fixes and cleanups
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAl1/pdoACgkQK/BELZcB
GuMvCw/+K1GPyyZbPWAuXcnclraSZTHXS1lV0yilBXXyT2omFRQpRJYZGN/8NTbE
SqD2FtzTKGuGSy2jA0drd3RcMKK/zZsFYnJShiM3FHLXatZdaFrnkK7vRHuzKlHf
dvOlH7gHKtjIPPXodUEb0xd/oRAEIVsKjJyq1fBMARPPAluhU7mIFUI/xbGvX17g
LM00hIxEhVNsSPemU2kTVISNBPVneecNVLlKXySjp0YPW/+sf8R7tTvwlSXX6h3I
JM6wOU479O8mBvIcpAjfZlanHCHtqLk0ybaPx666DjdgYx6cUBHbDCF0P57XnGJA
HNeVGtBwGQb8VWgbPLJKrStSOzYudDG8ndctqfKYN7uiPDjYM2/sqXcwQSVXR9vX
AjT2s0GFEWT/AJhgBSeg9PJilEX1hPtomGKcQhKfR0wRGycixeZJFbwToQqzJrZN
7XoORbZPH1S5W6sjXsXH3eVPW3EGnKipulJSPGDqFLa2aIUG+PXuu/A+iJS6sADh
mqzVfcEs3/NYsro40eA/iQc0t99ftJXgpX18KxYprjyL6VWcwC/xeHcT/Zw9abxz
r7dYDGTR0z6RIew0GOaeZVdZJh/J6yraKCNDS0ARZgol6JPaU7HGHhh6Ohdmmu8L
Gtsgdxp4NeLEgp4mQiRvvpQ5pPJ/YR+oCOx3v+PPnKRLhMTxymQ=
=UF08
-----END PGP SIGNATURE-----
Merge tag 'iommu-updates-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull iommu updates from Joerg Roedel:
- batched unmap support for the IOMMU-API
- support for unlocked command queueing in the ARM-SMMU driver
- rework the ATS support in the ARM-SMMU driver
- more refactoring in the ARM-SMMU driver to support hardware
implemention specific quirks and errata
- bounce buffering DMA-API implementatation in the Intel VT-d driver
for untrusted devices (like Thunderbolt devices)
- fixes for runtime PM support in the OMAP iommu driver
- MT8183 IOMMU support in the Mediatek IOMMU driver
- rework of the way the IOMMU core sets the default domain type for
groups. Changing the default domain type on x86 does not require two
kernel parameters anymore.
- more smaller fixes and cleanups
* tag 'iommu-updates-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (113 commits)
iommu/vt-d: Declare Broadwell igfx dmar support snafu
iommu/vt-d: Add Scalable Mode fault information
iommu/vt-d: Use bounce buffer for untrusted devices
iommu/vt-d: Add trace events for device dma map/unmap
iommu/vt-d: Don't switch off swiotlb if bounce page is used
iommu/vt-d: Check whether device requires bounce buffer
swiotlb: Split size parameter to map/unmap APIs
iommu/omap: Mark pm functions __maybe_unused
iommu/ipmmu-vmsa: Disable cache snoop transactions on R-Car Gen3
iommu/ipmmu-vmsa: Move IMTTBCR_SL0_TWOBIT_* to restore sort order
iommu: Don't use sme_active() in generic code
iommu/arm-smmu-v3: Fix build error without CONFIG_PCI_ATS
iommu/qcom: Use struct_size() helper
iommu: Remove wrong default domain comments
iommu/dma: Fix for dereferencing before null checking
iommu/mediatek: Clean up struct mtk_smi_iommu
memory: mtk-smi: Get rid of need_larbid
iommu/mediatek: Fix VLD_PA_RNG register backup when suspend
memory: mtk-smi: Add bus_sel for mt8183
memory: mtk-smi: Invoke pm runtime_callback to enable clocks
...
v5.4 kernel cycle.
Core changes:
- Support hierarchical GPIO irqchips. We now have three
consumers that can use this: Intel IXP4xx, ThunderX and
Qualcomm SPMI GPIO (in the pinctrl subsystem). The support
code has been long in the making and hashed out so it should
be easily adaptable for all hierarchical irqchip parents.
The code only gets compiled in if hierarchical irqchip
is used at the topmost irq controller at least, as the
hierarchical irqchip requires strict hierarchy all the
way up in the system.
- Determine the need for a "valid_mask" for GPIO lines on the
gpio_chip and conversely for the "valid_mask" for the GPIO
interrupt chip interrupt lines by looking for a
.init_valid_mask() callback in the main chip or GPIO interrupt
chip respectively. Allocate it with bitmap_alloc().
- Isolate the device tree/open firmware GPIO description code
out in its own file properly.
- Isolate the ACPI GPIO description code out in its own file
properly.
- Drop a whole lot of #ifdef:s in the main includes: it does
not hurt to keep the include items around, and we get
quicker and clearer compile failures if the appropriate
kernel symbols are not selected for drivers.
New/deleted drivers:
- New driver for Aspeed SGPIO.
- The KS8695 driver is deleted as the platform gets deleted
from arch/arm in this kernel cycle.
- The Cirrus Logic Madera driver now supports CS47L92 and
CS47L15.
- The Freescale MPC8xxx now supports LS1028A and LS1088A.
Driver improvements:
- We pass the GPIO irqchip intialization by directly filling
in the struct instead of using set-up functions (the new
way) for Intel MID, Lynxpoint, Merrifield, XLP, HLWD, Aspeed,
ZX, VF610, TQMX86, MT7621, Zynq and EP93xx.
Out-of-band changes:
- Fix a GPIO header inclusion in Unicore - no response from
maintainer.
- Drop FMC subsystem from MAINTAINERS - was deleted in the
GPIO tree last cycle so let's mop up the shards.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl1/BO0ACgkQQRCzN7AZ
XXPiPw/9GPSYqvHuv37RJwUTiaygDleLLayCy73AsudopSeInAfcPIElJgW2/5oa
i5x4rdd81SpuReQWNKqqPjuDffdZvJW9rwuXU/LXsOk0fhWIe8BidUPISRPTYSJP
q3NpmBJG4opVmhWZ3yxnq9tPboabjdTikVkM90Nwpe3vpdKk/7GV5k/T8/18fXb6
bn7E6YaN6Qrt3jknb+eK+ne6zLv5/ncFIGqYvUPKeqi0MOs4JDc/YroK90MAMSrD
WvtOZl72bYKutxa42ZYf0lZVKhZHKMoigulEWczxVxwHSulxbMDbNa+CzNfunkjz
5iBDA34gzliCoA5NdcqMuQs44qkiRBS6ci9PRXBlW9QJuDHzpK5j4mKy2Kp5K2bQ
+FX1dAftsAQBEkqVqQs97kGIfE5z0hRsyH8+fLKH3tkZmfkLKjYAB+pwHIhAFwvV
f8WJ8Ay+gorvpWDwqjBeP2SnxFCE5GmgZHCfp0oJ1Kr/BM4hLPDT6RwvavDPO7uz
xMcJFH1ZS1HCdkuFKOboD+FpRHCDeL4IJvHpal3dcu3P4RMr16M3E+UAeQAwdnYM
AmqDYLbXyHdEszpk4uwc0nHt+gwie0CLfhuUvswJunnDkbwXiD4nj2c9ipaFsVLI
/KaZvUe44/I5ItRb8vGkpP6Z++QiVqJkmdO0Lxy+UEaV6jb7mfg=
=/TRI
-----END PGP SIGNATURE-----
Merge tag 'gpio-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"This is the bulk of changes in the GPIO subsystem for the v5.4 kernel
cycle.
Core changes:
- Support hierarchical GPIO irqchips.
We now have three consumers that can use this: Intel IXP4xx,
ThunderX and Qualcomm SPMI GPIO (in the pinctrl subsystem).
The support code has been long in the making and hashed out so it
should be easily adaptable for all hierarchical irqchip parents.
The code only gets compiled in if hierarchical irqchip is used at
the topmost irq controller at least, as the hierarchical irqchip
requires strict hierarchy all the way up in the system.
- Determine the need for a "valid_mask" for GPIO lines on the
gpio_chip and conversely for the "valid_mask" for the GPIO
interrupt chip interrupt lines by looking for a .init_valid_mask()
callback in the main chip or GPIO interrupt chip respectively.
Allocate it with bitmap_alloc().
- Isolate the device tree/open firmware GPIO description code out in
its own file properly.
- Isolate the ACPI GPIO description code out in its own file
properly.
- Drop a whole lot of #ifdef:s in the main includes: it does not hurt
to keep the include items around, and we get quicker and clearer
compile failures if the appropriate kernel symbols are not selected
for drivers.
New/deleted drivers:
- New driver for Aspeed SGPIO.
- The KS8695 driver is deleted as the platform gets deleted from
arch/arm in this kernel cycle.
- The Cirrus Logic Madera driver now supports CS47L92 and CS47L15.
- The Freescale MPC8xxx now supports LS1028A and LS1088A.
Driver improvements:
- We pass the GPIO irqchip intialization by directly filling in the
struct instead of using set-up functions (the new way) for Intel
MID, Lynxpoint, Merrifield, XLP, HLWD, Aspeed, ZX, VF610, TQMX86,
MT7621, Zynq and EP93xx.
Out-of-band changes:
- Fix a GPIO header inclusion in Unicore - no response from
maintainer.
- Drop FMC subsystem from MAINTAINERS - was deleted in the GPIO tree
last cycle so let's mop up the shards"
* tag 'gpio-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (82 commits)
gpiolib: of: add a fallback for wlf,reset GPIO name
gpio: htc-egpio: Remove unused exported htc_egpio_get_wakeup_irq()
gpio: remove explicit comparison with 0
gpio: creg-snps: use devm_platform_ioremap_resource() to simplify code
gpio: devres: Switch to EXPORT_SYMBOL_GPL()
gpio: of: Switch to EXPORT_SYMBOL_GPL()
gpio: of: Make of_gpio_simple_xlate() private
gpio: of: Make of_get_named_gpiod_flags() private
gpio: aspeed: Add in ast2600 details to Aspeed driver
gpio: aspeed: Use ngpio property from device tree if available
gpio: aspeed: Setup irqchip dynamically
gpio/aspeed: Fix incorrect number of banks
gpio: aspeed: Update documentation with ast2600 controllers
gpio: Initialize the irqchip valid_mask with a callback
gpiolib: acpi: make acpi_can_fallback_to_crs() static
gpio: Fix further merge errors
gpio: Fix up merge collision in include file
gpio: of: Normalize return code variable name
gpio: gpiolib: Normalize return code variable name
gpio: ep93xx: Pass irqchip when adding gpiochip
...
* Export i3c_device_match_id() so driver can get per-device data
* Add addr and lvr fields to i2c_dev_desc so we can attach I2C devices
that are not described in the DT
* Add a missing of_node_put()
* Fix a memory leak
* Use dev_to_i3cmaster() instead of open-coding it
Driver changes:
* Use for_each_set_bit() in the Cadence driver
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEKmCqpbOU668PNA69Ze02AX4ItwAFAl1/N00ACgkQZe02AX4I
twB8wxAAvK2wd7IMXD/GldIjFmqRb94sLMHjbLavKMNv/kmTZM68BoM600pntVO0
+2lmqL7tL/2I5fnI35LJFEe2zS7XqPrh8m9rOZZHvj/uDaZnHxp18a4vwKqpw3gy
QzlvUAQY5fp3dOlLqawKHbUTEwXA4WAuoFQujNimLbluKWZYiU3mBEPcVjYcNqnW
1qn+FckJ7HSNKgIwvMfD7MaF77FSkKiWmAud/Zm23vc0pISuVi4sYBT2UJ90bSBL
npPiW0l9BieAsCWLn1kv0T5AaY7X1LfBkAS10Nb3vxUOXxkHR0GtlG4Xno5cwfqy
bcNH8QwJ9wNi0tNcPxCe0CM1d5k0ekW95VBv4HzRT/wHP/cAcgxhk65jPPCdwuus
IYMp6B0p+G50xW2b7NzQGrLbktzn6kAqfzZWCBmX3/k2V+Y0CmBLarZp1LHL/hBR
51dvqVNlgGG5DBHnAMoYCKbsas6yqXK7rxpXKkW3yhlcHHkn86wx1MI4+XqJAHKH
AQOfuu+sjp35tOelb+wd49jXgWBVPVdQ2rv1h2YK6r2rgpbXE+P/t4R0BbIsIR0z
4wa9lnLaDgjyRaABUFC7YIqjSuHW7NsGJDHMajwsd8WvcUhPNDznTRnhp7o4rWXt
5ERqArQIxYCbVaROsYrgoYtxJ1E9ErnsW6cNxZX7O/6vljBxYLI=
=wXtJ
-----END PGP SIGNATURE-----
Merge tag 'i3c/for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux
Pull i3c updates from Boris Brezillon:
"Core changes:
- Export i3c_device_match_id() so driver can get per-device data
- Add addr and lvr fields to i2c_dev_desc so we can attach I2C
devices that are not described in the DT
- Add a missing of_node_put()
- Fix a memory leak
- Use dev_to_i3cmaster() instead of open-coding it
Driver changes:
- Use for_each_set_bit() in the Cadence driver"
* tag 'i3c/for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux:
i3c: master: Use dev_to_i3cmaster()
i3c: master: fix a memory leak bug
i3c: add addr and lvr to i2c_dev_desc structure
i3c: master: cdns: Use for_each_set_bit()
i3c: master: Add of_node_put() before return
i3c: move i3c_device_match_id to device.c and export it
The big theme for this release has been performance, we've had a series
of unrelated overhauls of a few drivers all with a big peformance
component. Otherwise it's been relatively quiet, highlights include:
- A big overhaul of the spi-fsl-dspi driver improving the code quality,
performance and stability from Vladimir Oltean.
- A big performance enhancement for the bc2835 (Raspberry Pi) driver
for unidirectional transfers from Lukas Wunner.
- Improved performance on small transfers for the uniphier driver from
Keiji Hayashibara.
- Lots of coccinelle generated cleanups from Yue Haibing.
- New device support for Freescale ls2080a and Nuvoton NPCM FIU.
-----BEGIN PGP SIGNATURE-----
iQFHBAABCgAxFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAl1+xloTHGJyb29uaWVA
a2VybmVsLm9yZwAKCRAk1otyXVSH0CfNB/9V35QHqszLhsoN4w9CwQg8ijd+DqUC
DJKQU76VxfdFSkMIYVgssnwaVO5VA06Pmx9d3cj8K+x76raLAT9gGa98Ja36pSCO
IFdH5v5SPNUR8zPs11wFYxNZkAZX1vG11TMXYzAOa/SkZW6S4D2rT5EN+yzmoASZ
IhJGmCh7nkpZpGmKPCgZzgNPCnEx1336IQPe3gfJg2+MvS3hiNDQiCfLzPtghU5M
GDcdZK14saRvj00oGdRQSoRNBayXSsNGiF6OOIZWmZIQUMGpDevZSlVsvpZcwjFP
SOx53PFDtQJYEoX6AJRyLUS76TEIiTtOSS6oKto3WmRSND0V4cs6IeLp
=GZAn
-----END PGP SIGNATURE-----
Merge tag 'spi-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"The big theme for this release has been performance, we've had a
series of unrelated overhauls of a few drivers all with a big
peformance component.
Otherwise it's been relatively quiet, highlights include:
- A big overhaul of the spi-fsl-dspi driver improving the code
quality, performance and stability from Vladimir Oltean.
- A big performance enhancement for the bc2835 (Raspberry Pi) driver
for unidirectional transfers from Lukas Wunner.
- Improved performance on small transfers for the uniphier driver
from Keiji Hayashibara.
- Lots of coccinelle generated cleanups from Yue Haibing.
- New device support for Freescale ls2080a and Nuvoton NPCM FIU"
* tag 'spi-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (102 commits)
spi: mediatek: support large PA
spi: mediatek: add spi support for mt6765 IC
dt-bindings: spi: update bindings for MT6765 SoC
spi: bcm2835: Speed up RX-only DMA transfers by zero-filling TX FIFO
spi: bcm2835: Speed up TX-only DMA transfers by clearing RX FIFO
dmaengine: bcm2835: Avoid accessing memory when copying zeroes
spi: bcm2835: Cache CS register value for ->prepare_message()
dmaengine: bcm2835: Document struct bcm2835_dmadev
spi: Guarantee cacheline alignment of driver-private data
dmaengine: bcm2835: Allow reusable descriptors
dmaengine: bcm2835: Allow cyclic transactions without interrupt
spi: bcm2835: Drop dma_pending flag
spi: bcm2835: Work around DONE bit erratum
spi-gpio: Use PTR_ERR_OR_ZERO() in spi_gpio_request()
spi: Use an abbreviated pointer to ctlr->cur_msg in __spi_pump_messages
spi: npcm-fiu: remove set but not used variable 'retlen'
spi: fsl-spi: use devm_platform_ioremap_resource() to simplify code
spi: zynq-qspi: use devm_platform_ioremap_resource() to simplify code
spi: zynqmp: use devm_platform_ioremap_resource() to simplify code
spi: xlp: use devm_platform_ioremap_resource() to simplify code
...
A small update for the regualtor API for this cycle, some small fixes
and a bunch of new devices but none of them very big. The most stand
out thing is the regulator-fixed-clock driver which is for regulators
where the enable control is done by using a clock instead of a GPIO or
register write, a novel hardware design that had not previously come up.
- Added a keyword pattern for regulator_get_optional() since usage of
that API generally needs extra review.
- Operating mode and suspend state support for act8865.
- New device support for Active Semiconductor ACT8600 chargers,
Mediatek MT6358, Qualcomm SM8150, regulator-fixed-clock, and
Synoptics SY20276, SY20278 and SY8824E.
-----BEGIN PGP SIGNATURE-----
iQFHBAABCgAxFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAl1+wp8THGJyb29uaWVA
a2VybmVsLm9yZwAKCRAk1otyXVSH0GP2B/4ia4TBT2u5ZuxlyLfrsHoAJ1iVleYW
D0s+Nsfou6lTrbJrIQgbVXsqbeBGhIBEYgfuyRJiy7CEwMssA7ltyyKbeBQ0U81W
ywXniN1W5ChRGP770DI1Rez4qqDyIQegLC1afx1dXH4p7Be/Ttk69NQJscmpm9hC
sXJ2tMoa2N1+nKeMEQvVsqegbdy8ddXNRIKnUnzV0HPkOTEVIwlTVR/gQXOtOpax
UXx+mTeLQKplq9zditkRysuTWIsog1jC1kZRVu5goZ8+uudWK0SrVML4bWB6rPrJ
d8moHJuwLHMipv+xLhI0bKGEYD4jnDqyGPJkJBuDSZTZ5EAJPaaiH923
=a+m4
-----END PGP SIGNATURE-----
Merge tag 'regulator-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
Pull regulator updates from Mark Brown:
"A small update for the regualtor API for this cycle, some small fixes
and a bunch of new devices but none of them very big.
The most stand out thing is the regulator-fixed-clock driver which is
for regulators where the enable control is done by using a clock
instead of a GPIO or register write, a novel hardware design that had
not previously come up.
Summary:
- Added a keyword pattern for regulator_get_optional() since usage of
that API generally needs extra review.
- Operating mode and suspend state support for act8865.
- New device support for Active Semiconductor ACT8600 chargers,
Mediatek MT6358, Qualcomm SM8150, regulator-fixed-clock, and
Synoptics SY20276, SY20278 and SY8824E"
* tag 'regulator-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (52 commits)
regulator: core: Fix error return for /sys access
regulator: da9211: fix obtaining "enable" GPIO
regulator: max77686: fix obtaining "maxim,ena" GPIO
regulator: uniphier: Add Pro5 USB3 VBUS support
dt-bindings: regulator: add regulator-fixed-clock binding
regulator: fixed: add possibility to enable by clock
regulator: s2mps11: Consistently use local variable
regulator: lp87565: Simplify lp87565_buck_set_ramp_delay
regulator: slg51000: use devm_gpiod_get_optional() in probe
regulator: lp8788-ldo: make array en_mask static const, makes object smaller
regulator: tps65132: Stop parsing DT when gpio is not found
regulator: Defer init completion for a while after late_initcall
regulator: add missing 'static inline' to a helper's stub
regulator: provide regulator_bulk_set_supply_names()
MAINTAINERS: Add keyword pattern on regulator_get_optional()
regulator: sy8824x: add prefixes to BUCK_EN and MODE macros
regulator: sy8824x: use c++style for the comment block near SPDX
regulator: mt6358: Add BROKEN dependency while waiting for MFD to merge
regulator: mt6358: Add support for MT6358 regulator
regulator: Add document for MT6358 regulator
...
Only two changes for this release, one fix for error handling with
runtime PM and a change from Greg removing error handling from debugfs
API calls now that they implement user visible error reporting.
-----BEGIN PGP SIGNATURE-----
iQFHBAABCgAxFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAl1+vGATHGJyb29uaWVA
a2VybmVsLm9yZwAKCRAk1otyXVSH0JMJB/9Nx/DQ8mGc4KTiNjOd2ic0nwPfsYNB
Nr7/5GXmvjPc64tLmDDITZZTNbruMxMfcvJqli+JVre/yVbM8DrGMuPKpV7KJQl1
ZKXCeRfXRtsZ/u3e/Kek0GEDRGgSwp1qTR3e4SoEQYyrf8oWIrVfRn53ptF+xJld
inQh81+uoLHjWLZ+B2JQ/Dx7729z1+cmM3xpttvakDDRBJ7d9kIs2XA6mNfcWx4/
JibNoOdRt+xxU2ALaa2yNEomv/AuFbQARYop2w6ivxefQAYpVAdqwnYJJdAHIZXi
vkBczdLQpLeGXLaDrR6v0nvKvNBKaUH2WU2osFHI8ww9+HWEVr834Xor
=UQDg
-----END PGP SIGNATURE-----
Merge tag 'regmap-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap
Pull regmap updates from Mark Brown:
"Only two changes for this release, one fix for error handling with
runtime PM and a change from Greg removing error handling from debugfs
API calls now that they implement user visible error reporting"
* tag 'regmap-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap:
regmap-irq: Correct error paths in regmap_irq_thread for pm_runtime
regmap: no need to check return value of debugfs_create functions
New drivers and chip support
- Add Inspur Power System power supply driver
- Add Synaptics AS370 PVT sensor driver
- Add support for SHTC3 to shtc1 driver
- Add support for NCT6116 to nct6775 driver
- Add support for AMD family 17h, model 70h CPUs to k10temp driver
- Add support for PCT2075 to lm75 driver
Removed drivers
- Remove ads1015 driver (now supported in iio)
Other changes
- Convert drivers to use devm_i2c_new_dummy_device
- Substantial structural improvements in lm75 driver
Add support for writing sample interval for supported chips
- Add support for PSU version 2 to ibm-cffps driver
- Add support for power attribute to iio_hwmon bridge
- Add support for additional fan, voltage and temperature attributes
to nct7904 driver
- Convert adt7475 driver to use hwmon_device_register_with_groups()
- Convert k8temp driver to use hwmon_device_register_with_info()
- Various other improvements and minor fixes
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiHPvMQj9QTOCiqgVyx8mb86fmYEFAl1+t+UACgkQyx8mb86f
mYF3VA/9EMM6XOOTAyDgxmiE3UltgIWsKzVyWvU/uJpaxmTNG9aPF2cQXBslJyqH
6vqHYCh6ilPqNR7ExFf1Y85rvpA+8oOzn9jkWxVr4ywJYsiJfIC9Amxf55hfKk3V
ej+MZ2WjWXmwyHfV0vw8LPB8LEnDBH5f9bwM4Q5vCwwrgByfV7z3F7zpGjv5kZmm
XbqCkfPgge+lZOV3/hDJKh9ylajpxJDhdrP4hhsFDVq9Tys17WZVSRGyKAvJLPMm
Ya4TcJzQlIlr7OaxRQjONvPn34Wh3L299Hg6L5rqIxS8+WnIkLPse4YAOXbpO4Nf
J01mS1H7XNHHWf76fedbK6+jnhLhyl67QaGoTttiNyjQyW/PYEz7PkmRNz8xsLbd
TbUjqd3izPCrx2OEJYBoQDhQS6K3HijtRo8mBO7Svh61Y749+v0DegnEzpz6J+l4
fIegne/LvNcyB0nQUtNQl+UpeqSlGeujAR2MVT6RYIiMlVCMueLfVk/zlGIO+tzO
TPQoYyhosYdBG9uLgG796pQ4LPmx9L3aqd8oXqAWDx55+sOjLMWiNolJJgkH3Vfz
8eUV8CrdNgs7NQadv+Dp5NoS3pXle8SZAbSqy40GYDlX6BORPujIJgXOcazRIreG
IhyMoxGt6WfgSob38Od+jRE6d9rkke36gFfDUJTUzJROOCRMLLw=
=sRtz
-----END PGP SIGNATURE-----
Merge tag 'hwmon-for-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging
Pull hwmon updates from Guenter Roeck:
"New drivers:
- Inspur Power System power supply driver
- Synaptics AS370 PVT sensor driver
Chip support:
- support SHTC3 in shtc1 driver
- support NCT6116 in nct6775 driver
- support AMD family 17h, model 70h CPUs in k10temp driver
- support PCT2075 in lm75 driver
Removed drivers:
- ads1015 driver (now supported in iio)
Other changes:
- Convert drivers to use devm_i2c_new_dummy_device
- Substantial structural improvements in lm75 driver adding support
for writing sample interval for supported chips
- Add support for PSU version 2 to ibm-cffps driver
- Add support for power attribute to iio_hwmon bridge
- Add support for additional fan, voltage and temperature attributes
to nct7904 driver
- Convert adt7475 driver to use hwmon_device_register_with_groups()
- Convert k8temp driver to use hwmon_device_register_with_info()
- Various other improvements and minor fixes"
* tag 'hwmon-for-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging: (48 commits)
hwmon: submitting-patches: Add note on comment style
hwmon: submitting-patches: Point to with_info API
hwmon: (nct7904) Fix incorrect SMI status register setting of LTD temperature and fan.
hwmon: (shtc1) add support for the SHTC3 sensor
hwmon: (shtc1) fix shtc1 and shtw1 id mask
hwmon: (lm75) Aproximate sample times to data-sheet values
hwmon: (w83793d) convert to use devm_i2c_new_dummy_device
hwmon: (w83792d) convert to use devm_i2c_new_dummy_device
hwmon: (w83791d) convert to use devm_i2c_new_dummy_device
hwmon: (as370-hwmon) fix devm_platform_ioremap_resource.cocci warnings
hwmon: (lm75) Add support for writing sampling period on PCT2075
hwmon: (lm75) Add support for writing conversion time for TMP112
hwmon: (lm75) Move updating the sample interval to its own function
hwmon: (lm75) Support configuring the sample time for various chips
hwmon: (nct7904) Fix incorrect temperature limitation register setting of LTD.
hwmon: (as370-hwmon) Add DT bindings for Synaptics AS370 PVT
hwmon: Add Synaptics AS370 PVT sensor driver
pmbus: (ibm-cffps) Add support for version 2 of the PSU
dt-bindings: hwmon: Document ibm,cffps2 compatible string
hwmon: (iio_hwmon) Enable power exporting from IIO
...
Pull RAS updates from Borislav Petkov:
"The latest meager RAS updates:
- Enable processing of action-optional MCEs which have the Overflow
bit set (Tony Luck)
- -Wmissing-prototypes warning fix and a build fix (Valdis
Klētnieks)"
* 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
RAS: Build debugfs.o only when enabled in Kconfig
RAS: Fix prototype warnings
x86/mce: Don't check for the overflow bit on action optional machine checks
so that the work can scale better.
* New driver for Mellanox' BlueField SoC DDR controller (Shravan Kumar Ramani)
* AMD Rome support in amd64_edac (Yazen Ghannam and Isaac Vaughn)
* Misc fixes, cleanups and code improvements
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAl17RrMACgkQEsHwGGHe
VUpt1g//WHs2FkGvwzHFmNHaUpATWLVKJ3azrNs+q1Av53xGngg/V8qTewwcQ1tx
OdgCqHj6PIMAoJbI2IIMIrjdMfM7EFXKgtk1kSut2uBowODkt29Ccj1ncdQ6uZOa
OSBIt7fXcsQQoX+0/SbutR3GB0gH6/rJQ+LFZix1g1o0pUfqgPGf1ypZ+gaSc8zr
bq+Ke8mXwaw13qy06eXAoOb32sAOfHqHjQUs53ecA+shmhua6AhRwuH+LcQyORoI
RdIKLIKb6yw/Vri3PdrokVKZo4OPa8hbdSlC9JPhZ3SfAMlmrDfr7OiVqneKfBJz
wRBfVVNNozbIHu5lv7ZxVaDAUh6VnWhhW036HxiMSG6NdjalVb9HB8xpKNbBlDxy
L7q0Y5CLEcRQpkmO/S0SK8KA4Vr8w8Vw/rYVRO9ypM6LEz+uoyMIZ5+mJjiCnjYo
sClPz5TqqgxCieId0tyAs+IZ1iXItRpEogBTXmvgIrrnWXkhQmo6Jhvd7VGDM6bT
3RwrkWXApzxdLQSv/JqRC7N8mdII0WwDI6AjBUoC7cOeBaMQcHrcD3sLYgjWL1Up
IQgSfHdR13S2p4Og1Phni/gSOnruCzCJQI1aCC8jjj92f1z8a/T0rjyMkE/qpZ+X
tPOqNGkXfw86LzBDFFIOtGI6v8fdVX+Di/pTQid5hm3YdPMe1D8=
=lEnD
-----END PGP SIGNATURE-----
Merge tag 'edac_for_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras
Pull EDAC updates from Borislav Petkov:
"The new thing this time around is that we have three maintainers now
and a new, old repo. New because it is new for the EDAC tree which is
hosted there from now on and old because it is Tony's and mine's old
RAS repo which we still use occasionally when the stuff isn't in tip.
Summary:
- EDAC tree has three maintainers and one new designated reviewer
now, so that the work can scale better.
- New driver for Mellanox' BlueField SoC DDR controller (Shravan
Kumar Ramani)
- AMD Rome support in amd64_edac (Yazen Ghannam and Isaac Vaughn)
- Misc fixes, cleanups and code improvements"
* tag 'edac_for_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
EDAC/amd64: Add PCI device IDs for family 17h, model 70h
MAINTAINERS: Add Robert as a EDAC reviewer
EDAC/mc_sysfs: Make debug messages consistent
EDAC/mc_sysfs: Remove pointless gotos
EDAC: Prefer 'unsigned int' to bare use of 'unsigned'
EDAC/amd64: Support asymmetric dual-rank DIMMs
EDAC/amd64: Cache secondary Chip Select registers
EDAC/amd64: Decode syndrome before translating address
EDAC/amd64: Find Chip Select memory size using Address Mask
EDAC/amd64: Initialize DIMM info for systems with more than two channels
EDAC/amd64: Recognize DRAM device type ECC capability
EDAC/amd64: Support more than two controllers for chip selects handling
EDAC/mc: Cleanup _edac_mc_free() code
EDAC, pnd2: Fix ioremap() size in dnv_rd_reg()
EDAC, mellanox: Add ECC support for BlueField DDR4
EDAC/altera: Use the proper type for the IRQ status bits
EDAC/mc: Fix grain_bits calculation
edac: altera: Move Stratix10 SDRAM ECC to peripheral
MAINTAINERS: update EDAC entry to reflect current tree and maintainers
-----BEGIN PGP SIGNATURE-----
iJYEABYIAD4WIQRE6pSOnaBC00OEHEIaerohdGur0gUCXW0lVyAcamFya2tvLnNh
a2tpbmVuQGxpbnV4LmludGVsLmNvbQAKCRAaerohdGur0sjdAQD3lpIS7YeT37Bu
QVdUkRObzkN3gWvv2oZkGXPg72843AD+KH0GL+M9SfBrYO/1StBJascarOHIIqUt
/1uqUgL7fAI=
=IV4V
-----END PGP SIGNATURE-----
Merge tag 'tpmdd-next-20190902' of git://git.infradead.org/users/jjs/linux-tpmdd
Pull tpm updates from Jarkko Sakkinen:
"A new driver for fTPM living inside ARM TEE was added this round.
In addition to that, there are three bug fixes and one clean up"
* tag 'tpmdd-next-20190902' of git://git.infradead.org/users/jjs/linux-tpmdd:
tpm/tpm_ftpm_tee: Document fTPM TEE driver
tpm/tpm_ftpm_tee: A driver for firmware TPM running inside TEE
tpm: Remove a deprecated comments about implicit sysfs locking
tpm_tis_core: Set TPM_CHIP_FLAG_IRQ before probing for interrupts
tpm_tis_core: Turn on the TPM before probing IRQ's
MAINTAINERS: fix style in KEYS-TRUSTED entry
Selecting the right parent for the main clock is done using only
main oscillator enabled bit.
In case we have this oscillator bypassed by an external signal (no driving
on the XOUT line), we still use external clock, but with BYPASS bit set.
So, in this case we must select the same parent as before.
Create a macro that will select the right parent considering both bits from
the MOR register.
Use this macro when looking for the right parent.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Link: https://lkml.kernel.org/r/1568042692-11784-2-git-send-email-eugen.hristev@microchip.com
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The regmap update bits call was not selecting the proper mask, considering
the bits which was updating.
Update the mask from call to also include OSCBYPASS.
Removed MOSCEN which was not updated.
Fixes: 1bdf02326b ("clk: at91: make use of syscon/regmap internally")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Link: https://lkml.kernel.org/r/1568042692-11784-1-git-send-email-eugen.hristev@microchip.com
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Ido Schimmel says:
====================
mlxsw: spectrum_buffers: Add the ability to query the CPU port's shared buffer
Shalom says:
While debugging packet loss towards the CPU, it is useful to be able to
query the CPU port's shared buffer quotas and occupancy.
Patch #1 prevents changing the CPU port's threshold and binding.
Patch #2 registers the CPU port with devlink.
Patch #3 adds the ability to query the CPU port's shared buffer quotas and
occupancy.
v3:
Patch #2:
* Remove unnecessary wrapping
v2:
Patch #1:
* s/0/MLXSW_PORT_CPU_PORT/
* Assign "mlxsw_sp->ports[MLXSW_PORT_CPU_PORT]" at the end of
mlxsw_sp_cpu_port_create() to avoid NULL assignment on error path
* Add common functions for mlxsw_core_port_init/fini()
Patch #2:
* Move "changing CPU port's threshold and binding" check to a separate
patch
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
While debugging packet loss towards the CPU, it is useful to be able to
query the CPU port's shared buffer quotas and occupancy.
Since the CPU port has no ingress buffers, all the shared buffers ingress
information will be cleared.
Signed-off-by: Shalom Toledo <shalomt@mellanox.com>
Acked-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Register CPU port with devlink.
Signed-off-by: Shalom Toledo <shalomt@mellanox.com>
Acked-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Next patch is going to register the CPU port with devlink, but only so
that the CPU port's shared buffer configuration and occupancy could be
queried.
Prevent changing CPU port's shared buffer threshold and binding
configuration.
Signed-off-by: Shalom Toledo <shalomt@mellanox.com>
Acked-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Arthur Kiyanovski says:
====================
net: ena: implement adaptive interrupt moderation using dim
In this patchset we replace our adaptive interrupt moderation
implementation with the dim library implementation.
The dim library showed great improvement in throughput, latency
and CPU usage in different scenarios on ARM CPUs.
This patchset also includes a few bug fixes to the parts of the
old implementation of adaptive interrupt moderation that were left.
Changes from V1 patchset:
Removed stray empty lines from patches 01/11, 09/11.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
ena_dev->intr_moder_rx/tx_interval save the intervals received from the
user after dividing them by ena_dev->intr_delay_resolution. Therefore
when intr_delay_resolution changes, the code needs to first mutiply
intr_moder_rx/tx_interval by the previous intr_delay_resolution to get
the value originally given by the user, and only then divide it by the
new intr_delay_resolution.
Current code does not first multiply intr_moder_rx/tx_interval by the old
intr_delay_resolution. This commit fixes it.
Also initialize ena_dev->intr_delay_resolution to be 1.
Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Nonadaptive interrupt moderation intervals are assigned the value set
by the user in ethtool -C divided by ena_dev->intr_delay_resolution.
Therefore when the user tries to get the nonadaptive interrupt moderation
intervals with ethtool -c the code needs to multiply the saved value
by ena_dev->intr_delay_resolution.
The current code erroneously divides instead of multiplying in ethtool -c.
This patch fixes this.
Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Current implementation always updates the interrupt register with
the smoothed_interval of the rx_ring. However this should be
done only in case of adaptive interrupt moderation. If non-adaptive
interrupt moderation is used, the non-adaptive interrupt moderation
interval should be used. This commit fixes that.
Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Remove previous implementation of adaptive rx interrupt moderation
from ena_com files.
Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Deleted unused 4 fields from struct ena_adapter and their only user
ena_restore_ethtool_params().
Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
1. Out of the fields {per_napi_bytes, per_napi_packets} in struct ena_ring,
only rx_ring->per_napi_packets are used to determine if napi did work
for dim.
This commit removes all other uses of these fields.
2. Remove ena_ring->moder_tbl_idx, which is not used by dim.
3. Remove all calls to ena_com_destroy_interrupt_moderation(), since all it
did was to destroy the interrupt moderation table, which is removed as
part of removing old interrupt moderation code.
Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Remove code duplication in:
ena_com_update_nonadaptive_moderation_interval_tx()
ena_com_update_nonadaptive_moderation_interval_rx()
functions.
Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add driver_supported_features to host_host info which is a new API used to
communicate to the device which features are supported by the driver.
Add the interrupt_moderation bit to host_info->driver_supported_features
and enable it to signal the device that this driver supports interrupt
moderation properly.
Reserved bits are for features implemented in the future
Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
1. Remove old adaptive interrupt moderation code from set/get_coalesce()
2. Add ena_update_rx_rings_intr_moderation() function for updating
nonadaptive interrupt moderation intervals similarly to
ena_update_tx_rings_intr_moderation().
3. Remove checks of multiple unsupported received interrupt coalescing
parameters. This makes code cleaner and cancels the need to update
it every time a new coalescing parameter is invented.
Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Use the dim library for the rx adaptive interrupt moderation implementation
Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add intr_moder_rx_interval to struct ena_com_dev and use it as the
location where the interrupt moderation rx interval is saved, instead
of the interrupt moderation table.
This is done as a first step before removing the old interrupt moderation
code.
Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Alexandru Ardelean says:
====================
ethtool: implement Energy Detect Powerdown support via phy-tunable
This changeset proposes a new control for PHY tunable to control Energy
Detect Power Down.
The `phy_tunable_id` has been named `ETHTOOL_PHY_EDPD` since it looks like
this feature is common across other PHYs (like EEE), and defining
`ETHTOOL_PHY_ENERGY_DETECT_POWER_DOWN` seems too long.
The way EDPD works, is that the RX block is put to a lower power mode,
except for link-pulse detection circuits. The TX block is also put to low
power mode, but the PHY wakes-up periodically to send link pulses, to avoid
lock-ups in case the other side is also in EDPD mode.
Currently, there are 2 PHY drivers that look like they could use this new
PHY tunable feature: the `adin` && `micrel` PHYs.
This series updates only the `adin` PHY driver to support this new feature,
as this chip has been tested. A change for `micrel` can be proposed after a
discussion of the PHY-tunable API is resolved.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
This driver becomes the first user of the kernel's `ETHTOOL_PHY_EDPD`
phy-tunable feature.
EDPD is also enabled by default on PHY config_init, but can be disabled via
the phy-tunable control.
When enabling EDPD, it's also a good idea (for the ADIN PHYs) to enable TX
periodic pulses, so that in case the other PHY is also on EDPD mode, there
is no lock-up situation where both sides are waiting for the other to
transmit.
Via the phy-tunable control, TX pulses can be disabled if specifying 0
`tx-interval` via ethtool.
The ADIN PHY supports only fixed 1 second intervals; they cannot be
configured. That is why the acceptable values are 1,
ETHTOOL_PHY_EDPD_DFLT_TX_MSECS and ETHTOOL_PHY_EDPD_NO_TX (which disables
TX pulses).
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
The `phy_tunable_id` has been named `ETHTOOL_PHY_EDPD` since it looks like
this feature is common across other PHYs (like EEE), and defining
`ETHTOOL_PHY_ENERGY_DETECT_POWER_DOWN` seems too long.
The way EDPD works, is that the RX block is put to a lower power mode,
except for link-pulse detection circuits. The TX block is also put to low
power mode, but the PHY wakes-up periodically to send link pulses, to avoid
lock-ups in case the other side is also in EDPD mode.
Currently, there are 2 PHY drivers that look like they could use this new
PHY tunable feature: the `adin` && `micrel` PHYs.
The ADIN's datasheet mentions that TX pulses are at intervals of 1 second
default each, and they can be disabled. For the Micrel KSZ9031 PHY, the
datasheet does not mention whether they can be disabled, but mentions that
they can modified.
The way this change is structured, is similar to the PHY tunable downshift
control:
* a `ETHTOOL_PHY_EDPD_DFLT_TX_MSECS` value is exposed to cover a default
TX interval; some PHYs could specify a certain value that makes sense
* `ETHTOOL_PHY_EDPD_NO_TX` would disable TX when EDPD is enabled
* `ETHTOOL_PHY_EDPD_DISABLE` will disable EDPD
As noted by the `ETHTOOL_PHY_EDPD_DFLT_TX_MSECS` the interval unit is 1
millisecond, which should cover a reasonable range of intervals:
- from 1 millisecond, which does not sound like much of a power-saver
- to ~65 seconds which is quite a lot to wait for a link to come up when
plugging a cable
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
When skb_shinfo(skb) is not able to cache extra fragment (that is,
skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS), xennet_fill_frags() assumes
the sk_buff_head list is already empty. As a result, cons is increased only
by 1 and returns to error handling path in xennet_poll().
However, if the sk_buff_head list is not empty, queue->rx.rsp_cons may be
set incorrectly. That is, queue->rx.rsp_cons would point to the rx ring
buffer entries whose queue->rx_skbs[i] and queue->grant_rx_ref[i] are
already cleared to NULL. This leads to NULL pointer access in the next
iteration to process rx ring buffer entries.
Below is how xennet_poll() does error handling. All remaining entries in
tmpq are accounted to queue->rx.rsp_cons without assuming how many
outstanding skbs are remained in the list.
985 static int xennet_poll(struct napi_struct *napi, int budget)
... ...
1032 if (unlikely(xennet_set_skb_gso(skb, gso))) {
1033 __skb_queue_head(&tmpq, skb);
1034 queue->rx.rsp_cons += skb_queue_len(&tmpq);
1035 goto err;
1036 }
It is better to always have the error handling in the same way.
Fixes: ad4f15dc2c ("xen/netfront: don't bug in case of too many frags")
Signed-off-by: Dongli Zhang <dongli.zhang@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The dev_kfree_skb() function performs also input parameter validation.
Thus the test around the shown calls is not needed.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Julian Wiedmann <jwi@linux.ibm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
There is a race condition that can occur when calling ena_down().
The ena_clean_tx_irq() - which is a part of the napi handler -
function might wake up the tx queue when the queue is supposed
to be down (during recovery or changing the size of the queues
for example) This causes the ena_start_xmit() function to trigger
and possibly try to access the destroyed queues.
The race is illustrated below:
Flow A: Flow B(napi handler)
ena_down()
netif_carrier_off()
netif_tx_disable()
ena_clean_tx_irq()
netif_tx_wake_queue()
ena_napi_disable_all()
ena_destroy_all_io_queues()
After these flows the tx queue is active and ena_start_xmit() accesses
the destroyed queue which leads to a kernel panic.
fixes: 1738cd3ed3 (net: ena: Add a driver for Amazon Elastic Network Adapters (ENA))
Signed-off-by: Sameeh Jubran <sameehj@amazon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Ido Schimmel says:
====================
drop_monitor: Better sanitize notified packets
When working in 'packet' mode, drop monitor generates a notification
with a potentially truncated payload of the dropped packet. The payload
is copied from the MAC header, but I forgot to check that the MAC header
was set, so do it now.
Patch #1 sets the offsets to the various protocol layers in netdevsim,
so that it will continue to work after the MAC header check is added to
drop monitor in patch #2.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
When working in 'packet' mode, drop monitor generates a notification
with a potentially truncated payload of the dropped packet. The payload
is copied from the MAC header, but I forgot to check that the MAC header
was set, so do it now.
Fixes: ca30707dee ("drop_monitor: Add packet alert mode")
Fixes: 5e58109b1e ("drop_monitor: Add support for packet alert mode for hardware drops")
Acked-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The driver periodically generates "trapped" UDP packets that it then
passes on to devlink. Set the offsets to the various protocol layers.
This is a prerequisite to the next patch, where drop monitor is taught
to check that the offset to the MAC header was set.
Acked-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Vladimir Oltean says:
====================
tc-taprio offload for SJA1105 DSA
This is the third attempt to submit the tc-taprio offload model for
inclusion in the networking tree. The sja1105 switch driver will provide
the first implementation of the offload. Only the bare minimum is added:
- The offload model and a DSA pass-through
- The hardware implementation
- The interaction with the netdev queues in the tagger code
- Documentation
What has been removed from previous attempts is support for
PTP-as-clocksource in sja1105, as well as configuring the traffic class
for management traffic. These will be added as soon as the offload
model is settled.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
While not an exhaustive usage tutorial, this describes the details
needed to build more complex scenarios.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Linus Torvalds