enable the runtime PM in fspi driver. Reading the power mode from the
debug monitor, FSPI_0 was on and with the patch it is lp.
Signed-off-by: Han Xu <han.xu@nxp.com>
In commit 4d370a1036 ("crypto: caam - change return code in caam_jr_enqueue function"),
the return code of caam_jr_enqueue function was changed
from 0 to -EINPROGRESS, in case of success, -ENOSPC in case
the CAAM is busy (has no space left in job ring queue),
-EIO if it cannot map the caller's descriptor.
Update the case for exiting from sm_key_job based on
the new return code from caam_jr_enqueue function.
Fixes: 4d370a1036 ("crypto: caam - change return code in caam_jr_enqueue function")
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
In commit 4d370a1036 ("crypto: caam - change return code in caam_jr_enqueue function"),
the return code of caam_jr_enqueue function was changed
from 0 to -EINPROGRESS, in case of success, -ENOSPC in case
the CAAM is busy (has no space left in job ring queue),
-EIO if it cannot map the caller's descriptor.
Update the case for break from the loop of caam_dma_prep_memcpy
based on the new return code from caam_jr_enqueue function.
Fixes: 4d370a1036 ("crypto: caam - change return code in caam_jr_enqueue function")
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
In commit 4d370a1036 ("crypto: caam - change return code in caam_jr_enqueue function"),
the return code of caam_jr_enqueue function was changed
from 0 to -EINPROGRESS, in case of success, -ENOSPC in case
the CAAM is busy (has no space left in job ring queue),
-EIO if it cannot map the caller's descriptor.
Update the case for wait_for_completion in sk_job_submit
based on the new return code from caam_jr_enqueue function.
Fixes: 4d370a1036 ("crypto: caam - change return code in caam_jr_enqueue function")
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
The temperature value passed from SCU could be negative value,
the data type should be signed instead of unsigned.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
The scatter buffer list support earlies for DEV_VER_V2 is not
good enough, software can't know short transfer well per
transfer. So, we only support sg for DEV_VER_V2.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
For short transfer, every TRB was finished in TD according to DMA pointer,
but the Transfer Length for TRBs which were not handled were not updated,
so we can't calculte these TRBs.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
We need to dump all TRBs for this transfer, but ont only the last one.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
For sg buffer list use case, we need to add ISP for each TRB, and
add CHAIN bit for each TRB except for the last TRB.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
TDL is for TD length, so we need to calculate this value per
TD, but not for TRB, and the TDL is only needed for the first
TRB in TD.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Due to 8MQ/MM IOMUX specifics for DSD stereo case the audio
data is routed via DATA0 and DATA4 SAI1 signals, thus a
specific channel map is required for DSD stereo case. For
8MP there is no need for a such specific case, so remove it.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
The phy registers are accessible after APB clock is enabled,
otherwise, the system may hang. We see the system hang issue
at the driver resume stage due to the disabled APB clock.
This patch fixes this issue by enabling/disabling the clock
when necessary.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds APB clock related properties in lvds phy node,
so that the driver may get and control the APB clock.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The phy registers are accessible after APB clock is enabled.
So, add the relevant clock properties in device tree doc.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The power domain for clocks is not needed by audio drivers, which
is handled by clock driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Support pm runtime, that power domain of ACM can
enter suspend.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Support pm runtime, that power domain of ACM can
enter suspend.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Support pm runtime, that power domain of ACM can
enter suspend.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Add some common code for handling multi power domain
to an utils file, that can share between 8qxp/8qm/8dxl.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The call flow:
devm_regmap_init_mmio_clk
- clk_prepare()
- clk_pm_runtime_get()
Cause the power domain of lpcg clock always be enabled.
which impact the power consumption.
So we can't bind clock with regmap, then explicitly enable
clock when using. As we already enable all clock in
pm_runtime_resume, so only need to enable clock in probe.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The call flow:
devm_regmap_init_mmio_clk
- clk_prepare()
- clk_pm_runtime_get()
Cause the power domain of lpcg clock always be enabled.
which impact the power consumption.
So we can't bind clock with regmap, then explicitly enable
clock when using. As we already enable all clock in
pm_runtime_resume, so only need to enable clock in probe.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The call flow:
devm_regmap_init_mmio_clk
- clk_prepare()
- clk_pm_runtime_get()
Cause the power domain of lpcg clock always be enabled.
which impact the power consumption.
So we can't bind clock with regmap, then explicitly enable
clock when using. As we already enable all clock in
pm_runtime_resume, so only need to enable clock in probe.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The call flow:
devm_regmap_init_mmio_clk
- clk_prepare()
- clk_pm_runtime_get()
Cause the power domain of lpcg clock always be enabled.
which impact the power consumption.
So we can't bind clock with regmap, then explicitly enable
clock when using. As we already enable all clock in
pm_runtime_resume, so only need to enable clock in probe.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The call flow:
devm_regmap_init_mmio_clk
- clk_prepare()
- clk_pm_runtime_get()
Cause the power domain of lpcg clock always be enabled.
which impact the power consumption.
So we can't bind clock with regmap, then explicitly enable
clock when using. As we already enable all clock in
pm_runtime_resume, so only need to enable clock in probe.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The attached multi power domain is enabled by device_link_add
So we need to disable them in probe, otherwise it may impact
the power consumption.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
This reverts commit 62e2861cf0.
The power domain of clock should be controlled by clock driver,
We don't need to control it in audio driver, so we don't
need to support multi power domain in audio driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
This reverts commit bd7b26036e.
The power domain of clock should be controlled by clock driver,
We don't need to control it in audio driver, so we don't
need to support multi power domain in audio driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
This reverts commit 442ad6fd0c.
The power domain of clock should be controlled by clock driver,
We don't need to control it in audio driver, so we don't
need to support multi power domain in audio driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
This reverts commit 4058ef0bb8.
The power domain of clock should be controlled by clock driver,
We don't need to control it in audio driver, so we don't
need to support multi power domain in audio driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
This reverts commit 53915e7ea9.
The power domain of clock should be controlled by clock driver,
We don't need to control it in audio driver, so we don't
need to support multi power domain in audio driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The HSIOMIX domain need to be on if usb wakeup is enabled for system
wakeup source, so add the 'active-wakeup' property for this domain.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Add the active wakeup flag if a power domain has such requirement.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Add power domain property for vpu node to enable power domain
off when module entering runtime PM.
BuildInfo:
- ATF 13de44f73
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Zhou Peng <eagle.zhou@nxp.com>
SOFITPSYNC
If this bit is set to '0' operating in host mode, the core keeps the
UTMI/ULPI PHY on the first port in a non-suspended state whenever there
is a SuperSpeed port that is not in Rx.Detect, SS.Disable and U3.
If this bit is set to '1' operating in host mode, the core keeps the
UTMI/ULPI PHY on the first port in a non-suspended state whenever the
other non-SuperSpeed ports are not in a suspended state. This feature is
useful because it saves power by suspending UTMI/ULPI when SuperSpeed
only is active, and it helps resolve when the PHY does not transmit a
host resume unless it is placed in suspend state. This bit must be
programmed as a part of initialization at power-on reset, and must not
be dynamically changed afterwards.
with this property specified, this bit is set to be 1.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
On some platforms, if the ITP counter clock is from utmi_clk, and
the usb2 suspended firstly, then the ITP clock will miss, to resolve
this, we can use soft ITP sync to make dwc3 core use ref_clk for ITP
counter.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Disable busfreq node for AB2 as currently it is
causing "underrun" errors.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
We need clear any fault alerts to make tcpci controller to recover
from fault.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Enable ISI m2m feature for i.MX865. For i.MX8QXP and QM, ISI
use port 5 as image source port from memory, but for i.MX865,
it change to port 2, so add this info as platform data and
configure image source port selection according to the data.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
As role switch class does not use otg irq like edev, so don't
do free irq for it.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit fd263a3edd95dfe812397fabf1059b5f99bba2ab)
As driver removal will do clocks disable, we don't need runtime
suspend to disable clocks, so keep runtime resume when driver
remove.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit 24b9a59b32127af6e217e56490d643f39ca6ff60)
If we're in the middle of series of chained TRBs and we
receive a short transfer along the way, DWC3 will skip
through all TRBs including the last TRB in the chain, DWC3
will avoid clearing HWO bit and SW has to do it manually.
but currect code can't hit the condition when loop sgs of
request in dwc3_gadget_ep_reclaim_trb_sg() if short packet
received for one chained trb, because it only check the HWO
bit of all trbs and then break if it's 1, so the remain trbs
has no chance to be handled by dwc3_gadget_ep_reclaim_completed_trb(),
this patch adds a flag if received a short packet in a chained
trb, and let dwc3_gadget_ep_reclaim_trb_sg() continue handle
all trbs and give back to function driver.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Enabled the usbotg ports on imx8qxp lpddr4 val board for uuu download
NAND image.
Signed-off-by: Han Xu <han.xu@nxp.com>
Reviewed-by: Frank Li <frank.li@nxp.com>
8DXL have a different IRQ mapping compare to
8QM and 8QxP.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Han Xu