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3 Commits (96291d565550c1fd363e488cc17cb3189d2e4cc2)

Author SHA1 Message Date
Bjorn Helgaas 96291d5655 PCI: Fix typos and whitespace errors 
Fix various typos and whitespace errors:

  s/Synopsis/Synopsys/
  s/Designware/DesignWare/
  s/Keystine/Keystone/
  s/gpio/GPIO/
  s/pcie/PCIe/
  s/phy/PHY/
  s/confgiruation/configuration/

No functional change intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
 2017-09-01 16:35:50 -05:00
Bharat Kumar Gogada 9cbbae2a62 PCI: Xilinx NWL PCIe: Updating device tree documentation with prefetchable memory space 
Updating device tree documentation with prefetchable memory
sapce.
Configuration space shifted to 64-bit address space.

Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
 2016-08-30 17:07:47 -05:00
Bharat Kumar Gogada ab597d35ef PCI: xilinx-nwl: Add support for Xilinx NWL PCIe Host Controller 
Add PCIe Root Port driver for Xilinx PCIe NWL bridge IP.

[bhelgaas: wait for link like dw_pcie_wait_for_link(), simplify bitmap
error path, typos, whitespace, fold in Dan Carpenter's PTR_ERR() fix]
Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
 2016-03-11 12:42:31 -06:00