Fix the following warning:
crypto/testmgr.c: In function ‘__test_tls’:
crypto/testmgr.c:2648:12: warning: logical not is only applied to the left hand side of comparison [-Wlogical-not-parentheses]
if (!ret == template[i].fail) {
^~
Fixes: 8abdaaeda43 ("crypto: add support for TLS 1.0 record encryption")
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Valentin Ciocoi R?dulescu <valentin.ciocoi@nxp.com>
Before fixed codec name cs42888, now also support wm8960 codec,
thus add to choose set codec name depend on enabled codec.
Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
Add property audio-interface for set sai or esai.
Add imx8mp-evk-dsp.dts for supporting cplay in mp board.
Signed-off-by: Zhang Peng <peng_zhang_8@nxp.com>
Fix the following warning:
drivers/clk/imx/clk-imx8mn.c: In function 'imx8mn_clocks_probe':
drivers/clk/imx/clk-imx8mn.c:609:29: warning: assignment from incompatible pointer type
clks[IMX8MN_CLK_SNVS_ROOT] = imx_clk_hw_gate4("snvs_root_clk", "ipg_root", base + 0x4470, 0);
^
Fixes: d6f385583c ("clk: imx8mn: add SNVS clock to clock tree")
Reported-by: Anthony Toubeau <anthony.toubeau@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
i.mx8mn has support for clock gating the snvs module.
Add it into clock tree so that rtc-snvs driver could use it.
Note this will also be required in the snvs_pwrkey driver,
once support for clock management will be added.
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
(cherry picked from commit 16e71d4da7)
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com>
We need request high bus for USB data transfer, add it in runtime
PM.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
There are 2 configurable options for eARC RX fallback
to ARC mode: "ARC single ended" or "ARC common".
Add amixer control in order to allow setting it
from userspace.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Sample bits constraint is meaningless given that the only
supported format is SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
For IEC958 kcontrol type amixer tool returns just first 4 bytes,
add a byte array control so that we'll be able to see all 24 bytes
by using amixer.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
CS_DATA registers are supposed to be used by M0+
core, according to block guide host core must read
channel status structure from data memory.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
increase the resolution limitation from 1920x1080 to 1920x1920
I have submitted the patch on branch 4.19.y
I don't know why branch 5.4 doesn't include this patch
so I submit it again
Signed-off-by: Ming Qian <ming.qian@nxp.com>
We enable TDC feature in flexcan_set_bittiming when loopback off, but
disable it by mistake after calling flexcan_set_bittiming.
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
This is a temporary workround for the case when:
-SWIOTLB is used for DMA bounce buffering AND
-data to be DMA-ed is mapped DMA_FROM_DEVICE and device only partially
overwrites the "original" data AND
-it's expected that the "original" data that was not overwritten
by the device to be untouched
As discussed in upstream, the proper fix should be:
-either an extension of the DMA API OR
-a workaround in the device driver (considering these cases are rarely
met in practice)
Since both alternatives are not trivial (to say the least),
add a workaround for the few cases matching the error conditions
listed above.
Link: https://lore.kernel.org/lkml/VI1PR0402MB348537CB86926B3E6D1DBE0A98070@VI1PR0402MB3485.eurprd04.prod.outlook.com/
Link: https://lore.kernel.org/lkml/20190522072018.10660-1-horia.geanta@nxp.com/
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Valentin Ciocoi Radulescu <valentin.ciocoi@nxp.com>
Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com>
According to IC engineer suggestion, set ssc_range as -4003 ppm
will have more tolerence for EMI, and suitable for more boards.
Besides, one customer board needs to set this value to pass TX
SSC test.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit a48a65a40113b9b5d40114d02a5877d089f523a9)
As we use core_inited for handling device mode pm, so we can
use it to better check if we can do run stop now, this is needed
if dwc->dev is runtime suspended before system sleep, after system
resume by usb, we need resume gadget by system resume without
runtime resume happened, see below sequence:
1. dwc3 core runtime suspended
2. system suspend: core suspend
3. system resume: core resume -> pm_runtime_set_active()
Then core runtime resume no chance to be called,
because current condition check:
if (pm_runtime_suspended())
return;
run_stop can't be enabled.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
As we have to clear wakeup irq until system pm resume, to avoid
frequently entering irq handler when usb wakeup system, disable
irq and enable it after wakeup irq is cleared.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
No function change, change dwc to be dwc_imx to keep consistent
for read.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Align the role check condition with threaded irq handler, with
dual role switch it's possible dwc->xhci is the previous host
but current role is device.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
This is to resolve the problem of wakeup system by USB3 device
insertion if hsiomix on, in that case, the USB3 device detects
rx term on so doesn't donwgrade to USB2, so DP/DM wakeup can't
happen, with this override bit we can force the rx term off when
enters system suspend, and disable the override after system resume.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
For dwc3-imx8mp, the clock for its power domain hsiomix has
to be handled by user, so add the hsio root clock to dwc3 imx8mp
binding doc.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
As now we have 3 clocks to handle, it may deserve to use bulk
clk API to handle them, the new added clk is hsio root, this clock
actually belongs to hsiomix, which used to control the power domain
of USB and PCIE, currently we set it to be always on in dts by adding
it to init-on-array of clk node, after PCIE also can handle this clock
in its driver like USB, we can remove that clk from init-on-array.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Currently hsio root clock is always on, which should be handled
by hsiomix power domain driver but there is problem on doing that,
see commit 5aaceda10a ("MLK-23671-02 arm64: dts: imx8mp: Add the
rpm-always-on flag for hsiomix domain"):
"The hsiomix power domain need to be runtime always-on to maintain USB's
wakeup ability. As this domain need to be boot on by default, no one
will call the power on callback during system boot up, the clock
enable/disable will mismatch, so remove the clocks from this domain.
the necessary clocks will be handled in TF-A."
There is one clock(AXI_DIV) shared between hsiomix and USB, with
rpm-always-on property added, like above commit description, power
domain driver will not do enable/disable and think it's always on, but
it can be disabled by USB driver, afterwards if power domain driver does
hsiomix register access, system will hang because the required clock was
disabled.
Now with above commit and change in TF-A, those clocks are not
controlled by Linux for power domain operations, but user driver(i.e. USB
and PCIE) has to handle it.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
USB controller isolation is controlled by hsiomix power domain,
instead of usb_otg1_pd and usb_otg2_pd, those 2 power domains are
for USB PHY isolation and in our case, PHY is power is kept always
on(but can be suspended).
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
As there is an IC issue on rx idle signal isolation value, to avoid
unexpected wakeup event if hsiomix off + u3 wakeup enable, we have
below assumptions:
1. hsiomix power domain will be always on at runtime runtime.
2. if usb is enabled as system wakeup source, hsiomix will be on while
system sleep.
So we keep u3 wakeup enable at runtime for simple, and disable u3 wakeup
if usb is not the system wakeup source when sleep.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
If hsiomix power domain is off, we can't access its register in
wakeup event irq as power domain may still be off, so remove the
wakeup irq disable in irq handler and let resume handle this.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
In case dwc3 is configured to be single role, we need to do the post
role set after dwc3 core probe.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
The DRD module calls dwc3_set_mode() on role switches, i.e. when a device is
being plugged in. In order to support continuous runtime power management when
plugging in / unplugging a cable, we need to call pm_runtime_get_sync() in
this path.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Li Jun <jun.li@nxp.com>
In case system resume by device mode event(e.g, VBUS), runtime resume
will happen before system resume, to avoid doing device mode resume
again when system resume, add a core init flag.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
1. add i2c-rpmsg support for i2c3
2. reserve memory for LPA, for the accessable memory
of m7: 0x40000000-0xbfffffff.
3. support LPA, playback only
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
in i.MX8MP, the audio codec is registered by DT, and we reserve
a memory in DT that we can allocate dma memory from the
reserved pool.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
rpmsg wm8960 also can be registered as an i2c device.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
in i.MX8MP, the audio codec is registered by DT. So we add
a new flag: codec_in_dt
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Replace imx_clk_mux with imx_dev_clk_mux, otherwise the core->rpm_enabled
is false, that pm runtime is not actually enabled for acm clock.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Replace imx_clk_mux with imx_dev_clk_mux, otherwise the core->rpm_enabled
is false, that pm runtime is not actually enabled for acm clock.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Replace imx_clk_mux with imx_dev_clk_mux, otherwise the core->rpm_enabled
is false, that pm runtime is not actually enabled for acm clock.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Clock order in imx8qxp_clk_scu_rsrc_table table should follow the
order in dt-bindings/firmware/imx/rsrc.h file, otherwise, it will
fail when clock register
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Add two ov5640 support for iMX8DX platform. One work at DVP mode,
the other work at MIPI mode.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
USBOTG2 PHY's output name should be PHY ipg clock, but not controller
ahb clock, it is aligned with USBOTG1 PHY's output clock.
Signed-off-by: Peter Chen <peter.chen@nxp.com>