clk: qcom: ipq806x: Fix board clk rates
commitsteinar/wifi_calib_4_9_kernelcbf2e548ca
upstream. The clocks on these boards run at 25 MHz, not 19.2 and 27 like other platforms. Unfortunately I copy/pasted from other similar SoCs but forgot this one is different. Fix it. Fixes:a085f877a8
("clk: qcom: Move cxo/pxo/xo into dt files") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
parent
447433e5f8
commit
e3b665ef41
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@ -2990,11 +2990,11 @@ static int gcc_ipq806x_probe(struct platform_device *pdev)
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struct regmap *regmap;
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int ret;
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ret = qcom_cc_register_board_clk(dev, "cxo_board", "cxo", 19200000);
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ret = qcom_cc_register_board_clk(dev, "cxo_board", "cxo", 25000000);
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if (ret)
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return ret;
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ret = qcom_cc_register_board_clk(dev, "pxo_board", "pxo", 27000000);
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ret = qcom_cc_register_board_clk(dev, "pxo_board", "pxo", 25000000);
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if (ret)
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return ret;
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