iMX8MM DDR3L validation board uses GD25LQ16 as spi-nor chip, but its
id is incorrect in ids table, so add a new id and parameters with the
same name into the ids table. For the same name of the chip info, the
log following we can ignore.
LOG: m25p80 spi0.0: found gd25q16, expected gd25q16
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Flexspi registers cannot be reset to default value, reset all FLASHxCR2
registers to 0 to avoid read data with invalid LUT commands.
Signed-off-by: Han Xu <han.xu@nxp.com>
for 6UL/7D, the TDH bit should only be set when DDR mode enabled. This
bit cannot be cleared during module reset, so check this bit in
nor_setup to make sure it cleard and won't affect the following
operations.
Signed-off-by: Han Xu <han.xu@nxp.com>
runtime pm suspend should be called in error path during fsl-quadspi
driver probe. change the code to handle it properly.
Add one more hwcaps SNOR_HWCAPS_READ_1_1_4 for the Spansion QSPI nor
s25fl128s since it only indicate this mode as the best performance mode
in SFDP table.
Signed-off-by: Han Xu <han.xu@nxp.com>
move the runtime pm get/put functions from nor_setup/nor_setup_last to
probe function to avoid runtime pm re-entrance issue.
Signed-off-by: Han Xu <han.xu@nxp.com>
Enabled the FlexSPI Octal DDR read for QXP, since all parameters for
this mode cannot be read from SFDP table, set the related parameters in
spi_nor_init_params.
Signed-off-by: Han Xu <han.xu@nxp.com>
re-init the flexspi controller after suspend/resume.
runtime resume will re-init the controller, Once the it was initialized
and need to be re-init(determined by read specific register bit).
Signed-off-by: Han Xu <han.xu@nxp.com>
(cherry picked from commit fbc92b8524fde7cc048d4ccf603266e1b5e8734c)
i.MX8MM MEK only supports Quad mode for flexspi nor, enable the quad ddr
mode for better performance.
Signed-off-by: Han Xu <han.xu@nxp.com>
(cherry picked from commit a0abea8ca8d493fc2861c84f1475c0eb388899ce)
enabled runtime pm for flexspi, also removed the redundant clock.
Tested with the latest SCFW and ATF.
BuildInfo:
- SCFW 15d20cde, IMX-MKIMAGE ff9860c5, ATF
- U-Boot 2017.03-00003-gd09f5db
Signed-off-by: Han Xu <han.xu@nxp.com>
(cherry picked from commit 138fd5bb66dde0c1d391d5cff3ed5ef40ed3a212)
FLEXSPI AHBCR register has one bit READADDROPT, which defined if start
address must be aligned when doing wordaddress access. This bit must be
set (no alignment limitation), otherwise controller may always try
to access from even address and got wrong data when AHB read data under
Octal DDR mode. Mounting UBIFS failed in this case since it read from
odd address.
[ 250.367893] fsl_fspi_read: from 620ad1, len: 11
[ 250.374700] UBIFS error (ubi0:0 pid 2871): check_lpt_type: invalid
type (4) in LPT node type 2
[ 250.383326] CPU: 0 PID: 2871 Comm: mount Not tainted
4.9.11-03067-gd6ce90a-dirty #251
[ 250.391156] Hardware name: Freescale i.MX8QM ARM2 (DT)
[ 250.396291] Call trace:
[ 250.398739] [<ffff0000080882bc>] dump_backtrace+0x0/0x1e0
[ 250.404139] [<ffff0000080884b0>] show_stack+0x14/0x1c
[ 250.409198] [<ffff0000083b3798>] dump_stack+0x8c/0xac
[ 250.414251] [<ffff00000833c434>] check_lpt_type+0x80/0x88
[ 250.419654] [<ffff00000833eb74>] ubifs_lpt_init+0x448/0x8a4
[ 250.425222] [<ffff000008325a38>] ubifs_mount+0xde0/0x198c
[ 250.430620] [<ffff0000081db2e0>] mount_fs+0x3c/0x15c
[ 250.435589] [<ffff0000081f7070>] vfs_kern_mount+0x4c/0x11c
[ 250.441077] [<ffff0000081fa26c>] do_mount+0x1b8/0xb5c
[ 250.446125] [<ffff0000081faf3c>] SyS_mount+0x78/0xd8
[ 250.451085] [<ffff000008082f4c>] __sys_trace_return+0x0/0x4
[ 250.456787] ---lpt_init_rd
[ 250.459530] UBIFS (ubi0:0): background thread "ubifs_bgt0_0" stops
Signed-off-by: Han Xu <han.xu@nxp.com>
(cherry picked from commit deb1c43df234484e02f6eac758e78d2488bdd841)
-
ARM64 platforms may access FSPI from non-64-bit-aligned address which
causes unalignment fault. Fixed the issue for AHB reading.
Signed-off-by: Han Xu <han.xu@nxp.com>
(cherry picked from commit 948c1411230d5e02235fbd429d6ee2e2a2b9adb6)
Some MICRON related macros in spi-nor domain were ST, actually. We
need to add the REAL micron defination in header/source files for
mt35xu512aba Micron Octal Nor chip.
Signed-off-by: Han Xu <han.xu@nxp.com>
Enhanced spi-nor framework to support octal read mode
Signed-off-by: Han Xu <han.xu@nxp.com>
Acked-by: Frank Li <frank.li@nxp.com>
(cherry picked from commit 95d0d54019ec291bf5430090dccb6dd66ea87de7)
support the flexspi nor controller for i.MX8 platforms, read data
in octal ddr mode by default.
Signed-off-by: Han Xu <han.xu@nxp.com>
Acked-by: Frank Li <frank.li@nxp.com>
(cherry picked from commit fba18ad064211c8612563edb4cd7ef63706cedba)
To fix the i.MX6SX probe second chip error issue, add a dedicate AHB
read lut entry, The patch also remove the read length parameter for lut
preparation, which can be ignored.
For the MICRON DDR read, constrain the dummy to up to 8 clock cycles.
Signed-off-by: Han Xu <han.xu@nxp.com>
Enable the DDR mode with for SFDP. The code mapped the STR cmd to DTR
cmd and en/disable DDR module according to protocol type.
Signed-off-by: Han Xu <han.xu@nxp.com>
ARM64 platforms may access QSPI from non-64-bit-aligned address which
causes unalignment fault. Fixed the issue for AHB reading.
Signed-off-by: Han Xu <han.xu@nxp.com>
QSPI only support upto 16 LUT slots while the QSPI commands are more
than this number, reserve the last two slots for dynamic change (most
commands used in pairs). Later all extra supported commands will be add
in dynamic lut table.
Signed-off-by: Han Xu <han.xu@nxp.com>
support QSPI on i.MX6ULL. By default, only QSPI1 was enabled, while
reworked board could support all 4 QSPI chips.
Since i.MX6UL and i.MX6ULL QSPI controller are identical, reuse the
i.MX6UL datatype for i.MX6ULL.
Signed-off-by: Han Xu <han.xu@nxp.com>
The LPSR turns off the power for IOMUX when suspending so restore the
IOMUX when resuming.
Signed-off-by: Han Xu <b45815@freescale.com>
(cherry picked from commit 906d0c1381e865dc7c96a4bde6fe694f1ce089a9)
the obsolete bit DDR_EN on 6UL and 7D should be clear in case other
program set the bit and cause qspi probe fail.
Signed-off-by: Han Xu <b45815@freescale.com>
(cherry picked from commit d8b51cc358780f68e732522ee9bd6bd578dd6771)
commit 47016b341f upstream.
The current Cadence QSPI driver caused a kernel panic when loading
a Root Filesystem from QSPI. The problem was caused by reading more
bytes than needed because the QSPI operated on 4 bytes at a time.
<snip>
[ 7.947754] spi_nor_read[1048]:from 0x037cad74, len 1 [bfe07fff]
[ 7.956247] cqspi_read[910]:offset 0x58502516, buffer=bfe07fff
[ 7.956247]
[ 7.966046] Unable to handle kernel paging request at virtual
address bfe08002
[ 7.973239] pgd = eebfc000
[ 7.975931] [bfe08002] *pgd=2fffb811, *pte=00000000, *ppte=00000000
</snip>
Notice above how only 1 byte needed to be read but by reading 4 bytes
into the end of a mapped page, an unrecoverable page fault occurred.
This patch uses a temporary buffer to hold the 4 bytes read and then
copies only the bytes required into the buffer. A min() function is
used to limit the length to prevent buffer overflows.
Request testing of this patch on other platforms. This was tested
on the Intel Arria10 SoCFPGA DevKit.
Fixes: 0cf1725676 ("mtd: spi-nor: cqspi: Fix build on arches missing readsl/writesl")
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Cc: <stable@vger.kernel.org>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit 05521bd3d1 ]
With gcc 4.1.2:
drivers/mtd/spi-nor/stm32-quadspi.c: In function ‘stm32_qspi_tx_poll’:
drivers/mtd/spi-nor/stm32-quadspi.c:230: warning: ‘ret’ may be used uninitialized in this function
Indeed, if stm32_qspi_cmd.len is zero, ret will be uninitialized.
This length is passed from outside the driver using the
spi_nor.{read,write}{,_reg}() callbacks.
Several functions in drivers/mtd/spi-nor/spi-nor.c (e.g. write_enable(),
write_disable(), and erase_chip()) call spi_nor.write_reg() with a zero
length.
Fix this by returning an explicit zero on success.
Fixes: 0d43d7ab27 ("mtd: spi-nor: add driver for STM32 quad spi flash controller")
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 9d63f17661 upstream.
There are two bugs in current intel_spi_sw_cycle():
- The 'data byte count' field should be the number of bytes
transferred minus 1
- SSFSTS_CTL is the offset from ispi->sregs, not ispi->base
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
spi_nor_read_sfdp() calls nor->read() to read the SFDP data.
When the m25p80 driver is used (pretty common case), nor->read() is then
implemented by the m25p80_read() function, which is likely to initialize a
'struct spi_transfer' from its buf argument before appending this
structure inside the 'struct spi_message' argument of spi_sync().
Besides the SPI sub-system states that both .tx_buf and .rx_buf members of
'struct spi_transfer' must point into dma-safe memory. However, two of the
three calls of spi_nor_read_sfdp() were given pointers to stack allocated
memory as buf argument, hence not in a dma-safe area.
Hopefully, the third and last call of spi_nor_read_sfdp() was already
given a kmalloc'ed buffer argument, hence dma-safe.
So this patch fixes this issue by introducing a
spi_nor_read_sfdp_dma_unsafe() function which simply wraps the existing
spi_nor_read_sfdp() function and uses some kmalloc'ed memory as a bounce
buffer.
Fixes: f384b352cb ("mtd: spi-nor: parse Serial Flash Discoverable Parameters (SFDP) tables")
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
One field of the flash parameter table contains information about the
flash device size.
Most of the time the data extracted from this field is valid, but
sometimes the BFPT section of the SFDP table is corrupted or invalid and
this field is set to 0xffffffff, thus resulting in an integer overflow
when setting params->size.
Since NOR devices are anayway always smaller than 2^64 bytes, we can
easily stop the BFPT parsing if the size reported in this table is
invalid.
Fixes: f384b352cb ("mtd: spi-nor: parse Serial Flash Discoverable Parameters (SFDP) tables")
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.com>
- add support to the JEDEC JESD216B specification (SFDP tables).
- add support to the Intel Denverton SPI flash controller.
- fix error recovery for Spansion/Cypress SPI NOR memories.
- fix 4-byte address management for the Aspeed SPI controller.
- add support to some Microchip SST26 memory parts
- remove unneeded pinctrl header
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Merge tag 'spi-nor/for-4.14' of git://git.infradead.org/l2-mtd into mtd/next
From Cyrille:
"
This pull request contains the following notable changes:
- add support to the JEDEC JESD216B specification (SFDP tables).
- add support to the Intel Denverton SPI flash controller.
- fix error recovery for Spansion/Cypress SPI NOR memories.
- fix 4-byte address management for the Aspeed SPI controller.
- add support to some Microchip SST26 memory parts
- remove unneeded pinctrl header
"
Now that we have a custom printf format specifier, convert users of
full_name to use %pOF instead. This is preparation to remove storing
of the full path string for each node.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Cc: linux-mtd@lists.infradead.org
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Add a newline to the end of drivers/spi-nor/Makefile to get rid the message,
"No newline at end of file", produced by git. This fix will allow subsequent
changes to the file to be able to produce clean patches.
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
The driver made the wrong assumption that the 4B setting was
autodetected for all chips of the AST2500 FMC flash controller. This
is only the case for the CS0.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
There is no need to include <linux/pinctrl/consumer.h> as no pinctrl
function is used in this driver, so just remove it.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
There is no need to include <linux/pinctrl/consumer.h> as no pinctrl
function is used in this driver, so just remove it.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
S25FL{128|256|512}S datasheets say:
"When P_ERR or E_ERR bits are set to one, the WIP bit will remain set to
one indicating the device remains busy and unable to receive new operation
commands. A Clear Status Register (CLSR) command must be received to return
the device to standby mode."
Current spi-nor code works until first error occurs, but write/erase errors
are not just rare hardware failures, they also occur if user tries to flash
write-protected areas. After such attempt no SPI command can be executed
any more and even read fails. This patch adds support for P_ERR and E_ERR
bits in Status Register 1 (so that operation fails immediately and not
after a long timeout) and proper recovery from the error condition.
Tested on Spansion S25FS128S, which is supported by S25FL129P entry.
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Intel Denverton exposes the SPI serial flash controller as a PCI device
instead of being part of the LPC chip as previous generations did.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@free-electrons.com>
This patch adds support to the JESD216 rev B standard and parses the SFDP
tables to dynamically initialize the 'struct spi_nor_flash_parameter'.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
The variable was already marked 'const' before the previous
patch, but the qualifier was in an unusual place, and now the
extra 'const' causes a harmless warning:
drivers/mtd/spi-nor/cadence-quadspi.c:1286:34: error: duplicate 'const' declaration specifier [-Werror=duplicate-decl-specifier]
This removes the other 'const' instead.
Fixes: f993c123b4 ("mtd: spi-nor: cqspi: make of_device_ids const")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Clark Wang