1
0
Fork 0
Commit Graph

9284 Commits (b8218a9146814ad1dba0c21facddce9adca680ef)

Author SHA1 Message Date
Dinh Nguyen 4baca92001 arm: socfpga: Update iomux and pll for c5 socdk RevE
Update the pinmux and pll configuration for the Cyclone5 RevE or later devkit.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-05-10 23:32:42 +02:00
Robert P. J. Day 1cc0a9f496 Fix various typos, scattered over the code.
Spelling corrections for (among other things):

* environment
* override
* variable
* ftd (should be "fdt", for flattened device tree)
* embedded
* FTDI
* emulation
* controller
2016-05-05 21:39:26 -04:00
Stephen Warren bbca7108db ARM: tegra: import latest Jetson TK1 spreadsheet
This imports v11 of "Jetson TK1 Development Platform Pin Mux" from
https://developer.nvidia.com/embedded/downloads.

The new version defines the mux option for the MIPI pad ctrl selection.
The OWR pin no longer has an entry in the configuration table because
the only mux option it support is OWR, that feature isn't supported, and
hence can't conflict with any other pin. This pin can only usefully be
used as a GPIO.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-05-04 13:31:04 -07:00
Vagrant Cascadian eae4b2b67b Fix spelling of "occurred".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-05-02 18:37:09 -04:00
Andreas Bießmann 09c2b8f3e3 Change my mailaddress
I'll switch my mails to my own server, so drop all gmail references.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2016-05-02 18:37:09 -04:00
Nishanth Menon e52e334e5c ARM: DRA7: Add ABB setup for all domains
ABB should be initialized for all required domains voltage domain
for DRA7: IVA, GPU, EVE in addition to the existing MPU domain. If
we do not do this, kernel configuring just the frequency using the
default boot loader configured voltage can fail on many corner lot
units and has been hard to debug. This specifically is a concern with
DRA7 generation of SoCs since other than VDD_MPU, all other domains
are only permitted to setup the voltages to required OPP only at boot.

Reported-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2016-04-25 15:10:41 -04:00
Nishanth Menon 3708e78c33 ARM: OMAP5/DRA7: Move ABB TXDONE mask to voltage structure
ABB TX_DONE mask will vary depending on ABB module. For example,
3630 never had ABB on IVA domain, while OMAP5 does use ABB on MM domain,
DRA7 has it on all domains with the exception of CORE, RTC.

Hence, move the txdone mask definition over to structure describing
voltage domain.

Signed-off-by: Nishanth Menon <nm@ti.com>
2016-04-25 15:10:39 -04:00
Peter Griffin 532d5203e9 ARM: hikey: Simplify README instructions.
This patch updates and simplifies the hikey README. The old
instructions were hard to follow, and convoluted.

This patch also updates the link to the mcuimage.bin which was outdated.

Using an outdated mcuimage.bin results in the additional a53 cores
not coming online when the kernel issues PSCI requests to
arm trusted firmware (ATF).

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-25 15:10:36 -04:00
Peter Griffin 305b90919e ARM: hisilicon: hikey: Align memory node with upstream kernel
The memory node gets automatically generated by U-Boot
in arch_fixup_fdt(), before passing control to the kernel
using U-Boots representation of the dram banks.

However the upstream kernel uses the memory node to carve-out
regions of RAM for various purposes. To make this work without
changing arch_fixup_fdt() which will effect many platforms
we replicate the upstream memory node layout using the dram
banks.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-25 15:10:35 -04:00
Peter Griffin 9261f8b180 ARM: hisilicon: hikey: Implement reset_cpu() for hikey.
This allows the reset command to reset the board from
u-boot.

=> reset
resetting ...
INFO:    BL1: 0xf9810000 - 0xf9818000 [size = 32768]
NOTICE:  Booting Trusted Firmware
NOTICE:  BL1: v1.1(debug):7fb9b0e
NOTICE:  BL1: Built : 17:06:41, Apr 19 2016

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-25 15:10:34 -04:00
Peter Griffin cd593ed699 ARM: hisilicon: hikey: Enable OF_CONTROL for hikey board.
Currently only the serial pl01x driver is using DT,
and the other drivers still use platform data but
as more DT lands in the upstream kernel the aim is
to migrate the other drivers over to DT as well to
have a fully DT configured hikey u-boot.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-25 15:10:34 -04:00
Peter Griffin ae4dc15d98 MAINTAINERS: Add myself as maintainer for hikey
This patch adds myself as maintainer for the hikey
U-Boot port.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-25 15:10:31 -04:00
Tom Rini 588d269ffe Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2016-04-25 13:34:42 -04:00
Fabio Estevam 69cc7dbf1f Add initial support for Technexion's PICO-IMX6UL-EMMC board
Add support for Technexion's PICO-IMX6UL-EMMC board.

For information about this board, please visit:
http://www.technexion.com/products/pico/pico-som/pico-imx6-emmc

Signed-off-by: Richard Hu <richard.hu@technexion.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-04-19 16:37:36 +02:00
Akshay Bhat 8d293f49b4 board: ge: bx50v3: Fix to meet LVDS display power on timing
On a reset/reboot, the display power needs to be off for atleast 500ms
before turning it back on. So add a delay to the boot process to meet
the display timing requirement.

Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-04-19 16:05:51 +02:00
Akshay Bhat 54971ac6de board: ge: bx50v3: Use pwm for display backlight
Setup the LCD backlight brightness control pin to use PWM

Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-04-19 16:05:51 +02:00
Akshay Bhat 494d43ec35 board: ge: bx50v3: Setup LDB_DI_CLK source
To generate accurate pixel clocks required by the displays we need to
set the ldb_di_clk source on bx50v3 to PLL3 and b850v3 to PLL5. Since
PLL5 is disabled on reset, we need to enable PLL5.

Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-04-19 16:05:13 +02:00
Akshay Bhat de708da0e8 board: ge: bx50v3: Split display setup function
B450v3/B650v3 uses single channel LVDS and does not support HDMI.
B850v3 uses dual channel LVDS and supports HDMI. Hence split the display
setup into two different functions.

Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-04-19 16:05:13 +02:00
Justin Waters 7d0b8cfeaa board: ge: bx50v3: Disable unused pins
Certain pins are not used on the i.MX6, and should have a neutral
pad configuration in order to reduce electrical interference on
the board. This commit defines these pins with a default value
rather than relying on the system defaults.

Signed-off-by: Justin Waters <justin.waters@timesys.com>
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-04-19 15:54:59 +02:00
Robert P. J. Day 1d15eb01ae board: Remove overlooked vestiges of "dave" board.
Apparently, all "dave"-related vendor content was removed in commit
5344cc1a82fcc2817d4671696b3939b0dfa4323e; remove remaining directory
board/dave/, which consists solely of board/dave/common/flash.c.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2016-04-18 17:11:48 -04:00
Lokesh Vutla 8f69523213 memory: Move TI_AEMIF config to KCONFIG
Not all Keystone2 devices has AEMIF NAND controller. So adding Kconfig
entry for CONFIG_TI_AEMIF and enabling it in respective defconfigs on
platforms with AEMIF controller.

Reported-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-18 17:11:43 -04:00
Steve Kipisz c020d355c4 board: ti: am57xx: Add support for am572x idk in SPL
The AM572x-IDK board (Industrial Dev Kit) is a board based on TI's AM5728x
SOC which has a dual core 1.5GHz A15 processor. This board is a development
platform for the Industrial market with:
- 2GB of DDR3L
- Dual 1Gbps Ethernet
- HDMI,
- PRU-ICSS
- uSD
- 16GB eMMC
- CAN
- RS-485
- PCIe
- USB3.0
- Video Input Port
- Industrial IO port and expansion connector

The link to the data sheet and TRM can be found here:

http://www.ti.com/product/AM5728

NOTE: DT support is still pending upstream kernel acceptance but we
should be able to get the base system support with this patch.

Signed-off-by: Schuyler Patton <spatton@ti.com>
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-18 17:11:32 -04:00
Schuyler Patton 5f405e7fa0 board: ti: am57xx: Update EMIF SDRAM 1 and 3 Timings
Update EMIF data based on recommendations from the now standard TI
EMIF tool version 1.1.1 based on 256MBx16 DDR3L Kingston D2516EC4BXGGB
data sheet

Update T_RRD from 5 to 6 based on AM57xx TRM -
Minimum number of DDR cycles from activate to ativate for a different
bank, minus 1.

Update T_CKESR from 4 to 3 based on AM57xx TRM - Minimum number of DDR
clocks cycles for which SDRAM must remain in self refresh, minus 1.

Signed-off-by: Schuyler Patton <spatton@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-18 17:11:32 -04:00
Daniel Allred 7e52e11f35 am57x: Move CONS_INDEX to Kconfig
- Move the CONS_INDEX selection out of CONFIG_SYS_EXTRA_OPTIONS and
      into Kconfig proper.
    - Edit the relevant am57x configs to remove the now unneeded
      CONFIG_SYS_EXTRA_OPTIONS.

Signed-off-by: Daniel Allred <d-allred@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-18 17:11:31 -04:00
Jagan Teki 7b3dc45ea5 board: README.sandbox: Update dm test command
Update dm test command with pytest instead of ./test/dm/test-dm.sh

Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-04-14 11:51:39 -06:00
Tom Rini ff6552e8cc xpress: Update <usb/ehci-fsl.h> include
This has been renamed to <usb/ehci-ci.h> some time ago but was missed
here.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-04-13 15:45:50 -04:00
Tom Rini 541c9be880 Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze 2016-04-13 12:53:11 -04:00
Michal Simek 52be5c05a0 ARM64: zynqmp: Remove netdev.h from board file
Including netdev.h is causing compilation warning:
+ int fecmxc_register_mii_postcall(struct eth_device *dev, int
(*cb)(int));
+                                         ^
w+In file included from ../board/xilinx/zynqmp/zynqmp.c:9:0:
w+../include/netdev.h:204:41: warning: ‘struct eth_device’ declared
inside parameter list [enabled by default]
w+../include/netdev.h:204:41: warning: its scope is only this definition
or declaration, which is probably not what you want [enabled by default]

This patch removes it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13 18:29:05 +02:00
Michal Simek 658b3a5639 ARM64: zynqmp: Make DDR detection code work on 32bit system
Define u64 types to be usable on 32bit system because of 64bit address
and size cells and 32bit shifts in the code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13 18:29:05 +02:00
Michal Simek 758f29d0f8 ARM: zynq: Support systems with more memory banks
This is example how to change u-boot to support more memory banks read
from DT.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-13 18:29:02 +02:00
Tom Rini 814013253f Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2016-04-13 07:19:50 -04:00
Tom Rini 39fbd98716 Merge git://www.denx.de/git/u-boot-marvell 2016-04-12 09:10:54 -04:00
Stefan Roese aca84a214d arm: mvebu: theadorable: Remove Board name output in checkboard
This line is not needed, as the board supports DT based probing. And
here the "Model:" is already printed:

Model: Marvell Armada XP theadorable
Board: theadorable

One line for the board name is enough.

Signed-off-by: Stefan Roese <sr@denx.de>
2016-04-12 11:13:40 +02:00
Stefan Roese 169a855017 arm: mvebu: theadorable: Add PEX-switch detection and reset code
Sometimes the PCIe link for the PEX-switch will not come-up. In this case,
the board is not in a usable state. This patch makes sure that in this
case a soft-reset is issued. If this soft-reset does not result in the
PEX-switch being detected after some soft-reset cycles, an I2C message
is sent to the uC to issue a complete power-cycle of the board.

Signed-off-by: Stefan Roese <sr@denx.de>
2016-04-12 11:13:40 +02:00
Stefan Roese ced0d849d8 arm: mvebu: theadorable: Add USB power toggle and tweak USB PHY register
This patch adds an USB power toggle for theadorable. Additionally, the
USB PHY RX Channel Control 0 Register is changed to fix some issues
noticed while accessing some specific USB sticks.

Signed-off-by: Stefan Roese <sr@denx.de>
2016-04-12 11:13:40 +02:00
Hans de Goede ec770dba89 sunxi: Add defconfig and dts file for Orange Pi One SBC
The Orange Pi One SBC, is a stripped down version of the popular
Orange Pi PC. The one is a H3 based SBC, with 512M of RAM,
micro-sd slot, 1 host usb, 1 otg usb, hdmi and 100Mbit ethernet.

The dts is identical to the dts submitted to the upstream kernel.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-04-12 08:58:03 +02:00
Hans de Goede 2c3c3ecb59 sunxi: Add INITIAL_USB_SCAN_DELAY Kconfig option
Some boards have on board usb devices which need longer than the USB
spec's 1 second to connect from board powerup. Add a config option which
when non 0 adds an extra delay before the first usb bus scan.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-04-12 08:58:03 +02:00
Stephen Warren fe84ebf021 rpi: remove redundant board files
Now that rpi_*defconfig and Kconfig (rather than the config header file)
provide the identity of the build, we don't need to separate config
headers and board directories for each RPi variant. Set CONFIG_SYS_BOARD
and CONFIG_SYS_CONFIG_NAME so that we can get rid of the duplication. This
requires a tiny number of extra ifdefs in the config header.

The only disadvantage of this approach is that the $board/$board_name
environment variables aren't as descriptive as they used to be. This isn't
really an issue because those only exist to allow scripts to create DTB
filenames at runtime. However, the RPi board code already sets $fdtfile to
something more accurate based on FW-reported board ID anyway.

While at it, unify some Kconfig select options, and add a MAINTAINERS
entry for bcm283x too.

Partially-suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-11 20:48:23 -04:00
Roger Quadros c3333ded03 board: ti: am57xx: Prevent init_sata() from being called twice
init_sata() is done as part of scsi_init() in
arch/arm/cpu/armv7/omap-common/sata.c so no need to duplicate
it here.

This seems to fix SATA problems in the kernel when CONFIG_TI_PIPE3 is
configured as loadable module.

Cc: Cooper Jr., Franklin <fcooper@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
2016-04-11 20:48:21 -04:00
Stephen Warren d22a765755 ARM: add Raspberry Pi 3 64-bit config
On all Pis so far, the VC FW provides a short stub to set up the ARM CPU
before entering the kernel (a/k/a U-Boot for us). This feature is not
currently supported by the VC FW when booting in 64-bit mode. However,
this feature will likely appear in the near future, and this U-Boot port
assumes that such a feature is in place. Without that feature, or a
temporary workaround described below, U-Boot will not boot.

Once the VC FW does provide the ARM stub, u-boot.bin built for rpi_3 can
be used drectly as kernel7.img, in the same way as any other RPi port. The
following config.txt is required:

    # Fix mini UART input frequency, and setup/enable up the UART.
    # Without this option, U-Boot will not boot, even if you don't care
    # about the serial console. This option will always be required for
    # all RPi3 use-cases, unless the PL011 UART is used, which is not
    # yet supported by rpi_3* builds of U-Boot.
    enable_uart=1
    # Boot in AArch64 (64-bit) mode.
    # It is possible that a future VC FW will remove the need for this
    # option, instead auto-setting 32-/64-bit mode based on the "kernel"
    # filename present on the SD card.
    arm_control=0x200

Prior to the VC FW providing the ARM boot stub, you can use the following
steps to build an equivalent stub into the U-Boot binary:

git clone https://github.com/swarren/rpi-3-aarch64-demo.git \
    ../rpi-3-aarch64-demo
(cd ../rpi-3-aarch64-demo && ./build.sh)
Build U-Boot for rpi_3 in the usual way
cat ../rpi-3-aarch64-demo/armstub64.bin u-boot.bin > u-boot.bin.stubbed
Use u-boot.bin.stubbed as kernel7.img on the Pi SD card.

In this case, the following additional entries are required in config.txt:

    # Tell the FW to load the kernel image at address 0, the reset vector.
    kernel_old=1

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-11 12:44:38 -04:00
Marek Vasut 4d74c02724 arm: socfpga: sockit: Use more relaxed DRAM timings
The currently present DRAM timings generated from GHRD 14.0 did
not work on SoCkit rev. D because they were too tight. Load the
DRAM timings from GHRD 13.0 which are more relaxed and work with
SoCkit rev. D.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
2016-04-10 17:19:48 +02:00
York Sun 3c1d218a1d armv8: LS2080A: Consolidate LS2080A and LS2085A
LS2080A is the primary SoC, and LS2085A is a personality with AIOP
and DPAA DDR. The RDB and QDS boards support both personality. By
detecting the SVR at runtime, a single image per board can support
both SoCs. It gives users flexibility to swtich SoC without the need
to reprogram the board.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2016-04-06 10:26:46 -07:00
Shaohui Xie ce96ba4b84 armv8: ls1043aqds: make sure fixed-link property is big endian
When setting fixed-link property to DTS, the values should be converted
with using cpu_to_fdt32 so that to have correct value on little endian
Soc.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-04-06 08:34:55 -07:00
Tom Rini 4ed6ed3c27 Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze 2016-04-04 14:34:09 -04:00
Michal Simek 679b994a2b block: Add support for Ceva sata
Initial Ceva Sata init code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-04 20:28:39 +02:00
Michal Simek 6d3ddfc473 ARM64: zynqmp: Simplify MAINTAINERS file to support more boards
Handle all Xilinx ZynqMP boards with one fragment.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-04 20:28:38 +02:00
Michal Simek 8d59d7f63b ARM64: zynqmp: Read RAM information from DT
Read information about memory from DT. This patch simplify life with
synchronization between DT and board files.

dram_init() only needs maximum RAM size below 4GB that's why please sort
banks in memory node.
dram_init_banksize() copies memory setup to bi_dram[].
This will avoid reading information from DT twice.

Memory test start/end were changed to DDR location to let memtest still
compiled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-04 20:28:38 +02:00
Michal Simek a359eaa598 microblaze: Remove !OF_CONTROL code for timer and interrupt
OF_CONTROL is enabled by default that's why this is dead code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-04 20:28:38 +02:00
Michal Simek 66de226f9f ARM: zynq: Fix default ps7_init_gpl.c/h for ZYBO
There is incorrect setting for USB which didn't work with origin
ps7_init_gpl.X files.
Use default setting for Digilent Zybo projects with HDMI in PL.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-04 20:28:38 +02:00
Joe Hershberger a509a1d402 net: gem: Allow to set the MAC from an EEPROM
Provide board specific option how to read MAC address from ROM.
Do it in generic way to be reusable by differnet boards.
If this is not enough board specific functions can be created.

Signed-off-by: Joe Hershberger <joe.hershberger@gmail.com> # driver part
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-04-04 20:27:54 +02:00