Pin assignment for few modules
parent
3946012ca1
commit
5c0a45e0ec
|
@ -43,6 +43,12 @@ ldc_set_port -iobuf {IO_TYPE=LVCMOS18H} [get_ports pclk_o]
|
|||
ldc_set_port -iobuf {IO_TYPE=LVCMOS18} [get_ports lsync_o]
|
||||
ldc_set_port -iobuf {IO_TYPE=LVCMOS18H} [get_ports fsync_o]
|
||||
ldc_set_port -iobuf {IO_TYPE=LVCMOS18H} [get_ports dummy_out]
|
||||
ldc_set_port -iobuf {IO_TYPE=LVCMOS18H} [get_ports reset_in]
|
||||
|
||||
ldc_set_port -iobuf {IO_TYPE=LVCMOS18H} [get_ports cam_ctrl_in]
|
||||
ldc_set_port -iobuf {IO_TYPE=LVCMOS18} [get_ports cam_xmaster_o]
|
||||
ldc_set_port -iobuf {IO_TYPE=LVCMOS18} [get_ports cam_reset_o]
|
||||
ldc_set_port -iobuf {IO_TYPE=LVCMOS18} [get_ports cam_pwr_en_o]
|
||||
|
||||
ldc_set_location -site {J12} [get_ports {data_o[0]}]
|
||||
ldc_set_location -site {J11} [get_ports {data_o[1]}]
|
||||
|
@ -80,6 +86,12 @@ ldc_set_location -site {T14} [get_ports {data_o[31]}]
|
|||
ldc_set_location -site {P15} [get_ports pclk_o]
|
||||
ldc_set_location -site {J16} [get_ports lsync_o]
|
||||
ldc_set_location -site {M14} [get_ports fsync_o]
|
||||
ldc_set_location -site {N16} [get_ports reset_in]
|
||||
ldc_set_location -site {M16} [get_ports cam_ctrl_in]
|
||||
ldc_set_location -site {E15} [get_ports cam_xmaster_o]
|
||||
ldc_set_location -site {E16} [get_ports cam_reset_o]
|
||||
ldc_set_location -site {F16} [get_ports cam_pwr_en_o]
|
||||
|
||||
ldc_set_location -site {D1} [get_ports mipi_clk_p_in1]
|
||||
ldc_set_location -site {D2} [get_ports mipi_clk_n_in1]
|
||||
ldc_set_location -site {E1} [get_ports {mipi_data_p_in1[0]}]
|
||||
|
|
Loading…
Reference in New Issue