158 lines
4.5 KiB
Verilog
158 lines
4.5 KiB
Verilog
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`timescale 1ns/1ns
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module tb_output_reformatter();
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reg clk;
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reg [383:0]rgb_input;
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reg rgb_valid;
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wire [127:0]yuv_data;
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wire is_yuv_valid;
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reg line_valid;
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reg frame_sync;
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reg out_clock;
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wire [31:0]data_out;
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rgb_to_yuv rgb_to_yuv1(.clk_i(clk),
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.rgb_i(rgb_input),
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.rgb_valid_i(rgb_valid),
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.yuv_o(yuv_data),
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.yuv_valid_o(is_yuv_valid));
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output_reformatter out_reformat1(
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.clk_i(clk),
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.line_sync_i(line_valid),
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.output_clk_i(out_clock),
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.data_i(yuv_data),
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.data_in_valid_i(is_yuv_valid),
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.output_o(data_out),
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.output_valid_o(lsync_out),
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.frame_sync_i(frame_sync));
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task sendclock;
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begin
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clk = 1'b0;
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#10;
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clk = 1'b1;
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#10;
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clk = 1'b0;
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#10;
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clk = 1'b1;
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#10;
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end
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endtask
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task sendrgb;
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input [383:0]rgb;
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begin
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rgb_input = rgb;
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clk = 1'b0;
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out_clock = 1'b0;
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#10
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out_clock = 1'b1;
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#10
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$fwrite(write_fd, "%u", {data_out[7:0], data_out[15:8], data_out[23:16], data_out[31:24]});
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$display("%h", data_out);
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out_clock = 1'b0;
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#10
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out_clock = 1'b1;
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#10
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$fwrite(write_fd, "%u", {data_out[7:0], data_out[15:8], data_out[23:16], data_out[31:24]});
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$display("%h", data_out);
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out_clock = 1'b0;
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#10
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out_clock = 1'b1;
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#10
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$fwrite(write_fd, "%u", {data_out[7:0], data_out[15:8], data_out[23:16], data_out[31:24]});
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$display("%h", data_out);
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out_clock = 1'b0;
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clk = 1'b1;
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#10
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out_clock = 1'b1;
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#10;
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$fwrite(write_fd, "%u", {data_out[7:0], data_out[15:8], data_out[23:16], data_out[31:24]});
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$display("%h", data_out);
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end
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endtask
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integer i;
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integer j;
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integer read_fd;
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integer write_fd;
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integer write_yuv_fd;
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reg[383:0] read_bytes;
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reg[383:0] send_read_bytes;
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initial begin
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clk = 0;
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out_clock = 0;
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rgb_valid = 0;
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read_fd = $fopen("C:\\Users\\gaurav\\Documents\\FPGA\\Lattice\\MIPI_CSI_Parallel_16_nx\\csi_16_nx\\source\\csi_16_nx\\image_file_240_rgb48be.rgb","rb");
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write_fd = $fopen("C:\\Users\\gaurav\\Documents\\FPGA\\Lattice\\MIPI_CSI_Parallel_16_nx\\csi_16_nx\\source\\csi_16_nx\\image_file_240_reformat.yuv","wb");
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write_yuv_fd = $fopen("C:\\Users\\gaurav\\Documents\\FPGA\\Lattice\\MIPI_CSI_Parallel_16_nx\\csi_16_nx\\source\\csi_16_nx\\image_file_240_yuv.yuv","wb");
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$display("read_fd=%d",read_fd);
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$display("write_fd=%d",write_fd);
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rgb_input = 0;
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frame_sync = 1; //active low
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sendclock();
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frame_sync = 0; //active low
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for (i = 0; i <240; i = i + 1)
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begin
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rgb_valid = 1;
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line_valid = 1;
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for (j=0; j <30; j = j + 1)
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begin
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$fread(read_bytes, read_fd);
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send_read_bytes ={read_bytes[383:336], read_bytes[335:288], read_bytes[287:240], read_bytes[239:192], read_bytes[191:144], read_bytes[143:96], read_bytes[95:48], read_bytes[47:0]};
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sendrgb(send_read_bytes);
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$fwrite(write_yuv_fd, "%u", { { yuv_data[7:0], yuv_data[15:8]}, {yuv_data[23:16], yuv_data[31:24]},
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{ yuv_data[39:32], yuv_data[47:40]}, {yuv_data[55:48], yuv_data[63:56]},
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{ yuv_data[71:64], yuv_data[79:72]}, {yuv_data[87:80], yuv_data[95:88]},
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{yuv_data[103:96], yuv_data[111:104]}, {yuv_data[119:112], yuv_data[127:120]}});
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end
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rgb_valid = 0;
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line_valid = 0;
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sendclock();
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sendclock();
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sendclock();
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sendclock();
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end
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/*
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rgb_valid = 1;
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while (!$feof(read_fd)) begin
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$fread(read_bytes, read_fd);
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send_read_bytes ={read_bytes[383:336], read_bytes[335:288], read_bytes[287:240], read_bytes[239:192], read_bytes[191:144], read_bytes[143:96], read_bytes[95:48], read_bytes[47:0]};
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sendrgb(send_read_bytes);
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$fwrite(write_fd, "%u", { {yuv_data[7:0], yuv_data[15:8]} , {yuv_data[23:16], yuv_data[31:24]},
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{yuv_data[39:32], yuv_data[47:40]}, { yuv_data[55:48] ,yuv_data[63:56]},
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{yuv_data[71:64], yuv_data[79:72]}, {yuv_data[87:80], yuv_data[95:88]},
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{yuv_data[103:96], yuv_data[111:104]}, {yuv_data[119:112], yuv_data[127:120]} } );
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#10;
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//$fwrite(write_fd, "%u", {{yuv_data[119:112], yuv_data[127:120]}, {yuv_data[103:96], yuv_data[111:104]},{yuv_data[87:80], yuv_data[95:88]},{yuv_data[71:64], yuv_data[79:72]},{ yuv_data[55:48] ,yuv_data[63:56]}, {yuv_data[39:32], yuv_data[47:40]}, {yuv_data[23:16], yuv_data[31:24]},{yuv_data[7:0], yuv_data[15:8]}} );
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end
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*/
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frame_sync = 1; //active low
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sendclock();
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sendclock();
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sendclock();
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sendclock();
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rgb_valid = 0;
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$fclose(read_fd);
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$fclose(write_fd);
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$fclose(write_yuv_fd);
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end
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endmodule |