193 lines
7.8 KiB
C
193 lines
7.8 KiB
C
/*
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* Project Name: fx3_uvc.cyfx
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* Time : 06/15/2022 00:44:52
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* Device Type: FX3
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* Project Type: GPIF2
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*
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*
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*
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*
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* This is a generated file and should not be modified
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* This file need to be included only once in the firmware
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* This file is generated by Gpif2 designer tool version - 1.0.1198.2
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*
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*/
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#ifndef _INCLUDED__
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#define _INCLUDED__
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#include "cyu3types.h"
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#include "cyu3gpif.h"
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/* Summary
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Number of states in the state machine
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*/
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#define CY_NUMBER_OF_STATES 20
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/* Summary
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Mapping of user defined state names to state indices
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*/
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#define START_SCK0 0
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#define IDLE_SCK0 1
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#define START_SCK1 3
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#define IDLE_SCK1 4
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#define WAIT_FOR_FRAME_START_0 2
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#define WAIT_FOR_FRAME_START_1 5
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#define PUSH_DATA_SCK0 6
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#define PUSH_DATA_SCK1 7
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#define LINE_END_SCK0 8
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#define LINE_END_SCK1 9
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#define WAIT_TO_FILL_SCK0 10
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#define WAIT_TO_FILL_SCK1 12
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#define WAIT_FULL_SCK0 11
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#define WAIT_FULL_SCK1 13
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#define PARTIAL_BUF_IN_SCK0 14
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#define PARTIAL_BUF_IN_SCK1 15
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#define FULL_BUF_IN_SCK0 16
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#define FULL_BUF_IN_SCK1 17
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#define FRAME_END_SCK0 18
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#define FRAME_END_SCK1 19
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/* Summary
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Initial value of early outputs from the state machine.
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*/
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#define ALPHA_START_SCK0 0x0
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#define ALPHA_START_SCK1 0x0
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/* Summary
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Transition function values used in the state machine.
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*/
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uint16_t CyFxGpifTransition[] = {
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0x0000, 0x5555, 0x8888, 0xAAAA, 0x3333
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};
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/* Summary
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Table containing the transition information for various states.
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This table has to be stored in the WAVEFORM Registers.
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This array consists of non-replicated waveform descriptors and acts as a
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waveform table.
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*/
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CyU3PGpifWaveData CyFxGpifWavedata[] = {
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{{0x1E738201,0x00000000,0x80000000},{0x00000000,0x00000000,0x00000000}},
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{{0x2E700202,0x00000900,0x800000A0},{0x00000000,0x00000000,0x00000000}},
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{{0x2E728006,0x20080102,0x80000060},{0x00000000,0x00000000,0x00000000}},
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{{0x1E738204,0x00000000,0x80000000},{0x00000000,0x00000000,0x00000000}},
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{{0x2E700205,0x00000100,0x800000A0},{0x00000000,0x00000000,0x00000000}},
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{{0x2E726007,0x24000902,0x80000090},{0x00000000,0x00000000,0x00000000}},
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{{0x2E726007,0x24000902,0x80000090},{0x1E739408,0x00080806,0x80000000}},
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{{0x2E728006,0x20080102,0x80000060},{0x1E739309,0x00000006,0x80000000}},
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{{0x3E70400A,0x00100908,0x80000000},{0x3E70400B,0x00100108,0x80000000}},
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{{0x3E70400C,0x00100108,0x80000000},{0x3E70400D,0x00100908,0x80000000}},
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{{0x2E728006,0x20080102,0x80000060},{0x3E739E0E,0x00000000,0x80000100}},
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{{0x2E726007,0x24000902,0x80000090},{0x3E739E10,0x00000000,0x80000100}},
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{{0x2E726007,0x24000902,0x80000090},{0x3E739E0F,0x00000000,0x80000100}},
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{{0x2E728006,0x20080102,0x80000060},{0x3E739E11,0x00000000,0x80000100}},
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{{0x1E739E12,0x00000000,0x80000000},{0x00000000,0x00000000,0x00000000}},
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{{0x1E739E13,0x00000000,0x80000000},{0x00000000,0x00000000,0x00000000}}
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};
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/* Summary
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Table that maps state indices to the descriptor table indices.
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*/
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uint8_t CyFxGpifWavedataPosition[] = {
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0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,14,15,3,0
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};
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/* Summary
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GPIF II configuration register values.
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*/
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uint32_t CyFxGpifRegValue[] = {
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0x80008700, /* CY_U3P_PIB_GPIF_CONFIG */
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0x0000006C, /* CY_U3P_PIB_GPIF_BUS_CONFIG */
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0x00000000, /* CY_U3P_PIB_GPIF_BUS_CONFIG2 */
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0x00000046, /* CY_U3P_PIB_GPIF_AD_CONFIG */
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0x00000000, /* CY_U3P_PIB_GPIF_STATUS */
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0x00000000, /* CY_U3P_PIB_GPIF_INTR */
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0x00000002, /* CY_U3P_PIB_GPIF_INTR_MASK */
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0x00000082, /* CY_U3P_PIB_GPIF_SERIAL_IN_CONFIG */
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0x00000782, /* CY_U3P_PIB_GPIF_SERIAL_OUT_CONFIG */
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0x00014400, /* CY_U3P_PIB_GPIF_CTRL_BUS_DIRECTION */
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0x0000FFFA, /* CY_U3P_PIB_GPIF_CTRL_BUS_DEFAULT */
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0x00000100, /* CY_U3P_PIB_GPIF_CTRL_BUS_POLARITY */
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0x00000000, /* CY_U3P_PIB_GPIF_CTRL_BUS_TOGGLE */
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0x00000000, /* CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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0x00000000, /* CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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0x00000000, /* CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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0x00000000, /* CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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0x00000000, /* CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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0x00000001, /* CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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0x00000000, /* CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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0x00000002, /* CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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0x00000000, /* CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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0x00000000, /* CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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0x00000000, /* CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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0x00000000, /* CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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0x00000000, /* CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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0x00000000, /* CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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0x00000000, /* CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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0x00000000, /* CY_U3P_PIB_GPIF_CTRL_BUS_SELECT */
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0x00000006, /* CY_U3P_PIB_GPIF_CTRL_COUNT_CONFIG */
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0x00000000, /* CY_U3P_PIB_GPIF_CTRL_COUNT_RESET */
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0x0000FFFF, /* CY_U3P_PIB_GPIF_CTRL_COUNT_LIMIT */
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0x00000109, /* CY_U3P_PIB_GPIF_ADDR_COUNT_CONFIG */
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0x00000000, /* CY_U3P_PIB_GPIF_ADDR_COUNT_RESET */
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0x00001FFB, /* CY_U3P_PIB_GPIF_ADDR_COUNT_LIMIT */
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0x00000000, /* CY_U3P_PIB_GPIF_STATE_COUNT_CONFIG */
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0x0000FFFF, /* CY_U3P_PIB_GPIF_STATE_COUNT_LIMIT */
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0x00000109, /* CY_U3P_PIB_GPIF_DATA_COUNT_CONFIG */
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0x00000000, /* CY_U3P_PIB_GPIF_DATA_COUNT_RESET */
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0x00001FFB, /* CY_U3P_PIB_GPIF_DATA_COUNT_LIMIT */
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0x00000000, /* CY_U3P_PIB_GPIF_CTRL_COMP_VALUE */
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0x00000000, /* CY_U3P_PIB_GPIF_CTRL_COMP_MASK */
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0x00000000, /* CY_U3P_PIB_GPIF_DATA_COMP_VALUE */
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0x00000000, /* CY_U3P_PIB_GPIF_DATA_COMP_MASK */
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0x00000000, /* CY_U3P_PIB_GPIF_ADDR_COMP_VALUE */
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0x00000000, /* CY_U3P_PIB_GPIF_ADDR_COMP_MASK */
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0x00000000, /* CY_U3P_PIB_GPIF_DATA_CTRL */
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0x00000000, /* CY_U3P_PIB_GPIF_INGRESS_DATA */
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0x00000000, /* CY_U3P_PIB_GPIF_INGRESS_DATA */
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0x00000000, /* CY_U3P_PIB_GPIF_INGRESS_DATA */
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0x00000000, /* CY_U3P_PIB_GPIF_INGRESS_DATA */
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0x00000000, /* CY_U3P_PIB_GPIF_EGRESS_DATA */
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0x00000000, /* CY_U3P_PIB_GPIF_EGRESS_DATA */
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0x00000000, /* CY_U3P_PIB_GPIF_EGRESS_DATA */
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0x00000000, /* CY_U3P_PIB_GPIF_EGRESS_DATA */
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0x00000000, /* CY_U3P_PIB_GPIF_INGRESS_ADDRESS */
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0x00000000, /* CY_U3P_PIB_GPIF_INGRESS_ADDRESS */
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0x00000000, /* CY_U3P_PIB_GPIF_INGRESS_ADDRESS */
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0x00000000, /* CY_U3P_PIB_GPIF_INGRESS_ADDRESS */
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0x00000000, /* CY_U3P_PIB_GPIF_EGRESS_ADDRESS */
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0x00000000, /* CY_U3P_PIB_GPIF_EGRESS_ADDRESS */
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0x00000000, /* CY_U3P_PIB_GPIF_EGRESS_ADDRESS */
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0x00000000, /* CY_U3P_PIB_GPIF_EGRESS_ADDRESS */
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0x80010400, /* CY_U3P_PIB_GPIF_THREAD_CONFIG */
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0x80010401, /* CY_U3P_PIB_GPIF_THREAD_CONFIG */
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0x80010402, /* CY_U3P_PIB_GPIF_THREAD_CONFIG */
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0x80010403, /* CY_U3P_PIB_GPIF_THREAD_CONFIG */
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0x00000000, /* CY_U3P_PIB_GPIF_LAMBDA_STAT */
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0x00000000, /* CY_U3P_PIB_GPIF_ALPHA_STAT */
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0x00000000, /* CY_U3P_PIB_GPIF_BETA_STAT */
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0x00000000, /* CY_U3P_PIB_GPIF_WAVEFORM_CTRL_STAT */
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0x00000000, /* CY_U3P_PIB_GPIF_WAVEFORM_SWITCH */
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0x00000000, /* CY_U3P_PIB_GPIF_WAVEFORM_SWITCH_TIMEOUT */
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0x00000000, /* CY_U3P_PIB_GPIF_CRC_CONFIG */
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0x00000000, /* CY_U3P_PIB_GPIF_CRC_DATA */
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0xFFFFFFC1 /* CY_U3P_PIB_GPIF_BETA_DEASSERT */
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};
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/* Summary
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This structure holds all the configuration inputs for the GPIF II.
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*/
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const CyU3PGpifConfig_t CyFxGpifConfig = {
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(uint16_t)(sizeof(CyFxGpifWavedataPosition)/sizeof(uint8_t)),
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CyFxGpifWavedata,
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CyFxGpifWavedataPosition,
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(uint16_t)(sizeof(CyFxGpifTransition)/sizeof(uint16_t)),
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CyFxGpifTransition,
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(uint16_t)(sizeof(CyFxGpifRegValue)/sizeof(uint32_t)),
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CyFxGpifRegValue
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};
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#endif /* _INCLUDED__ */
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