LibreSatCam/FPGA_Firmware/Source/src/Lattice_specfic/out_line_ram_dp.cfg

{
  "REGMODE": false, 
  "WADDR_DEPTH": 2048, 
  "RDATA_WIDTH": 32, 
  "WDATA_WIDTH": 32, 
  "RADDR_DEPTH": 2048
}