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sidloc-transceiver
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Fix clock-in in FPGA pins 

Fixes #28

Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
merge-requests/14/head
Agis Zisimatos 2022-04-30 13:13:09 +03:00
parent 5f79558cec
commit 77dad4e17f
3 changed files with 4574 additions and 7528 deletions
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2
sidloc-schematic

@ -1 +1 @@
Subproject commit 9d9a499b545e560bf781fa553c03414ac32dade2
Subproject commit b07c5fff9895e3924d95ec917824a95a593327ef

12089
sidloc-transceiver.kicad_pcb
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File diff suppressed because it is too large Load Diff

11
sidloc-transceiver.kicad_pro
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@ -33,9 +33,9 @@
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 2.5,
"height": 5.0,
"width": 5.0
"drill": 0.0,
"height": 0.4,
"width": 0.375
},
"silk_line_width": 0.15,
"silk_text_italic": false,
@ -392,6 +392,11 @@
"name": "50-Ohm",
"nets": [
"/fpga/CFG_CLK",
"/fpga/CFG_IO0",
"/fpga/CFG_IO1",
"/fpga/CFG_IO2",
"/fpga/CFG_IO3",
"/fpga/~{CFG_CS}",
"/transceiver/RF09CAP_N",
"/transceiver/RF09CAP_P",
"/transceiver/RF09N",