Agis Zisimatos
65c1553f29
Add SPI routing of FPGA
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* Route pull-up resistors of NOR flash
* Small fixes in AT86RF215, fixes #30
* Route pull-up and down resistors of JTAG
Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
2022-04-19 19:27:25 +03:00
Agis Zisimatos
961e955dbd
Fix SPI_CLK connection
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It had connected to CS
Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
2022-04-18 21:10:33 +03:00
Agis Zisimatos
bbb8da9459
Initial part placement
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Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
2022-04-11 19:07:49 +03:00
Agis Zisimatos
0f946970ff
Assign footprints
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Use PQ9ish template
Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
2022-04-08 22:09:47 +03:00
Agis Zisimatos
c9c6807e57
Fix interface with MCU breadboard
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Fixes #19
Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
2022-04-07 19:01:15 +03:00
Agis Zisimatos
b4a8816f07
Add PQ9ish template
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Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
2022-04-07 13:42:06 +03:00
Agis Zisimatos
751f54fc0b
Initialize schematics and define connectors
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Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
2022-04-06 21:10:42 +03:00
Vasilis Tsiligiannis
1f24b26fbe
Initialize empty KiCad project
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Signed-off-by: Vasilis Tsiligiannis <acinonyx@openwrt.gr>
2022-03-15 18:35:16 +02:00