2005-04-16 16:20:36 -06:00
|
|
|
/* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
|
|
|
|
*/
|
2006-01-02 02:14:23 -07:00
|
|
|
/*
|
2005-04-16 16:20:36 -06:00
|
|
|
* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
|
|
|
|
* All Rights Reserved.
|
2005-06-23 06:46:46 -06:00
|
|
|
*
|
|
|
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
* copy of this software and associated documentation files (the
|
|
|
|
* "Software"), to deal in the Software without restriction, including
|
|
|
|
* without limitation the rights to use, copy, modify, merge, publish,
|
|
|
|
* distribute, sub license, and/or sell copies of the Software, and to
|
|
|
|
* permit persons to whom the Software is furnished to do so, subject to
|
|
|
|
* the following conditions:
|
|
|
|
*
|
|
|
|
* The above copyright notice and this permission notice (including the
|
|
|
|
* next paragraph) shall be included in all copies or substantial portions
|
|
|
|
* of the Software.
|
|
|
|
*
|
|
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
|
|
|
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
|
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
|
|
|
|
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
|
|
|
|
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
|
|
|
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
|
|
|
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
|
|
*
|
2006-01-02 02:14:23 -07:00
|
|
|
*/
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2012-03-18 14:00:11 -06:00
|
|
|
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
|
|
|
|
|
2012-10-02 11:01:07 -06:00
|
|
|
#include <drm/drmP.h>
|
|
|
|
#include <drm/drm_crtc_helper.h>
|
|
|
|
#include <drm/drm_fb_helper.h>
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
#include "intel_drv.h"
|
2012-10-02 11:01:07 -06:00
|
|
|
#include <drm/i915_drm.h>
|
2005-04-16 16:20:36 -06:00
|
|
|
#include "i915_drv.h"
|
2009-08-25 04:15:50 -06:00
|
|
|
#include "i915_trace.h"
|
2010-05-27 13:40:25 -06:00
|
|
|
#include <linux/pci.h>
|
2009-09-20 22:33:58 -06:00
|
|
|
#include <linux/vgaarb.h>
|
2009-12-16 23:48:43 -07:00
|
|
|
#include <linux/acpi.h>
|
|
|
|
#include <linux/pnp.h>
|
2010-01-31 22:38:10 -07:00
|
|
|
#include <linux/vga_switcheroo.h>
|
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 02:04:11 -06:00
|
|
|
#include <linux/slab.h>
|
2010-08-19 09:09:23 -06:00
|
|
|
#include <acpi/video.h>
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2012-04-26 15:28:10 -06:00
|
|
|
#define LP_RING(d) (&((struct drm_i915_private *)(d))->ring[RCS])
|
|
|
|
|
|
|
|
#define BEGIN_LP_RING(n) \
|
|
|
|
intel_ring_begin(LP_RING(dev_priv), (n))
|
|
|
|
|
|
|
|
#define OUT_RING(x) \
|
|
|
|
intel_ring_emit(LP_RING(dev_priv), x)
|
|
|
|
|
|
|
|
#define ADVANCE_LP_RING() \
|
|
|
|
intel_ring_advance(LP_RING(dev_priv))
|
|
|
|
|
|
|
|
/**
|
|
|
|
* Lock test for when it's just for synchronization of ring access.
|
|
|
|
*
|
|
|
|
* In that case, we don't need to do it when GEM is initialized as nobody else
|
|
|
|
* has access to the ring.
|
|
|
|
*/
|
|
|
|
#define RING_LOCK_TEST_WITH_RETURN(dev, file) do { \
|
|
|
|
if (LP_RING(dev->dev_private)->obj == NULL) \
|
|
|
|
LOCK_TEST_WITH_RETURN(dev, file); \
|
|
|
|
} while (0)
|
|
|
|
|
2012-04-26 15:28:15 -06:00
|
|
|
static inline u32
|
|
|
|
intel_read_legacy_status_page(struct drm_i915_private *dev_priv, int reg)
|
|
|
|
{
|
|
|
|
if (I915_NEED_GFX_HWS(dev_priv->dev))
|
|
|
|
return ioread32(dev_priv->dri1.gfx_hws_cpu_addr + reg);
|
|
|
|
else
|
|
|
|
return intel_read_status_page(LP_RING(dev_priv), reg);
|
|
|
|
}
|
|
|
|
|
|
|
|
#define READ_HWSP(dev_priv, reg) intel_read_legacy_status_page(dev_priv, reg)
|
2012-04-26 15:28:10 -06:00
|
|
|
#define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, I915_BREADCRUMB_INDEX)
|
|
|
|
#define I915_BREADCRUMB_INDEX 0x21
|
|
|
|
|
2012-04-26 15:28:09 -06:00
|
|
|
void i915_update_dri1_breadcrumb(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
|
|
struct drm_i915_master_private *master_priv;
|
|
|
|
|
|
|
|
if (dev->primary->master) {
|
|
|
|
master_priv = dev->primary->master->driver_priv;
|
|
|
|
if (master_priv->sarea_priv)
|
|
|
|
master_priv->sarea_priv->last_dispatch =
|
|
|
|
READ_BREADCRUMB(dev_priv);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-02-25 15:26:23 -07:00
|
|
|
static void i915_write_hws_pga(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
|
|
u32 addr;
|
|
|
|
|
|
|
|
addr = dev_priv->status_page_dmah->busaddr;
|
|
|
|
if (INTEL_INFO(dev)->gen >= 4)
|
|
|
|
addr |= (dev_priv->status_page_dmah->busaddr >> 28) & 0xf0;
|
|
|
|
I915_WRITE(HWS_PGA, addr);
|
|
|
|
}
|
|
|
|
|
2008-07-30 14:03:43 -06:00
|
|
|
/**
|
|
|
|
* Frees the hardware status page, whether it's a physical address or a virtual
|
|
|
|
* address set up by the X Server.
|
|
|
|
*/
|
2008-10-02 13:24:47 -06:00
|
|
|
static void i915_free_hws(struct drm_device *dev)
|
2008-07-30 14:03:43 -06:00
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
2010-12-04 04:30:53 -07:00
|
|
|
struct intel_ring_buffer *ring = LP_RING(dev_priv);
|
|
|
|
|
2008-07-30 14:03:43 -06:00
|
|
|
if (dev_priv->status_page_dmah) {
|
|
|
|
drm_pci_free(dev, dev_priv->status_page_dmah);
|
|
|
|
dev_priv->status_page_dmah = NULL;
|
|
|
|
}
|
|
|
|
|
2010-12-04 04:30:53 -07:00
|
|
|
if (ring->status_page.gfx_addr) {
|
|
|
|
ring->status_page.gfx_addr = 0;
|
2012-04-26 15:28:15 -06:00
|
|
|
iounmap(dev_priv->dri1.gfx_hws_cpu_addr);
|
2008-07-30 14:03:43 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Need to rewrite hardware status page */
|
|
|
|
I915_WRITE(HWS_PGA, 0x1ffff000);
|
|
|
|
}
|
|
|
|
|
2007-07-10 23:53:27 -06:00
|
|
|
void i915_kernel_lost_context(struct drm_device * dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
2008-11-27 21:22:24 -07:00
|
|
|
struct drm_i915_master_private *master_priv;
|
2010-12-04 04:30:53 -07:00
|
|
|
struct intel_ring_buffer *ring = LP_RING(dev_priv);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
/*
|
|
|
|
* We should never lose context on the ring with modesetting
|
|
|
|
* as we don't expose it to userspace
|
|
|
|
*/
|
|
|
|
if (drm_core_check_feature(dev, DRIVER_MODESET))
|
|
|
|
return;
|
|
|
|
|
2010-11-11 10:54:52 -07:00
|
|
|
ring->head = I915_READ_HEAD(ring) & HEAD_ADDR;
|
|
|
|
ring->tail = I915_READ_TAIL(ring) & TAIL_ADDR;
|
2012-12-03 09:43:32 -07:00
|
|
|
ring->space = ring->head - (ring->tail + I915_RING_FREE_SPACE);
|
2005-04-16 16:20:36 -06:00
|
|
|
if (ring->space < 0)
|
2010-05-20 19:08:55 -06:00
|
|
|
ring->space += ring->size;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2008-11-27 21:22:24 -07:00
|
|
|
if (!dev->primary->master)
|
|
|
|
return;
|
|
|
|
|
|
|
|
master_priv = dev->primary->master->driver_priv;
|
|
|
|
if (ring->head == ring->tail && master_priv->sarea_priv)
|
|
|
|
master_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2007-07-10 23:53:27 -06:00
|
|
|
static int i915_dma_cleanup(struct drm_device * dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2007-11-21 21:14:14 -07:00
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
2010-12-04 04:30:53 -07:00
|
|
|
int i;
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
/* Make sure interrupts are disabled here because the uninstall ioctl
|
|
|
|
* may not have been called from userspace and after dev_private
|
|
|
|
* is freed, it's too late.
|
|
|
|
*/
|
2008-07-29 13:10:39 -06:00
|
|
|
if (dev->irq_enabled)
|
2005-09-24 22:28:13 -06:00
|
|
|
drm_irq_uninstall(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2010-06-23 05:19:55 -06:00
|
|
|
mutex_lock(&dev->struct_mutex);
|
2010-12-04 04:30:53 -07:00
|
|
|
for (i = 0; i < I915_NUM_RINGS; i++)
|
|
|
|
intel_cleanup_ring_buffer(&dev_priv->ring[i]);
|
2010-06-23 05:19:55 -06:00
|
|
|
mutex_unlock(&dev->struct_mutex);
|
2007-06-09 23:58:19 -06:00
|
|
|
|
2008-07-30 14:03:43 -06:00
|
|
|
/* Clear the HWS virtual address at teardown */
|
|
|
|
if (I915_NEED_GFX_HWS(dev))
|
|
|
|
i915_free_hws(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-11-21 21:14:14 -07:00
|
|
|
static int i915_initialize(struct drm_device * dev, drm_i915_init_t * init)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2007-11-21 21:14:14 -07:00
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
2008-11-27 21:22:24 -07:00
|
|
|
struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
|
2011-01-20 02:57:11 -07:00
|
|
|
int ret;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2009-01-10 16:03:49 -07:00
|
|
|
master_priv->sarea = drm_getsarea(dev);
|
|
|
|
if (master_priv->sarea) {
|
|
|
|
master_priv->sarea_priv = (drm_i915_sarea_t *)
|
|
|
|
((u8 *)master_priv->sarea->handle + init->sarea_priv_offset);
|
|
|
|
} else {
|
2009-07-19 23:48:04 -06:00
|
|
|
DRM_DEBUG_DRIVER("sarea not found assuming DRI2 userspace\n");
|
2009-01-10 16:03:49 -07:00
|
|
|
}
|
|
|
|
|
2008-07-30 13:06:12 -06:00
|
|
|
if (init->ring_size != 0) {
|
2011-01-20 02:57:11 -07:00
|
|
|
if (LP_RING(dev_priv)->obj != NULL) {
|
2008-07-30 13:06:12 -06:00
|
|
|
i915_dma_cleanup(dev);
|
|
|
|
DRM_ERROR("Client tried to initialize ringbuffer in "
|
|
|
|
"GEM mode\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2011-01-20 02:57:11 -07:00
|
|
|
ret = intel_render_ring_init_dri(dev,
|
|
|
|
init->ring_start,
|
|
|
|
init->ring_size);
|
|
|
|
if (ret) {
|
2008-07-30 13:06:12 -06:00
|
|
|
i915_dma_cleanup(dev);
|
2011-01-20 02:57:11 -07:00
|
|
|
return ret;
|
2008-07-30 13:06:12 -06:00
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2012-08-12 11:27:13 -06:00
|
|
|
dev_priv->dri1.cpp = init->cpp;
|
|
|
|
dev_priv->dri1.back_offset = init->back_offset;
|
|
|
|
dev_priv->dri1.front_offset = init->front_offset;
|
|
|
|
dev_priv->dri1.current_page = 0;
|
2008-11-27 21:22:24 -07:00
|
|
|
if (master_priv->sarea_priv)
|
|
|
|
master_priv->sarea_priv->pf_current_page = 0;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
/* Allow hardware batchbuffers unless told otherwise.
|
|
|
|
*/
|
2012-05-02 03:49:32 -06:00
|
|
|
dev_priv->dri1.allow_batchbuffer = 1;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-07-10 23:53:27 -06:00
|
|
|
static int i915_dma_resume(struct drm_device * dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
|
2010-12-04 04:30:53 -07:00
|
|
|
struct intel_ring_buffer *ring = LP_RING(dev_priv);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2009-07-19 23:48:04 -06:00
|
|
|
DRM_DEBUG_DRIVER("%s\n", __func__);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2012-04-26 15:28:16 -06:00
|
|
|
if (ring->virtual_start == NULL) {
|
2005-04-16 16:20:36 -06:00
|
|
|
DRM_ERROR("can not ioremap virtual address for"
|
|
|
|
" ring buffer\n");
|
2007-08-25 03:22:43 -06:00
|
|
|
return -ENOMEM;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Program Hardware Status Page */
|
2010-05-20 19:08:55 -06:00
|
|
|
if (!ring->status_page.page_addr) {
|
2005-04-16 16:20:36 -06:00
|
|
|
DRM_ERROR("Can not find hardware status page\n");
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2009-07-19 23:48:04 -06:00
|
|
|
DRM_DEBUG_DRIVER("hw status page @ %p\n",
|
2010-05-20 19:08:55 -06:00
|
|
|
ring->status_page.page_addr);
|
|
|
|
if (ring->status_page.gfx_addr != 0)
|
2010-10-27 05:18:21 -06:00
|
|
|
intel_ring_setup_status_page(ring);
|
2007-06-09 23:58:19 -06:00
|
|
|
else
|
2011-02-25 15:26:23 -07:00
|
|
|
i915_write_hws_pga(dev);
|
2010-05-20 19:08:55 -06:00
|
|
|
|
2009-07-19 23:48:04 -06:00
|
|
|
DRM_DEBUG_DRIVER("Enabled hardware status page\n");
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i915_dma_init(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2007-09-02 20:06:45 -06:00
|
|
|
drm_i915_init_t *init = data;
|
2005-04-16 16:20:36 -06:00
|
|
|
int retcode = 0;
|
|
|
|
|
2012-04-24 00:29:42 -06:00
|
|
|
if (drm_core_check_feature(dev, DRIVER_MODESET))
|
|
|
|
return -ENODEV;
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
switch (init->func) {
|
2005-04-16 16:20:36 -06:00
|
|
|
case I915_INIT_DMA:
|
2007-11-21 21:14:14 -07:00
|
|
|
retcode = i915_initialize(dev, init);
|
2005-04-16 16:20:36 -06:00
|
|
|
break;
|
|
|
|
case I915_CLEANUP_DMA:
|
|
|
|
retcode = i915_dma_cleanup(dev);
|
|
|
|
break;
|
|
|
|
case I915_RESUME_DMA:
|
2006-01-02 02:14:23 -07:00
|
|
|
retcode = i915_dma_resume(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
break;
|
|
|
|
default:
|
2007-08-25 03:22:43 -06:00
|
|
|
retcode = -EINVAL;
|
2005-04-16 16:20:36 -06:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return retcode;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Implement basically the same security restrictions as hardware does
|
|
|
|
* for MI_BATCH_NON_SECURE. These can be made stricter at any time.
|
|
|
|
*
|
|
|
|
* Most of the calculations below involve calculating the size of a
|
|
|
|
* particular instruction. It's important to get the size right as
|
|
|
|
* that tells us where the next instruction to check is. Any illegal
|
|
|
|
* instruction detected will be given a size of zero, which is a
|
|
|
|
* signal to abort the rest of the buffer.
|
|
|
|
*/
|
2010-10-27 05:45:26 -06:00
|
|
|
static int validate_cmd(int cmd)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
switch (((cmd >> 29) & 0x7)) {
|
|
|
|
case 0x0:
|
|
|
|
switch ((cmd >> 23) & 0x3f) {
|
|
|
|
case 0x0:
|
|
|
|
return 1; /* MI_NOOP */
|
|
|
|
case 0x4:
|
|
|
|
return 1; /* MI_FLUSH */
|
|
|
|
default:
|
|
|
|
return 0; /* disallow everything else */
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 0x1:
|
|
|
|
return 0; /* reserved */
|
|
|
|
case 0x2:
|
|
|
|
return (cmd & 0xff) + 2; /* 2d commands */
|
|
|
|
case 0x3:
|
|
|
|
if (((cmd >> 24) & 0x1f) <= 0x18)
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
switch ((cmd >> 24) & 0x1f) {
|
|
|
|
case 0x1c:
|
|
|
|
return 1;
|
|
|
|
case 0x1d:
|
2005-09-24 22:28:13 -06:00
|
|
|
switch ((cmd >> 16) & 0xff) {
|
2005-04-16 16:20:36 -06:00
|
|
|
case 0x3:
|
|
|
|
return (cmd & 0x1f) + 2;
|
|
|
|
case 0x4:
|
|
|
|
return (cmd & 0xf) + 2;
|
|
|
|
default:
|
|
|
|
return (cmd & 0xffff) + 2;
|
|
|
|
}
|
|
|
|
case 0x1e:
|
|
|
|
if (cmd & (1 << 23))
|
|
|
|
return (cmd & 0xffff) + 1;
|
|
|
|
else
|
|
|
|
return 1;
|
|
|
|
case 0x1f:
|
|
|
|
if ((cmd & (1 << 23)) == 0) /* inline vertices */
|
|
|
|
return (cmd & 0x1ffff) + 2;
|
|
|
|
else if (cmd & (1 << 17)) /* indirect random */
|
|
|
|
if ((cmd & 0xffff) == 0)
|
|
|
|
return 0; /* unknown length, too hard */
|
|
|
|
else
|
|
|
|
return (((cmd & 0xffff) + 1) / 2) + 1;
|
|
|
|
else
|
|
|
|
return 2; /* indirect sequential */
|
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-03-11 13:30:04 -06:00
|
|
|
static int i915_emit_cmds(struct drm_device * dev, int *buffer, int dwords)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
2010-10-27 05:45:26 -06:00
|
|
|
int i, ret;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2010-12-04 04:30:53 -07:00
|
|
|
if ((dwords+1) * sizeof(int) >= LP_RING(dev_priv)->size - 8)
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2006-01-24 21:31:43 -07:00
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
for (i = 0; i < dwords;) {
|
2010-10-27 05:45:26 -06:00
|
|
|
int sz = validate_cmd(buffer[i]);
|
|
|
|
if (sz == 0 || i + sz > dwords)
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2010-10-27 05:45:26 -06:00
|
|
|
i += sz;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2010-10-27 05:45:26 -06:00
|
|
|
ret = BEGIN_LP_RING((dwords+1)&~1);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
for (i = 0; i < dwords; i++)
|
|
|
|
OUT_RING(buffer[i]);
|
2006-01-24 21:31:43 -07:00
|
|
|
if (dwords & 1)
|
|
|
|
OUT_RING(0);
|
|
|
|
|
|
|
|
ADVANCE_LP_RING();
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-07-30 13:06:12 -06:00
|
|
|
int
|
|
|
|
i915_emit_box(struct drm_device *dev,
|
2010-11-30 07:10:25 -07:00
|
|
|
struct drm_clip_rect *box,
|
|
|
|
int DR1, int DR4)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2010-10-27 05:45:26 -06:00
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
int ret;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2010-11-30 07:10:25 -07:00
|
|
|
if (box->y2 <= box->y1 || box->x2 <= box->x1 ||
|
|
|
|
box->y2 <= 0 || box->x2 <= 0) {
|
2005-04-16 16:20:36 -06:00
|
|
|
DRM_ERROR("Bad box %d,%d..%d,%d\n",
|
2010-11-30 07:10:25 -07:00
|
|
|
box->x1, box->y1, box->x2, box->y2);
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2010-09-16 17:32:17 -06:00
|
|
|
if (INTEL_INFO(dev)->gen >= 4) {
|
2010-10-27 05:45:26 -06:00
|
|
|
ret = BEGIN_LP_RING(4);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2006-08-12 00:29:24 -06:00
|
|
|
OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
|
2010-11-30 07:10:25 -07:00
|
|
|
OUT_RING((box->x1 & 0xffff) | (box->y1 << 16));
|
|
|
|
OUT_RING(((box->x2 - 1) & 0xffff) | ((box->y2 - 1) << 16));
|
2006-08-12 00:29:24 -06:00
|
|
|
OUT_RING(DR4);
|
|
|
|
} else {
|
2010-10-27 05:45:26 -06:00
|
|
|
ret = BEGIN_LP_RING(6);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2006-08-12 00:29:24 -06:00
|
|
|
OUT_RING(GFX_OP_DRAWRECT_INFO);
|
|
|
|
OUT_RING(DR1);
|
2010-11-30 07:10:25 -07:00
|
|
|
OUT_RING((box->x1 & 0xffff) | (box->y1 << 16));
|
|
|
|
OUT_RING(((box->x2 - 1) & 0xffff) | ((box->y2 - 1) << 16));
|
2006-08-12 00:29:24 -06:00
|
|
|
OUT_RING(DR4);
|
|
|
|
OUT_RING(0);
|
|
|
|
}
|
2010-10-27 05:45:26 -06:00
|
|
|
ADVANCE_LP_RING();
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2006-08-12 00:29:24 -06:00
|
|
|
/* XXX: Emitting the counter should really be moved to part of the IRQ
|
|
|
|
* emit. For now, do it in both places:
|
|
|
|
*/
|
|
|
|
|
2007-07-10 23:53:27 -06:00
|
|
|
static void i915_emit_breadcrumb(struct drm_device *dev)
|
2006-01-24 21:31:43 -07:00
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
2008-11-27 21:22:24 -07:00
|
|
|
struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
|
2006-01-24 21:31:43 -07:00
|
|
|
|
2012-11-02 12:55:05 -06:00
|
|
|
dev_priv->dri1.counter++;
|
|
|
|
if (dev_priv->dri1.counter > 0x7FFFFFFFUL)
|
|
|
|
dev_priv->dri1.counter = 0;
|
2008-11-27 21:22:24 -07:00
|
|
|
if (master_priv->sarea_priv)
|
2012-11-02 12:55:05 -06:00
|
|
|
master_priv->sarea_priv->last_enqueue = dev_priv->dri1.counter;
|
2006-01-24 21:31:43 -07:00
|
|
|
|
2010-10-27 05:45:26 -06:00
|
|
|
if (BEGIN_LP_RING(4) == 0) {
|
|
|
|
OUT_RING(MI_STORE_DWORD_INDEX);
|
|
|
|
OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
|
2012-11-02 12:55:05 -06:00
|
|
|
OUT_RING(dev_priv->dri1.counter);
|
2010-10-27 05:45:26 -06:00
|
|
|
OUT_RING(0);
|
|
|
|
ADVANCE_LP_RING();
|
|
|
|
}
|
2006-01-24 21:31:43 -07:00
|
|
|
}
|
|
|
|
|
2007-07-10 23:53:27 -06:00
|
|
|
static int i915_dispatch_cmdbuffer(struct drm_device * dev,
|
2009-03-11 13:30:04 -06:00
|
|
|
drm_i915_cmdbuffer_t *cmd,
|
|
|
|
struct drm_clip_rect *cliprects,
|
|
|
|
void *cmdbuf)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
int nbox = cmd->num_cliprects;
|
|
|
|
int i = 0, count, ret;
|
|
|
|
|
|
|
|
if (cmd->sz & 0x3) {
|
|
|
|
DRM_ERROR("alignment");
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
i915_kernel_lost_context(dev);
|
|
|
|
|
|
|
|
count = nbox ? nbox : 1;
|
|
|
|
|
|
|
|
for (i = 0; i < count; i++) {
|
|
|
|
if (i < nbox) {
|
2010-11-30 07:10:25 -07:00
|
|
|
ret = i915_emit_box(dev, &cliprects[i],
|
2005-04-16 16:20:36 -06:00
|
|
|
cmd->DR1, cmd->DR4);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2009-03-11 13:30:04 -06:00
|
|
|
ret = i915_emit_cmds(dev, cmdbuf, cmd->sz / 4);
|
2005-04-16 16:20:36 -06:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2006-01-24 21:31:43 -07:00
|
|
|
i915_emit_breadcrumb(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-07-10 23:53:27 -06:00
|
|
|
static int i915_dispatch_batchbuffer(struct drm_device * dev,
|
2009-03-11 13:30:04 -06:00
|
|
|
drm_i915_batchbuffer_t * batch,
|
|
|
|
struct drm_clip_rect *cliprects)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2010-10-27 05:45:26 -06:00
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
2005-04-16 16:20:36 -06:00
|
|
|
int nbox = batch->num_cliprects;
|
2010-10-27 05:45:26 -06:00
|
|
|
int i, count, ret;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
if ((batch->start | batch->used) & 0x7) {
|
|
|
|
DRM_ERROR("alignment");
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
i915_kernel_lost_context(dev);
|
|
|
|
|
|
|
|
count = nbox ? nbox : 1;
|
|
|
|
for (i = 0; i < count; i++) {
|
|
|
|
if (i < nbox) {
|
2010-11-30 07:10:25 -07:00
|
|
|
ret = i915_emit_box(dev, &cliprects[i],
|
2010-10-27 05:45:26 -06:00
|
|
|
batch->DR1, batch->DR4);
|
2005-04-16 16:20:36 -06:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2008-07-30 13:28:47 -06:00
|
|
|
if (!IS_I830(dev) && !IS_845G(dev)) {
|
2010-10-27 05:45:26 -06:00
|
|
|
ret = BEGIN_LP_RING(2);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2010-09-16 17:32:17 -06:00
|
|
|
if (INTEL_INFO(dev)->gen >= 4) {
|
2007-08-06 17:09:51 -06:00
|
|
|
OUT_RING(MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965);
|
|
|
|
OUT_RING(batch->start);
|
|
|
|
} else {
|
|
|
|
OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
|
|
|
|
OUT_RING(batch->start | MI_BATCH_NON_SECURE);
|
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
} else {
|
2010-10-27 05:45:26 -06:00
|
|
|
ret = BEGIN_LP_RING(4);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
OUT_RING(MI_BATCH_BUFFER);
|
|
|
|
OUT_RING(batch->start | MI_BATCH_NON_SECURE);
|
|
|
|
OUT_RING(batch->start + batch->used - 4);
|
|
|
|
OUT_RING(0);
|
|
|
|
}
|
2010-10-27 05:45:26 -06:00
|
|
|
ADVANCE_LP_RING();
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2010-06-24 23:40:24 -06:00
|
|
|
|
2010-10-21 07:57:17 -06:00
|
|
|
if (IS_G4X(dev) || IS_GEN5(dev)) {
|
2010-10-27 05:45:26 -06:00
|
|
|
if (BEGIN_LP_RING(2) == 0) {
|
|
|
|
OUT_RING(MI_FLUSH | MI_NO_WRITE_FLUSH | MI_INVALIDATE_ISP);
|
|
|
|
OUT_RING(MI_NOOP);
|
|
|
|
ADVANCE_LP_RING();
|
|
|
|
}
|
2010-06-24 23:40:24 -06:00
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2010-10-27 05:45:26 -06:00
|
|
|
i915_emit_breadcrumb(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-05-06 20:15:39 -06:00
|
|
|
static int i915_dispatch_flip(struct drm_device * dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
2008-11-27 21:22:24 -07:00
|
|
|
struct drm_i915_master_private *master_priv =
|
|
|
|
dev->primary->master->driver_priv;
|
2010-10-27 05:45:26 -06:00
|
|
|
int ret;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2008-11-27 21:22:24 -07:00
|
|
|
if (!master_priv->sarea_priv)
|
2008-08-20 09:20:13 -06:00
|
|
|
return -EINVAL;
|
|
|
|
|
2009-07-19 23:48:04 -06:00
|
|
|
DRM_DEBUG_DRIVER("%s: page=%d pfCurrentPage=%d\n",
|
2009-06-02 00:13:55 -06:00
|
|
|
__func__,
|
2012-08-12 11:27:13 -06:00
|
|
|
dev_priv->dri1.current_page,
|
2009-06-02 00:13:55 -06:00
|
|
|
master_priv->sarea_priv->pf_current_page);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2008-05-06 20:15:39 -06:00
|
|
|
i915_kernel_lost_context(dev);
|
|
|
|
|
2010-10-27 05:45:26 -06:00
|
|
|
ret = BEGIN_LP_RING(10);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2008-07-29 12:54:06 -06:00
|
|
|
OUT_RING(MI_FLUSH | MI_READ_FLUSH);
|
2008-05-06 20:15:39 -06:00
|
|
|
OUT_RING(0);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2008-05-06 20:15:39 -06:00
|
|
|
OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP);
|
|
|
|
OUT_RING(0);
|
2012-08-12 11:27:13 -06:00
|
|
|
if (dev_priv->dri1.current_page == 0) {
|
|
|
|
OUT_RING(dev_priv->dri1.back_offset);
|
|
|
|
dev_priv->dri1.current_page = 1;
|
2005-04-16 16:20:36 -06:00
|
|
|
} else {
|
2012-08-12 11:27:13 -06:00
|
|
|
OUT_RING(dev_priv->dri1.front_offset);
|
|
|
|
dev_priv->dri1.current_page = 0;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
2008-05-06 20:15:39 -06:00
|
|
|
OUT_RING(0);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2008-05-06 20:15:39 -06:00
|
|
|
OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP);
|
|
|
|
OUT_RING(0);
|
2010-10-27 05:45:26 -06:00
|
|
|
|
2008-05-06 20:15:39 -06:00
|
|
|
ADVANCE_LP_RING();
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2012-11-02 12:55:05 -06:00
|
|
|
master_priv->sarea_priv->last_enqueue = dev_priv->dri1.counter++;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2010-10-27 05:45:26 -06:00
|
|
|
if (BEGIN_LP_RING(4) == 0) {
|
|
|
|
OUT_RING(MI_STORE_DWORD_INDEX);
|
|
|
|
OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
|
2012-11-02 12:55:05 -06:00
|
|
|
OUT_RING(dev_priv->dri1.counter);
|
2010-10-27 05:45:26 -06:00
|
|
|
OUT_RING(0);
|
|
|
|
ADVANCE_LP_RING();
|
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2012-08-12 11:27:13 -06:00
|
|
|
master_priv->sarea_priv->pf_current_page = dev_priv->dri1.current_page;
|
2008-05-06 20:15:39 -06:00
|
|
|
return 0;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2010-12-04 04:30:53 -07:00
|
|
|
static int i915_quiescent(struct drm_device *dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
i915_kernel_lost_context(dev);
|
2012-11-27 09:22:54 -07:00
|
|
|
return intel_ring_idle(LP_RING(dev->dev_private));
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i915_flush_ioctl(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2008-09-01 17:45:29 -06:00
|
|
|
int ret;
|
|
|
|
|
2012-04-24 00:29:42 -06:00
|
|
|
if (drm_core_check_feature(dev, DRIVER_MODESET))
|
|
|
|
return -ENODEV;
|
|
|
|
|
2008-09-01 17:45:29 -06:00
|
|
|
RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2008-09-01 17:45:29 -06:00
|
|
|
mutex_lock(&dev->struct_mutex);
|
|
|
|
ret = i915_quiescent(dev);
|
|
|
|
mutex_unlock(&dev->struct_mutex);
|
|
|
|
|
|
|
|
return ret;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i915_batchbuffer(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
|
2008-11-27 21:22:24 -07:00
|
|
|
struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
|
2005-04-16 16:20:36 -06:00
|
|
|
drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
|
2008-11-27 21:22:24 -07:00
|
|
|
master_priv->sarea_priv;
|
2007-09-02 20:06:45 -06:00
|
|
|
drm_i915_batchbuffer_t *batch = data;
|
2005-04-16 16:20:36 -06:00
|
|
|
int ret;
|
2009-03-11 13:30:04 -06:00
|
|
|
struct drm_clip_rect *cliprects = NULL;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2012-04-24 00:29:42 -06:00
|
|
|
if (drm_core_check_feature(dev, DRIVER_MODESET))
|
|
|
|
return -ENODEV;
|
|
|
|
|
2012-05-02 03:49:32 -06:00
|
|
|
if (!dev_priv->dri1.allow_batchbuffer) {
|
2005-04-16 16:20:36 -06:00
|
|
|
DRM_ERROR("Batchbuffer ioctl disabled\n");
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2009-07-19 23:48:04 -06:00
|
|
|
DRM_DEBUG_DRIVER("i915 batchbuffer, start %x used %d cliprects %d\n",
|
2009-06-02 00:13:55 -06:00
|
|
|
batch->start, batch->used, batch->num_cliprects);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2008-09-01 17:45:29 -06:00
|
|
|
RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2009-03-11 13:30:04 -06:00
|
|
|
if (batch->num_cliprects < 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (batch->num_cliprects) {
|
2009-03-24 13:23:04 -06:00
|
|
|
cliprects = kcalloc(batch->num_cliprects,
|
|
|
|
sizeof(struct drm_clip_rect),
|
|
|
|
GFP_KERNEL);
|
2009-03-11 13:30:04 -06:00
|
|
|
if (cliprects == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
ret = copy_from_user(cliprects, batch->cliprects,
|
|
|
|
batch->num_cliprects *
|
|
|
|
sizeof(struct drm_clip_rect));
|
2010-06-19 07:12:51 -06:00
|
|
|
if (ret != 0) {
|
|
|
|
ret = -EFAULT;
|
2009-03-11 13:30:04 -06:00
|
|
|
goto fail_free;
|
2010-06-19 07:12:51 -06:00
|
|
|
}
|
2009-03-11 13:30:04 -06:00
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2008-09-01 17:45:29 -06:00
|
|
|
mutex_lock(&dev->struct_mutex);
|
2009-03-11 13:30:04 -06:00
|
|
|
ret = i915_dispatch_batchbuffer(dev, batch, cliprects);
|
2008-09-01 17:45:29 -06:00
|
|
|
mutex_unlock(&dev->struct_mutex);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2008-08-20 09:20:13 -06:00
|
|
|
if (sarea_priv)
|
2008-11-07 18:44:14 -07:00
|
|
|
sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
|
2009-03-11 13:30:04 -06:00
|
|
|
|
|
|
|
fail_free:
|
2009-03-24 13:23:04 -06:00
|
|
|
kfree(cliprects);
|
2009-03-11 13:30:04 -06:00
|
|
|
|
2005-04-16 16:20:36 -06:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i915_cmdbuffer(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
|
2008-11-27 21:22:24 -07:00
|
|
|
struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
|
2005-04-16 16:20:36 -06:00
|
|
|
drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
|
2008-11-27 21:22:24 -07:00
|
|
|
master_priv->sarea_priv;
|
2007-09-02 20:06:45 -06:00
|
|
|
drm_i915_cmdbuffer_t *cmdbuf = data;
|
2009-03-11 13:30:04 -06:00
|
|
|
struct drm_clip_rect *cliprects = NULL;
|
|
|
|
void *batch_data;
|
2005-04-16 16:20:36 -06:00
|
|
|
int ret;
|
|
|
|
|
2009-07-19 23:48:04 -06:00
|
|
|
DRM_DEBUG_DRIVER("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
|
2009-06-02 00:13:55 -06:00
|
|
|
cmdbuf->buf, cmdbuf->sz, cmdbuf->num_cliprects);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2012-04-24 00:29:42 -06:00
|
|
|
if (drm_core_check_feature(dev, DRIVER_MODESET))
|
|
|
|
return -ENODEV;
|
|
|
|
|
2008-09-01 17:45:29 -06:00
|
|
|
RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2009-03-11 13:30:04 -06:00
|
|
|
if (cmdbuf->num_cliprects < 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2009-03-24 13:23:04 -06:00
|
|
|
batch_data = kmalloc(cmdbuf->sz, GFP_KERNEL);
|
2009-03-11 13:30:04 -06:00
|
|
|
if (batch_data == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
ret = copy_from_user(batch_data, cmdbuf->buf, cmdbuf->sz);
|
2010-06-19 07:12:51 -06:00
|
|
|
if (ret != 0) {
|
|
|
|
ret = -EFAULT;
|
2009-03-11 13:30:04 -06:00
|
|
|
goto fail_batch_free;
|
2010-06-19 07:12:51 -06:00
|
|
|
}
|
2009-03-11 13:30:04 -06:00
|
|
|
|
|
|
|
if (cmdbuf->num_cliprects) {
|
2009-03-24 13:23:04 -06:00
|
|
|
cliprects = kcalloc(cmdbuf->num_cliprects,
|
|
|
|
sizeof(struct drm_clip_rect), GFP_KERNEL);
|
2010-02-09 07:25:55 -07:00
|
|
|
if (cliprects == NULL) {
|
|
|
|
ret = -ENOMEM;
|
2009-03-11 13:30:04 -06:00
|
|
|
goto fail_batch_free;
|
2010-02-09 07:25:55 -07:00
|
|
|
}
|
2009-03-11 13:30:04 -06:00
|
|
|
|
|
|
|
ret = copy_from_user(cliprects, cmdbuf->cliprects,
|
|
|
|
cmdbuf->num_cliprects *
|
|
|
|
sizeof(struct drm_clip_rect));
|
2010-06-19 07:12:51 -06:00
|
|
|
if (ret != 0) {
|
|
|
|
ret = -EFAULT;
|
2009-03-11 13:30:04 -06:00
|
|
|
goto fail_clip_free;
|
2010-06-19 07:12:51 -06:00
|
|
|
}
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2008-09-01 17:45:29 -06:00
|
|
|
mutex_lock(&dev->struct_mutex);
|
2009-03-11 13:30:04 -06:00
|
|
|
ret = i915_dispatch_cmdbuffer(dev, cmdbuf, cliprects, batch_data);
|
2008-09-01 17:45:29 -06:00
|
|
|
mutex_unlock(&dev->struct_mutex);
|
2005-04-16 16:20:36 -06:00
|
|
|
if (ret) {
|
|
|
|
DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
|
2009-04-16 19:18:55 -06:00
|
|
|
goto fail_clip_free;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2008-08-20 09:20:13 -06:00
|
|
|
if (sarea_priv)
|
2008-11-07 18:44:14 -07:00
|
|
|
sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
|
2009-03-11 13:30:04 -06:00
|
|
|
|
|
|
|
fail_clip_free:
|
2009-03-24 13:23:04 -06:00
|
|
|
kfree(cliprects);
|
2009-04-16 19:18:55 -06:00
|
|
|
fail_batch_free:
|
2009-03-24 13:23:04 -06:00
|
|
|
kfree(batch_data);
|
2009-03-11 13:30:04 -06:00
|
|
|
|
|
|
|
return ret;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2012-04-26 15:28:08 -06:00
|
|
|
static int i915_emit_irq(struct drm_device * dev)
|
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
|
|
struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
|
|
|
|
|
|
|
|
i915_kernel_lost_context(dev);
|
|
|
|
|
|
|
|
DRM_DEBUG_DRIVER("\n");
|
|
|
|
|
2012-11-02 12:55:05 -06:00
|
|
|
dev_priv->dri1.counter++;
|
|
|
|
if (dev_priv->dri1.counter > 0x7FFFFFFFUL)
|
|
|
|
dev_priv->dri1.counter = 1;
|
2012-04-26 15:28:08 -06:00
|
|
|
if (master_priv->sarea_priv)
|
2012-11-02 12:55:05 -06:00
|
|
|
master_priv->sarea_priv->last_enqueue = dev_priv->dri1.counter;
|
2012-04-26 15:28:08 -06:00
|
|
|
|
|
|
|
if (BEGIN_LP_RING(4) == 0) {
|
|
|
|
OUT_RING(MI_STORE_DWORD_INDEX);
|
|
|
|
OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
|
2012-11-02 12:55:05 -06:00
|
|
|
OUT_RING(dev_priv->dri1.counter);
|
2012-04-26 15:28:08 -06:00
|
|
|
OUT_RING(MI_USER_INTERRUPT);
|
|
|
|
ADVANCE_LP_RING();
|
|
|
|
}
|
|
|
|
|
2012-11-02 12:55:05 -06:00
|
|
|
return dev_priv->dri1.counter;
|
2012-04-26 15:28:08 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
static int i915_wait_irq(struct drm_device * dev, int irq_nr)
|
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
|
|
|
|
struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv;
|
|
|
|
int ret = 0;
|
|
|
|
struct intel_ring_buffer *ring = LP_RING(dev_priv);
|
|
|
|
|
|
|
|
DRM_DEBUG_DRIVER("irq_nr=%d breadcrumb=%d\n", irq_nr,
|
|
|
|
READ_BREADCRUMB(dev_priv));
|
|
|
|
|
|
|
|
if (READ_BREADCRUMB(dev_priv) >= irq_nr) {
|
|
|
|
if (master_priv->sarea_priv)
|
|
|
|
master_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (master_priv->sarea_priv)
|
|
|
|
master_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
|
|
|
|
|
|
|
|
if (ring->irq_get(ring)) {
|
|
|
|
DRM_WAIT_ON(ret, ring->irq_queue, 3 * DRM_HZ,
|
|
|
|
READ_BREADCRUMB(dev_priv) >= irq_nr);
|
|
|
|
ring->irq_put(ring);
|
|
|
|
} else if (wait_for(READ_BREADCRUMB(dev_priv) >= irq_nr, 3000))
|
|
|
|
ret = -EBUSY;
|
|
|
|
|
|
|
|
if (ret == -EBUSY) {
|
|
|
|
DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
|
2012-11-02 12:55:05 -06:00
|
|
|
READ_BREADCRUMB(dev_priv), (int)dev_priv->dri1.counter);
|
2012-04-26 15:28:08 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Needs the lock as it touches the ring.
|
|
|
|
*/
|
|
|
|
static int i915_irq_emit(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
|
|
drm_i915_irq_emit_t *emit = data;
|
|
|
|
int result;
|
|
|
|
|
|
|
|
if (drm_core_check_feature(dev, DRIVER_MODESET))
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
if (!dev_priv || !LP_RING(dev_priv)->virtual_start) {
|
|
|
|
DRM_ERROR("called with no initialization\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
|
|
|
|
|
|
|
|
mutex_lock(&dev->struct_mutex);
|
|
|
|
result = i915_emit_irq(dev);
|
|
|
|
mutex_unlock(&dev->struct_mutex);
|
|
|
|
|
|
|
|
if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
|
|
|
|
DRM_ERROR("copy_to_user\n");
|
|
|
|
return -EFAULT;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Doesn't need the hardware lock.
|
|
|
|
*/
|
|
|
|
static int i915_irq_wait(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
|
|
drm_i915_irq_wait_t *irqwait = data;
|
|
|
|
|
|
|
|
if (drm_core_check_feature(dev, DRIVER_MODESET))
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
if (!dev_priv) {
|
|
|
|
DRM_ERROR("called with no initialization\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return i915_wait_irq(dev, irqwait->irq_seq);
|
|
|
|
}
|
|
|
|
|
2012-04-26 15:28:01 -06:00
|
|
|
static int i915_vblank_pipe_get(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
|
|
drm_i915_vblank_pipe_t *pipe = data;
|
|
|
|
|
|
|
|
if (drm_core_check_feature(dev, DRIVER_MODESET))
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
if (!dev_priv) {
|
|
|
|
DRM_ERROR("called with no initialization\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
pipe->pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* Schedule buffer swap at given vertical blank.
|
|
|
|
*/
|
|
|
|
static int i915_vblank_swap(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
|
|
|
{
|
|
|
|
/* The delayed swap mechanism was fundamentally racy, and has been
|
|
|
|
* removed. The model was that the client requested a delayed flip/swap
|
|
|
|
* from the kernel, then waited for vblank before continuing to perform
|
|
|
|
* rendering. The problem was that the kernel might wake the client
|
|
|
|
* up before it dispatched the vblank swap (since the lock has to be
|
|
|
|
* held while touching the ringbuffer), in which case the client would
|
|
|
|
* clear and start the next frame before the swap occurred, and
|
|
|
|
* flicker would occur in addition to likely missing the vblank.
|
|
|
|
*
|
|
|
|
* In the absence of this ioctl, userland falls back to a correct path
|
|
|
|
* of waiting for a vblank, then dispatching the swap on its own.
|
|
|
|
* Context switching to userland and back is plenty fast enough for
|
|
|
|
* meeting the requirements of vblank swapping.
|
|
|
|
*/
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i915_flip_bufs(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2008-09-01 17:45:29 -06:00
|
|
|
int ret;
|
|
|
|
|
2012-04-24 00:29:42 -06:00
|
|
|
if (drm_core_check_feature(dev, DRIVER_MODESET))
|
|
|
|
return -ENODEV;
|
|
|
|
|
2009-07-19 23:48:04 -06:00
|
|
|
DRM_DEBUG_DRIVER("%s\n", __func__);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2008-09-01 17:45:29 -06:00
|
|
|
RING_LOCK_TEST_WITH_RETURN(dev, file_priv);
|
2005-04-16 16:20:36 -06:00
|
|
|
|
2008-09-01 17:45:29 -06:00
|
|
|
mutex_lock(&dev->struct_mutex);
|
|
|
|
ret = i915_dispatch_flip(dev);
|
|
|
|
mutex_unlock(&dev->struct_mutex);
|
|
|
|
|
|
|
|
return ret;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i915_getparam(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
2007-09-02 20:06:45 -06:00
|
|
|
drm_i915_getparam_t *param = data;
|
2005-04-16 16:20:36 -06:00
|
|
|
int value;
|
|
|
|
|
|
|
|
if (!dev_priv) {
|
2008-01-23 22:58:57 -07:00
|
|
|
DRM_ERROR("called with no initialization\n");
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
switch (param->param) {
|
2005-04-16 16:20:36 -06:00
|
|
|
case I915_PARAM_IRQ_ACTIVE:
|
2008-09-30 13:14:26 -06:00
|
|
|
value = dev->pdev->irq ? 1 : 0;
|
2005-04-16 16:20:36 -06:00
|
|
|
break;
|
|
|
|
case I915_PARAM_ALLOW_BATCHBUFFER:
|
2012-05-02 03:49:32 -06:00
|
|
|
value = dev_priv->dri1.allow_batchbuffer ? 1 : 0;
|
2005-04-16 16:20:36 -06:00
|
|
|
break;
|
2006-01-02 02:14:23 -07:00
|
|
|
case I915_PARAM_LAST_DISPATCH:
|
|
|
|
value = READ_BREADCRUMB(dev_priv);
|
|
|
|
break;
|
2008-08-20 09:08:52 -06:00
|
|
|
case I915_PARAM_CHIPSET_ID:
|
|
|
|
value = dev->pci_device;
|
|
|
|
break;
|
2008-07-30 13:06:12 -06:00
|
|
|
case I915_PARAM_HAS_GEM:
|
2012-04-23 08:50:51 -06:00
|
|
|
value = 1;
|
2008-07-30 13:06:12 -06:00
|
|
|
break;
|
2009-01-26 18:10:45 -07:00
|
|
|
case I915_PARAM_NUM_FENCES_AVAIL:
|
|
|
|
value = dev_priv->num_fence_regs - dev_priv->fence_reg_start;
|
|
|
|
break;
|
2009-09-15 14:57:34 -06:00
|
|
|
case I915_PARAM_HAS_OVERLAY:
|
|
|
|
value = dev_priv->overlay ? 1 : 0;
|
|
|
|
break;
|
2009-11-19 11:49:07 -07:00
|
|
|
case I915_PARAM_HAS_PAGEFLIPPING:
|
|
|
|
value = 1;
|
|
|
|
break;
|
2009-12-17 20:05:42 -07:00
|
|
|
case I915_PARAM_HAS_EXECBUF2:
|
|
|
|
/* depends on GEM */
|
2012-04-23 08:50:51 -06:00
|
|
|
value = 1;
|
2009-12-17 20:05:42 -07:00
|
|
|
break;
|
2010-05-30 23:58:47 -06:00
|
|
|
case I915_PARAM_HAS_BSD:
|
2012-05-11 07:29:32 -06:00
|
|
|
value = intel_ring_initialized(&dev_priv->ring[VCS]);
|
2010-05-30 23:58:47 -06:00
|
|
|
break;
|
2010-10-19 04:19:32 -06:00
|
|
|
case I915_PARAM_HAS_BLT:
|
2012-05-11 07:29:32 -06:00
|
|
|
value = intel_ring_initialized(&dev_priv->ring[BCS]);
|
2010-10-19 04:19:32 -06:00
|
|
|
break;
|
2013-05-28 20:22:34 -06:00
|
|
|
case I915_PARAM_HAS_VEBOX:
|
|
|
|
value = intel_ring_initialized(&dev_priv->ring[VECS]);
|
|
|
|
break;
|
2010-09-24 14:15:47 -06:00
|
|
|
case I915_PARAM_HAS_RELAXED_FENCING:
|
|
|
|
value = 1;
|
|
|
|
break;
|
2010-12-05 03:30:40 -07:00
|
|
|
case I915_PARAM_HAS_COHERENT_RINGS:
|
|
|
|
value = 1;
|
|
|
|
break;
|
2010-12-19 04:42:05 -07:00
|
|
|
case I915_PARAM_HAS_EXEC_CONSTANTS:
|
|
|
|
value = INTEL_INFO(dev)->gen >= 4;
|
|
|
|
break;
|
2011-03-01 08:24:41 -07:00
|
|
|
case I915_PARAM_HAS_RELAXED_DELTA:
|
|
|
|
value = 1;
|
|
|
|
break;
|
2012-01-03 10:23:29 -07:00
|
|
|
case I915_PARAM_HAS_GEN7_SOL_RESET:
|
|
|
|
value = 1;
|
|
|
|
break;
|
2012-01-17 09:43:53 -07:00
|
|
|
case I915_PARAM_HAS_LLC:
|
|
|
|
value = HAS_LLC(dev);
|
|
|
|
break;
|
2012-02-15 15:50:25 -07:00
|
|
|
case I915_PARAM_HAS_ALIASING_PPGTT:
|
|
|
|
value = dev_priv->mm.aliasing_ppgtt ? 1 : 0;
|
|
|
|
break;
|
2012-06-05 16:24:25 -06:00
|
|
|
case I915_PARAM_HAS_WAIT_TIMEOUT:
|
|
|
|
value = 1;
|
|
|
|
break;
|
2012-08-08 03:23:22 -06:00
|
|
|
case I915_PARAM_HAS_SEMAPHORES:
|
|
|
|
value = i915_semaphore_is_enabled(dev);
|
|
|
|
break;
|
2012-08-15 18:15:34 -06:00
|
|
|
case I915_PARAM_HAS_PRIME_VMAP_FLUSH:
|
|
|
|
value = 1;
|
|
|
|
break;
|
2012-10-17 05:09:54 -06:00
|
|
|
case I915_PARAM_HAS_SECURE_BATCHES:
|
|
|
|
value = capable(CAP_SYS_ADMIN);
|
|
|
|
break;
|
2012-12-17 08:21:27 -07:00
|
|
|
case I915_PARAM_HAS_PINNED_BATCHES:
|
|
|
|
value = 1;
|
|
|
|
break;
|
2013-01-17 14:23:36 -07:00
|
|
|
case I915_PARAM_HAS_EXEC_NO_RELOC:
|
|
|
|
value = 1;
|
|
|
|
break;
|
2013-01-08 03:53:17 -07:00
|
|
|
case I915_PARAM_HAS_EXEC_HANDLE_LUT:
|
|
|
|
value = 1;
|
|
|
|
break;
|
2005-04-16 16:20:36 -06:00
|
|
|
default:
|
2013-05-31 12:28:45 -06:00
|
|
|
DRM_DEBUG("Unknown parameter %d\n", param->param);
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) {
|
2005-04-16 16:20:36 -06:00
|
|
|
DRM_ERROR("DRM_COPY_TO_USER failed\n");
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EFAULT;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i915_setparam(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
2007-09-02 20:06:45 -06:00
|
|
|
drm_i915_setparam_t *param = data;
|
2005-04-16 16:20:36 -06:00
|
|
|
|
|
|
|
if (!dev_priv) {
|
2008-01-23 22:58:57 -07:00
|
|
|
DRM_ERROR("called with no initialization\n");
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
switch (param->param) {
|
2005-04-16 16:20:36 -06:00
|
|
|
case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
|
|
|
|
break;
|
|
|
|
case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
|
|
|
|
break;
|
|
|
|
case I915_SETPARAM_ALLOW_BATCHBUFFER:
|
2012-05-02 03:49:32 -06:00
|
|
|
dev_priv->dri1.allow_batchbuffer = param->value ? 1 : 0;
|
2005-04-16 16:20:36 -06:00
|
|
|
break;
|
2009-01-26 18:10:45 -07:00
|
|
|
case I915_SETPARAM_NUM_USED_FENCES:
|
|
|
|
if (param->value > dev_priv->num_fence_regs ||
|
|
|
|
param->value < 0)
|
|
|
|
return -EINVAL;
|
|
|
|
/* Userspace can use first N regs */
|
|
|
|
dev_priv->fence_reg_start = param->value;
|
|
|
|
break;
|
2005-04-16 16:20:36 -06:00
|
|
|
default:
|
2009-07-19 23:48:04 -06:00
|
|
|
DRM_DEBUG_DRIVER("unknown parameter %d\n",
|
2009-06-02 00:13:55 -06:00
|
|
|
param->param);
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
static int i915_set_status_page(struct drm_device *dev, void *data,
|
|
|
|
struct drm_file *file_priv)
|
2007-06-09 23:58:19 -06:00
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
2007-09-02 20:06:45 -06:00
|
|
|
drm_i915_hws_addr_t *hws = data;
|
2012-11-12 05:20:19 -07:00
|
|
|
struct intel_ring_buffer *ring;
|
2008-02-19 03:59:09 -07:00
|
|
|
|
2012-04-24 00:29:42 -06:00
|
|
|
if (drm_core_check_feature(dev, DRIVER_MODESET))
|
|
|
|
return -ENODEV;
|
|
|
|
|
2008-02-19 03:59:09 -07:00
|
|
|
if (!I915_NEED_GFX_HWS(dev))
|
|
|
|
return -EINVAL;
|
2007-06-09 23:58:19 -06:00
|
|
|
|
|
|
|
if (!dev_priv) {
|
2008-01-23 22:58:57 -07:00
|
|
|
DRM_ERROR("called with no initialization\n");
|
2007-08-25 03:22:43 -06:00
|
|
|
return -EINVAL;
|
2007-06-09 23:58:19 -06:00
|
|
|
}
|
|
|
|
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
if (drm_core_check_feature(dev, DRIVER_MODESET)) {
|
|
|
|
WARN(1, "tried to set status page when mode setting active\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-07-19 23:48:04 -06:00
|
|
|
DRM_DEBUG_DRIVER("set status page addr 0x%08x\n", (u32)hws->addr);
|
2007-09-02 20:06:45 -06:00
|
|
|
|
2012-11-12 05:20:19 -07:00
|
|
|
ring = LP_RING(dev_priv);
|
2010-05-20 19:08:55 -06:00
|
|
|
ring->status_page.gfx_addr = hws->addr & (0x1ffff<<12);
|
2007-06-09 23:58:19 -06:00
|
|
|
|
2012-06-07 07:55:57 -06:00
|
|
|
dev_priv->dri1.gfx_hws_cpu_addr =
|
2013-01-17 13:45:15 -07:00
|
|
|
ioremap_wc(dev_priv->gtt.mappable_base + hws->addr, 4096);
|
2012-04-26 15:28:15 -06:00
|
|
|
if (dev_priv->dri1.gfx_hws_cpu_addr == NULL) {
|
2007-06-09 23:58:19 -06:00
|
|
|
i915_dma_cleanup(dev);
|
2010-05-26 15:51:06 -06:00
|
|
|
ring->status_page.gfx_addr = 0;
|
2007-06-09 23:58:19 -06:00
|
|
|
DRM_ERROR("can not ioremap virtual address for"
|
|
|
|
" G33 hw status page\n");
|
2007-08-25 03:22:43 -06:00
|
|
|
return -ENOMEM;
|
2007-06-09 23:58:19 -06:00
|
|
|
}
|
2012-04-26 15:28:15 -06:00
|
|
|
|
|
|
|
memset_io(dev_priv->dri1.gfx_hws_cpu_addr, 0, PAGE_SIZE);
|
2010-05-20 19:08:55 -06:00
|
|
|
I915_WRITE(HWS_PGA, ring->status_page.gfx_addr);
|
2007-06-09 23:58:19 -06:00
|
|
|
|
2009-07-19 23:48:04 -06:00
|
|
|
DRM_DEBUG_DRIVER("load hws HWS_PGA with gfx mem 0x%x\n",
|
2010-05-26 15:51:06 -06:00
|
|
|
ring->status_page.gfx_addr);
|
2009-07-19 23:48:04 -06:00
|
|
|
DRM_DEBUG_DRIVER("load hws at %p\n",
|
2010-05-26 15:51:06 -06:00
|
|
|
ring->status_page.page_addr);
|
2007-06-09 23:58:19 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-08-03 19:43:41 -06:00
|
|
|
static int i915_get_bridge_dev(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
|
2011-08-16 13:34:10 -06:00
|
|
|
dev_priv->bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
|
2009-08-03 19:43:41 -06:00
|
|
|
if (!dev_priv->bridge_dev) {
|
|
|
|
DRM_ERROR("bridge device not found\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-12-16 23:48:43 -07:00
|
|
|
#define MCHBAR_I915 0x44
|
|
|
|
#define MCHBAR_I965 0x48
|
|
|
|
#define MCHBAR_SIZE (4*4096)
|
|
|
|
|
|
|
|
#define DEVEN_REG 0x54
|
|
|
|
#define DEVEN_MCHBAR_EN (1 << 28)
|
|
|
|
|
|
|
|
/* Allocate space for the MCH regs if needed, return nonzero on error */
|
|
|
|
static int
|
|
|
|
intel_alloc_mchbar_resource(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
2010-09-16 17:32:17 -06:00
|
|
|
int reg = INTEL_INFO(dev)->gen >= 4 ? MCHBAR_I965 : MCHBAR_I915;
|
2009-12-16 23:48:43 -07:00
|
|
|
u32 temp_lo, temp_hi = 0;
|
|
|
|
u64 mchbar_addr;
|
2010-08-20 07:36:45 -06:00
|
|
|
int ret;
|
2009-12-16 23:48:43 -07:00
|
|
|
|
2010-09-16 17:32:17 -06:00
|
|
|
if (INTEL_INFO(dev)->gen >= 4)
|
2009-12-16 23:48:43 -07:00
|
|
|
pci_read_config_dword(dev_priv->bridge_dev, reg + 4, &temp_hi);
|
|
|
|
pci_read_config_dword(dev_priv->bridge_dev, reg, &temp_lo);
|
|
|
|
mchbar_addr = ((u64)temp_hi << 32) | temp_lo;
|
|
|
|
|
|
|
|
/* If ACPI doesn't have it, assume we need to allocate it ourselves */
|
|
|
|
#ifdef CONFIG_PNP
|
|
|
|
if (mchbar_addr &&
|
2010-08-20 07:36:45 -06:00
|
|
|
pnp_range_reserved(mchbar_addr, mchbar_addr + MCHBAR_SIZE))
|
|
|
|
return 0;
|
2009-12-16 23:48:43 -07:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Get some space for it */
|
2010-08-20 07:36:45 -06:00
|
|
|
dev_priv->mch_res.name = "i915 MCHBAR";
|
|
|
|
dev_priv->mch_res.flags = IORESOURCE_MEM;
|
|
|
|
ret = pci_bus_alloc_resource(dev_priv->bridge_dev->bus,
|
|
|
|
&dev_priv->mch_res,
|
2009-12-16 23:48:43 -07:00
|
|
|
MCHBAR_SIZE, MCHBAR_SIZE,
|
|
|
|
PCIBIOS_MIN_MEM,
|
2010-08-20 07:36:45 -06:00
|
|
|
0, pcibios_align_resource,
|
2009-12-16 23:48:43 -07:00
|
|
|
dev_priv->bridge_dev);
|
|
|
|
if (ret) {
|
|
|
|
DRM_DEBUG_DRIVER("failed bus alloc: %d\n", ret);
|
|
|
|
dev_priv->mch_res.start = 0;
|
2010-08-20 07:36:45 -06:00
|
|
|
return ret;
|
2009-12-16 23:48:43 -07:00
|
|
|
}
|
|
|
|
|
2010-09-16 17:32:17 -06:00
|
|
|
if (INTEL_INFO(dev)->gen >= 4)
|
2009-12-16 23:48:43 -07:00
|
|
|
pci_write_config_dword(dev_priv->bridge_dev, reg + 4,
|
|
|
|
upper_32_bits(dev_priv->mch_res.start));
|
|
|
|
|
|
|
|
pci_write_config_dword(dev_priv->bridge_dev, reg,
|
|
|
|
lower_32_bits(dev_priv->mch_res.start));
|
2010-08-20 07:36:45 -06:00
|
|
|
return 0;
|
2009-12-16 23:48:43 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Setup MCHBAR if possible, return true if we should disable it again */
|
|
|
|
static void
|
|
|
|
intel_setup_mchbar(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
2010-09-16 17:32:17 -06:00
|
|
|
int mchbar_reg = INTEL_INFO(dev)->gen >= 4 ? MCHBAR_I965 : MCHBAR_I915;
|
2009-12-16 23:48:43 -07:00
|
|
|
u32 temp;
|
|
|
|
bool enabled;
|
|
|
|
|
|
|
|
dev_priv->mchbar_need_disable = false;
|
|
|
|
|
|
|
|
if (IS_I915G(dev) || IS_I915GM(dev)) {
|
|
|
|
pci_read_config_dword(dev_priv->bridge_dev, DEVEN_REG, &temp);
|
|
|
|
enabled = !!(temp & DEVEN_MCHBAR_EN);
|
|
|
|
} else {
|
|
|
|
pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);
|
|
|
|
enabled = temp & 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* If it's already enabled, don't have to do anything */
|
|
|
|
if (enabled)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (intel_alloc_mchbar_resource(dev))
|
|
|
|
return;
|
|
|
|
|
|
|
|
dev_priv->mchbar_need_disable = true;
|
|
|
|
|
|
|
|
/* Space is allocated or reserved, so enable it. */
|
|
|
|
if (IS_I915G(dev) || IS_I915GM(dev)) {
|
|
|
|
pci_write_config_dword(dev_priv->bridge_dev, DEVEN_REG,
|
|
|
|
temp | DEVEN_MCHBAR_EN);
|
|
|
|
} else {
|
|
|
|
pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);
|
|
|
|
pci_write_config_dword(dev_priv->bridge_dev, mchbar_reg, temp | 1);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
intel_teardown_mchbar(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
2010-09-16 17:32:17 -06:00
|
|
|
int mchbar_reg = INTEL_INFO(dev)->gen >= 4 ? MCHBAR_I965 : MCHBAR_I915;
|
2009-12-16 23:48:43 -07:00
|
|
|
u32 temp;
|
|
|
|
|
|
|
|
if (dev_priv->mchbar_need_disable) {
|
|
|
|
if (IS_I915G(dev) || IS_I915GM(dev)) {
|
|
|
|
pci_read_config_dword(dev_priv->bridge_dev, DEVEN_REG, &temp);
|
|
|
|
temp &= ~DEVEN_MCHBAR_EN;
|
|
|
|
pci_write_config_dword(dev_priv->bridge_dev, DEVEN_REG, temp);
|
|
|
|
} else {
|
|
|
|
pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);
|
|
|
|
temp &= ~1;
|
|
|
|
pci_write_config_dword(dev_priv->bridge_dev, mchbar_reg, temp);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (dev_priv->mch_res.start)
|
|
|
|
release_resource(&dev_priv->mch_res);
|
|
|
|
}
|
|
|
|
|
2009-09-20 22:33:58 -06:00
|
|
|
/* true = enable decode, false = disable decoder */
|
|
|
|
static unsigned int i915_vga_set_decode(void *cookie, bool state)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = cookie;
|
|
|
|
|
|
|
|
intel_modeset_vga_set_state(dev, state);
|
|
|
|
if (state)
|
|
|
|
return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
|
|
|
|
VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
|
|
|
|
else
|
|
|
|
return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
|
|
|
|
}
|
|
|
|
|
2010-01-31 22:38:10 -07:00
|
|
|
static void i915_switcheroo_set_state(struct pci_dev *pdev, enum vga_switcheroo_state state)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = pci_get_drvdata(pdev);
|
|
|
|
pm_message_t pmm = { .event = PM_EVENT_SUSPEND };
|
|
|
|
if (state == VGA_SWITCHEROO_ON) {
|
2012-03-18 14:00:11 -06:00
|
|
|
pr_info("switched on\n");
|
2010-12-06 16:20:40 -07:00
|
|
|
dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
|
2010-01-31 22:38:10 -07:00
|
|
|
/* i915 resume handler doesn't set to D0 */
|
|
|
|
pci_set_power_state(dev->pdev, PCI_D0);
|
|
|
|
i915_resume(dev);
|
2010-12-06 16:20:40 -07:00
|
|
|
dev->switch_power_state = DRM_SWITCH_POWER_ON;
|
2010-01-31 22:38:10 -07:00
|
|
|
} else {
|
2012-03-18 14:00:11 -06:00
|
|
|
pr_err("switched off\n");
|
2010-12-06 16:20:40 -07:00
|
|
|
dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
|
2010-01-31 22:38:10 -07:00
|
|
|
i915_suspend(dev, pmm);
|
2010-12-06 16:20:40 -07:00
|
|
|
dev->switch_power_state = DRM_SWITCH_POWER_OFF;
|
2010-01-31 22:38:10 -07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool i915_switcheroo_can_switch(struct pci_dev *pdev)
|
|
|
|
{
|
|
|
|
struct drm_device *dev = pci_get_drvdata(pdev);
|
|
|
|
bool can_switch;
|
|
|
|
|
|
|
|
spin_lock(&dev->count_lock);
|
|
|
|
can_switch = (dev->open_count == 0);
|
|
|
|
spin_unlock(&dev->count_lock);
|
|
|
|
return can_switch;
|
|
|
|
}
|
|
|
|
|
2012-05-10 23:51:17 -06:00
|
|
|
static const struct vga_switcheroo_client_ops i915_switcheroo_ops = {
|
|
|
|
.set_gpu_state = i915_switcheroo_set_state,
|
|
|
|
.reprobe = NULL,
|
|
|
|
.can_switch = i915_switcheroo_can_switch,
|
|
|
|
};
|
|
|
|
|
2011-03-29 03:40:27 -06:00
|
|
|
static int i915_load_modeset_init(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
int ret;
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
|
2010-10-14 02:14:51 -06:00
|
|
|
ret = intel_parse_bios(dev);
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
if (ret)
|
|
|
|
DRM_INFO("failed to find VBIOS tables\n");
|
|
|
|
|
2011-01-20 06:09:12 -07:00
|
|
|
/* If we have > 1 VGA cards, then we need to arbitrate access
|
|
|
|
* to the common VGA resources.
|
|
|
|
*
|
|
|
|
* If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA),
|
|
|
|
* then we do not take part in VGA arbitration and the
|
|
|
|
* vga_client_register() fails with -ENODEV.
|
|
|
|
*/
|
2009-09-20 22:33:58 -06:00
|
|
|
ret = vga_client_register(dev->pdev, dev, NULL, i915_vga_set_decode);
|
2011-01-20 06:09:12 -07:00
|
|
|
if (ret && ret != -ENODEV)
|
2011-03-29 03:40:27 -06:00
|
|
|
goto out;
|
2009-09-20 22:33:58 -06:00
|
|
|
|
2010-10-07 17:01:13 -06:00
|
|
|
intel_register_dsm_handler();
|
|
|
|
|
2012-05-10 23:51:17 -06:00
|
|
|
ret = vga_switcheroo_register_client(dev->pdev, &i915_switcheroo_ops);
|
2010-01-31 22:38:10 -07:00
|
|
|
if (ret)
|
2010-06-06 03:50:03 -06:00
|
|
|
goto cleanup_vga_client;
|
2010-01-31 22:38:10 -07:00
|
|
|
|
2012-04-24 08:47:39 -06:00
|
|
|
/* Initialise stolen first so that we may reserve preallocated
|
|
|
|
* objects for the BIOS to KMS transition.
|
|
|
|
*/
|
|
|
|
ret = i915_gem_init_stolen(dev);
|
|
|
|
if (ret)
|
|
|
|
goto cleanup_vga_switcheroo;
|
|
|
|
|
2012-12-01 13:03:22 -07:00
|
|
|
ret = drm_irq_install(dev);
|
|
|
|
if (ret)
|
|
|
|
goto cleanup_gem_stolen;
|
|
|
|
|
|
|
|
/* Important: The output setup functions called by modeset_init need
|
|
|
|
* working irqs for e.g. gmbus and dp aux transfers. */
|
2009-12-11 12:07:17 -07:00
|
|
|
intel_modeset_init(dev);
|
|
|
|
|
2012-04-24 08:47:41 -06:00
|
|
|
ret = i915_gem_init(dev);
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
if (ret)
|
2012-12-01 13:03:22 -07:00
|
|
|
goto cleanup_irq;
|
2011-03-29 03:40:27 -06:00
|
|
|
|
2012-11-02 12:13:59 -06:00
|
|
|
INIT_WORK(&dev_priv->console_resume_work, intel_console_resume);
|
|
|
|
|
2012-12-01 13:03:22 -07:00
|
|
|
intel_modeset_gem_init(dev);
|
2011-03-29 03:40:27 -06:00
|
|
|
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
/* Always safe in the mode setting case. */
|
|
|
|
/* FIXME: do pre/post-mode set stuff in core KMS code */
|
|
|
|
dev->vblank_disable_allowed = 1;
|
2013-07-09 08:51:37 -06:00
|
|
|
if (INTEL_INFO(dev)->num_pipes == 0)
|
2013-04-05 14:12:39 -06:00
|
|
|
return 0;
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
|
2010-06-06 03:50:03 -06:00
|
|
|
ret = intel_fbdev_init(dev);
|
|
|
|
if (ret)
|
2012-12-01 13:03:22 -07:00
|
|
|
goto cleanup_gem;
|
|
|
|
|
2012-12-11 06:05:07 -07:00
|
|
|
/* Only enable hotplug handling once the fbdev is fully set up. */
|
|
|
|
intel_hpd_init(dev);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Some ports require correctly set-up hpd registers for detection to
|
|
|
|
* work properly (leading to ghost connected connector status), e.g. VGA
|
|
|
|
* on gm45. Hence we can only set up the initial fbdev config after hpd
|
|
|
|
* irqs are fully enabled. Now we should scan for the initial config
|
|
|
|
* only once hotplug handling is enabled, but due to screwed-up locking
|
|
|
|
* around kms/fbdev init we can't protect the fdbev initial config
|
|
|
|
* scanning against hotplug events. Hence do this first and ignore the
|
|
|
|
* tiny window where we will loose hotplug notifactions.
|
|
|
|
*/
|
|
|
|
intel_fbdev_initial_config(dev);
|
|
|
|
|
2012-12-01 13:03:22 -07:00
|
|
|
/* Only enable hotplug handling once the fbdev is fully set up. */
|
|
|
|
dev_priv->enable_hotplug_processing = true;
|
2010-06-06 03:50:03 -06:00
|
|
|
|
2010-05-07 00:42:51 -06:00
|
|
|
drm_kms_helper_poll_init(dev);
|
2010-10-19 03:13:00 -06:00
|
|
|
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
return 0;
|
|
|
|
|
2011-03-29 03:40:27 -06:00
|
|
|
cleanup_gem:
|
|
|
|
mutex_lock(&dev->struct_mutex);
|
|
|
|
i915_gem_cleanup_ringbuffer(dev);
|
2013-05-25 13:26:39 -06:00
|
|
|
i915_gem_context_fini(dev);
|
2011-03-29 03:40:27 -06:00
|
|
|
mutex_unlock(&dev->struct_mutex);
|
2012-02-09 09:15:46 -07:00
|
|
|
i915_gem_cleanup_aliasing_ppgtt(dev);
|
2013-07-16 17:50:06 -06:00
|
|
|
drm_mm_takedown(&dev_priv->gtt.base.mm);
|
2012-12-01 13:03:22 -07:00
|
|
|
cleanup_irq:
|
|
|
|
drm_irq_uninstall(dev);
|
2012-04-24 08:47:39 -06:00
|
|
|
cleanup_gem_stolen:
|
|
|
|
i915_gem_cleanup_stolen(dev);
|
2010-06-06 03:50:03 -06:00
|
|
|
cleanup_vga_switcheroo:
|
|
|
|
vga_switcheroo_unregister_client(dev->pdev);
|
|
|
|
cleanup_vga_client:
|
|
|
|
vga_client_register(dev->pdev, NULL, NULL, NULL);
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
out:
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2008-11-27 21:22:24 -07:00
|
|
|
int i915_master_create(struct drm_device *dev, struct drm_master *master)
|
|
|
|
{
|
|
|
|
struct drm_i915_master_private *master_priv;
|
|
|
|
|
2009-03-24 13:23:04 -06:00
|
|
|
master_priv = kzalloc(sizeof(*master_priv), GFP_KERNEL);
|
2008-11-27 21:22:24 -07:00
|
|
|
if (!master_priv)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
master->driver_priv = master_priv;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void i915_master_destroy(struct drm_device *dev, struct drm_master *master)
|
|
|
|
{
|
|
|
|
struct drm_i915_master_private *master_priv = master->driver_priv;
|
|
|
|
|
|
|
|
if (!master_priv)
|
|
|
|
return;
|
|
|
|
|
2009-03-24 13:23:04 -06:00
|
|
|
kfree(master_priv);
|
2008-11-27 21:22:24 -07:00
|
|
|
|
|
|
|
master->driver_priv = NULL;
|
|
|
|
}
|
|
|
|
|
2012-06-12 03:28:17 -06:00
|
|
|
static void i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
|
|
|
|
{
|
|
|
|
struct apertures_struct *ap;
|
|
|
|
struct pci_dev *pdev = dev_priv->dev->pdev;
|
|
|
|
bool primary;
|
|
|
|
|
|
|
|
ap = alloc_apertures(1);
|
|
|
|
if (!ap)
|
|
|
|
return;
|
|
|
|
|
2013-01-17 13:45:16 -07:00
|
|
|
ap->ranges[0].base = dev_priv->gtt.mappable_base;
|
2013-05-25 13:26:36 -06:00
|
|
|
ap->ranges[0].size = dev_priv->gtt.mappable_end;
|
2013-01-17 13:45:17 -07:00
|
|
|
|
2012-06-12 03:28:17 -06:00
|
|
|
primary =
|
|
|
|
pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
|
|
|
|
|
|
|
|
remove_conflicting_framebuffers(ap, "inteldrmfb", primary);
|
|
|
|
|
|
|
|
kfree(ap);
|
|
|
|
}
|
|
|
|
|
2012-08-08 14:01:51 -06:00
|
|
|
static void i915_dump_device_info(struct drm_i915_private *dev_priv)
|
|
|
|
{
|
|
|
|
const struct intel_device_info *info = dev_priv->info;
|
|
|
|
|
2013-04-23 09:38:34 -06:00
|
|
|
#define PRINT_S(name) "%s"
|
|
|
|
#define SEP_EMPTY
|
2013-04-23 09:37:17 -06:00
|
|
|
#define PRINT_FLAG(name) info->name ? #name "," : ""
|
|
|
|
#define SEP_COMMA ,
|
2012-08-08 14:01:51 -06:00
|
|
|
DRM_DEBUG_DRIVER("i915 device info: gen=%i, pciid=0x%04x flags="
|
2013-04-23 09:38:34 -06:00
|
|
|
DEV_INFO_FOR_EACH_FLAG(PRINT_S, SEP_EMPTY),
|
2012-08-08 14:01:51 -06:00
|
|
|
info->gen,
|
|
|
|
dev_priv->dev->pdev->device,
|
2013-04-23 09:37:17 -06:00
|
|
|
DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG, SEP_COMMA));
|
2013-04-23 09:38:34 -06:00
|
|
|
#undef PRINT_S
|
|
|
|
#undef SEP_EMPTY
|
2013-04-23 09:37:17 -06:00
|
|
|
#undef PRINT_FLAG
|
|
|
|
#undef SEP_COMMA
|
2012-08-08 14:01:51 -06:00
|
|
|
}
|
|
|
|
|
2013-02-19 12:13:35 -07:00
|
|
|
/**
|
|
|
|
* intel_early_sanitize_regs - clean up BIOS state
|
|
|
|
* @dev: DRM device
|
|
|
|
*
|
|
|
|
* This function must be called before we do any I915_READ or I915_WRITE. Its
|
|
|
|
* purpose is to clean up any state left by the BIOS that may affect us when
|
|
|
|
* reading and/or writing registers.
|
|
|
|
*/
|
|
|
|
static void intel_early_sanitize_regs(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
|
|
2013-04-22 11:40:40 -06:00
|
|
|
if (HAS_FPGA_DBG_UNCLAIMED(dev))
|
2013-02-19 12:13:35 -07:00
|
|
|
I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
|
|
|
|
}
|
|
|
|
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
/**
|
|
|
|
* i915_driver_load - setup chip and create an initial config
|
|
|
|
* @dev: DRM device
|
|
|
|
* @flags: startup flags
|
|
|
|
*
|
|
|
|
* The driver load routine has to do several things:
|
|
|
|
* - drive output discovery via intel_modeset_init()
|
|
|
|
* - initialize the memory manager
|
|
|
|
* - allocate initial config memory
|
|
|
|
* - setup the DRM framebuffer with the allocated memory
|
|
|
|
*/
|
2007-07-10 23:53:27 -06:00
|
|
|
int i915_driver_load(struct drm_device *dev, unsigned long flags)
|
2005-11-10 04:16:34 -07:00
|
|
|
{
|
2010-04-08 13:41:59 -06:00
|
|
|
struct drm_i915_private *dev_priv;
|
2012-03-26 13:33:18 -06:00
|
|
|
struct intel_device_info *info;
|
2012-09-14 04:57:46 -06:00
|
|
|
int ret = 0, mmio_bar, mmio_size;
|
2012-03-26 01:45:41 -06:00
|
|
|
uint32_t aperture_size;
|
2010-11-23 05:09:30 -07:00
|
|
|
|
2012-03-26 13:33:18 -06:00
|
|
|
info = (struct intel_device_info *) flags;
|
|
|
|
|
|
|
|
/* Refuse to load on gen6+ without kms enabled. */
|
|
|
|
if (info->gen >= 6 && !drm_core_check_feature(dev, DRIVER_MODESET))
|
|
|
|
return -ENODEV;
|
|
|
|
|
2005-11-10 04:16:34 -07:00
|
|
|
/* i915 has 4 more counters */
|
|
|
|
dev->counters += 4;
|
|
|
|
dev->types[6] = _DRM_STAT_IRQ;
|
|
|
|
dev->types[7] = _DRM_STAT_PRIMARY;
|
|
|
|
dev->types[8] = _DRM_STAT_SECONDARY;
|
|
|
|
dev->types[9] = _DRM_STAT_DMA;
|
|
|
|
|
2009-03-24 13:23:04 -06:00
|
|
|
dev_priv = kzalloc(sizeof(drm_i915_private_t), GFP_KERNEL);
|
2007-11-21 21:14:14 -07:00
|
|
|
if (dev_priv == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
dev->dev_private = (void *)dev_priv;
|
2008-07-30 13:06:12 -06:00
|
|
|
dev_priv->dev = dev;
|
2012-03-26 13:33:18 -06:00
|
|
|
dev_priv->info = info;
|
2007-11-21 21:14:14 -07:00
|
|
|
|
2012-08-08 14:01:51 -06:00
|
|
|
i915_dump_device_info(dev_priv);
|
|
|
|
|
2009-08-03 19:43:41 -06:00
|
|
|
if (i915_get_bridge_dev(dev)) {
|
|
|
|
ret = -EIO;
|
|
|
|
goto free_priv;
|
|
|
|
}
|
|
|
|
|
2013-04-08 19:43:49 -06:00
|
|
|
mmio_bar = IS_GEN2(dev) ? 1 : 0;
|
|
|
|
/* Before gen4, the registers and the GTT are behind different BARs.
|
|
|
|
* However, from gen4 onwards, the registers and the GTT are shared
|
|
|
|
* in the same BAR, so we want to restrict this ioremap from
|
|
|
|
* clobbering the GTT which we want ioremap_wc instead. Fortunately,
|
|
|
|
* the register BAR remains the same size for all the earlier
|
|
|
|
* generations up to Ironlake.
|
|
|
|
*/
|
|
|
|
if (info->gen < 5)
|
|
|
|
mmio_size = 512*1024;
|
|
|
|
else
|
|
|
|
mmio_size = 2*1024*1024;
|
|
|
|
|
|
|
|
dev_priv->regs = pci_iomap(dev->pdev, mmio_bar, mmio_size);
|
|
|
|
if (!dev_priv->regs) {
|
|
|
|
DRM_ERROR("failed to map registers\n");
|
|
|
|
ret = -EIO;
|
|
|
|
goto put_bridge;
|
|
|
|
}
|
|
|
|
|
|
|
|
intel_early_sanitize_regs(dev);
|
|
|
|
|
2013-07-04 12:02:05 -06:00
|
|
|
if (IS_HASWELL(dev) && (I915_READ(HSW_EDRAM_PRESENT) == 1)) {
|
|
|
|
/* The docs do not explain exactly how the calculation can be
|
|
|
|
* made. It is somewhat guessable, but for now, it's always
|
|
|
|
* 128MB.
|
|
|
|
* NB: We can't write IDICR yet because we do not have gt funcs
|
|
|
|
* set up */
|
|
|
|
dev_priv->ellc_size = 128;
|
|
|
|
DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size);
|
|
|
|
}
|
|
|
|
|
2012-11-04 10:21:27 -07:00
|
|
|
ret = i915_gem_gtt_init(dev);
|
|
|
|
if (ret)
|
2012-06-12 03:28:17 -06:00
|
|
|
goto put_bridge;
|
|
|
|
|
2012-10-26 05:06:41 -06:00
|
|
|
if (drm_core_check_feature(dev, DRIVER_MODESET))
|
|
|
|
i915_kick_out_firmware_fb(dev_priv);
|
2012-06-12 03:28:17 -06:00
|
|
|
|
2011-12-19 04:15:29 -07:00
|
|
|
pci_set_master(dev->pdev);
|
|
|
|
|
2010-08-30 13:25:23 -06:00
|
|
|
/* overlay on gen2 is broken and can't address above 1G */
|
|
|
|
if (IS_GEN2(dev))
|
|
|
|
dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(30));
|
|
|
|
|
2011-03-01 15:24:16 -07:00
|
|
|
/* 965GM sometimes incorrectly writes to hardware status page (HWS)
|
|
|
|
* using 32bit addressing, overwriting memory if HWS is located
|
|
|
|
* above 4GB.
|
|
|
|
*
|
|
|
|
* The documentation also mentions an issue with undefined
|
|
|
|
* behaviour if any general state is accessed within a page above 4GB,
|
|
|
|
* which also needs to be handled carefully.
|
|
|
|
*/
|
|
|
|
if (IS_BROADWATER(dev) || IS_CRESTLINE(dev))
|
|
|
|
dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(32));
|
|
|
|
|
2013-01-17 13:45:17 -07:00
|
|
|
aperture_size = dev_priv->gtt.mappable_end;
|
2010-10-27 11:46:52 -06:00
|
|
|
|
2013-01-17 13:45:15 -07:00
|
|
|
dev_priv->gtt.mappable =
|
|
|
|
io_mapping_create_wc(dev_priv->gtt.mappable_base,
|
2012-06-07 07:55:57 -06:00
|
|
|
aperture_size);
|
2013-01-17 13:45:15 -07:00
|
|
|
if (dev_priv->gtt.mappable == NULL) {
|
2009-02-24 18:35:11 -07:00
|
|
|
ret = -EIO;
|
2012-06-12 03:28:17 -06:00
|
|
|
goto out_rmmap;
|
2009-02-24 18:35:11 -07:00
|
|
|
}
|
|
|
|
|
2013-06-27 17:30:23 -06:00
|
|
|
dev_priv->gtt.mtrr = arch_phys_wc_add(dev_priv->gtt.mappable_base,
|
|
|
|
aperture_size);
|
2010-09-06 12:08:44 -06:00
|
|
|
|
2010-09-09 05:46:34 -06:00
|
|
|
/* The i915 workqueue is primarily used for batched retirement of
|
|
|
|
* requests (and thus managing bo) once the task has been completed
|
|
|
|
* by the GPU. i915_gem_retire_requests() is called directly when we
|
|
|
|
* need high-priority retirement, such as waiting for an explicit
|
|
|
|
* bo.
|
|
|
|
*
|
|
|
|
* It is also used for periodic low-priority events, such as
|
2010-11-17 18:31:12 -07:00
|
|
|
* idle-timers and recording error state.
|
2010-09-09 05:46:34 -06:00
|
|
|
*
|
|
|
|
* All tasks on the workqueue are expected to acquire the dev mutex
|
|
|
|
* so there is no point in running more than one instance of the
|
2012-08-22 17:40:57 -06:00
|
|
|
* workqueue at any time. Use an ordered one.
|
2010-09-09 05:46:34 -06:00
|
|
|
*/
|
2012-08-22 17:40:57 -06:00
|
|
|
dev_priv->wq = alloc_ordered_workqueue("i915", 0);
|
2009-08-03 17:09:16 -06:00
|
|
|
if (dev_priv->wq == NULL) {
|
|
|
|
DRM_ERROR("Failed to create our workqueue.\n");
|
|
|
|
ret = -ENOMEM;
|
2011-07-10 14:12:17 -06:00
|
|
|
goto out_mtrrfree;
|
2009-08-03 17:09:16 -06:00
|
|
|
}
|
|
|
|
|
2012-07-03 12:57:32 -06:00
|
|
|
/* This must be called before any calls to HAS_PCH_* */
|
|
|
|
intel_detect_pch(dev);
|
|
|
|
|
2011-06-28 14:00:41 -06:00
|
|
|
intel_irq_init(dev);
|
2012-07-02 08:51:02 -06:00
|
|
|
intel_gt_init(dev);
|
2009-02-06 11:22:41 -07:00
|
|
|
|
2009-12-16 23:48:43 -07:00
|
|
|
/* Try to make sure MCHBAR is enabled before poking at it */
|
|
|
|
intel_setup_mchbar(dev);
|
2010-07-20 16:44:45 -06:00
|
|
|
intel_setup_gmbus(dev);
|
2010-08-19 09:09:23 -06:00
|
|
|
intel_opregion_setup(dev);
|
2009-12-16 23:48:43 -07:00
|
|
|
|
2010-10-14 02:14:51 -06:00
|
|
|
intel_setup_bios(dev);
|
|
|
|
|
2008-07-30 13:06:12 -06:00
|
|
|
i915_gem_load(dev);
|
|
|
|
|
2008-07-29 13:10:39 -06:00
|
|
|
/* On the 945G/GM, the chipset reports the MSI capability on the
|
|
|
|
* integrated graphics even though the support isn't actually there
|
|
|
|
* according to the published specs. It doesn't appear to function
|
|
|
|
* correctly in testing on 945G.
|
|
|
|
* This may be a side effect of MSI having been made available for PEG
|
|
|
|
* and the registers being closely associated.
|
2008-10-17 01:44:42 -06:00
|
|
|
*
|
|
|
|
* According to chipset errata, on the 965GM, MSI interrupts may
|
2008-12-08 12:12:28 -07:00
|
|
|
* be lost or delayed, but we use them anyways to avoid
|
|
|
|
* stuck interrupts on some machines.
|
2008-07-29 13:10:39 -06:00
|
|
|
*/
|
2008-12-08 12:12:28 -07:00
|
|
|
if (!IS_I945G(dev) && !IS_I945GM(dev))
|
2008-11-03 15:46:17 -07:00
|
|
|
pci_enable_msi(dev->pdev);
|
2008-07-29 13:10:39 -06:00
|
|
|
|
2010-12-04 04:30:53 -07:00
|
|
|
spin_lock_init(&dev_priv->irq_lock);
|
2012-11-14 09:14:04 -07:00
|
|
|
spin_lock_init(&dev_priv->gpu_error.lock);
|
2013-04-12 06:18:37 -06:00
|
|
|
spin_lock_init(&dev_priv->backlight.lock);
|
2012-12-12 06:06:44 -07:00
|
|
|
mutex_init(&dev_priv->dpio_lock);
|
2008-07-29 13:10:39 -06:00
|
|
|
|
2012-11-02 12:14:01 -06:00
|
|
|
mutex_init(&dev_priv->rps.hw_lock);
|
i915: ignore lid open event when resuming
i915 driver needs to do modeset when
1. system resumes from sleep
2. lid is opened
In PM_SUSPEND_MEM state, all the GPEs are cleared when system resumes,
thus it is the i915_resume code does the modeset rather than intel_lid_notify().
But in PM_SUSPEND_FREEZE state, this will be broken because
system is still responsive to the lid events.
1. When we close the lid in Freeze state, intel_lid_notify() sets modeset_on_lid.
2. When we reopen the lid, intel_lid_notify() will do a modeset,
before the system is resumed.
here is the error log,
[92146.548074] WARNING: at drivers/gpu/drm/i915/intel_display.c:1028 intel_wait_for_pipe_off+0x184/0x190 [i915]()
[92146.548076] Hardware name: VGN-Z540N
[92146.548078] pipe_off wait timed out
[92146.548167] Modules linked in: hid_generic usbhid hid snd_hda_codec_realtek snd_hda_intel snd_hda_codec parport_pc snd_hwdep ppdev snd_pcm_oss i915 snd_mixer_oss snd_pcm arc4 iwldvm snd_seq_dummy mac80211 snd_seq_oss snd_seq_midi fbcon tileblit font bitblit softcursor drm_kms_helper snd_rawmidi snd_seq_midi_event coretemp drm snd_seq kvm btusb bluetooth snd_timer iwlwifi pcmcia tpm_infineon i2c_algo_bit joydev snd_seq_device intel_agp cfg80211 snd intel_gtt yenta_socket pcmcia_rsrc sony_laptop agpgart microcode psmouse tpm_tis serio_raw mxm_wmi soundcore snd_page_alloc tpm acpi_cpufreq lpc_ich pcmcia_core tpm_bios mperf processor lp parport firewire_ohci firewire_core crc_itu_t sdhci_pci sdhci thermal e1000e
[92146.548173] Pid: 4304, comm: kworker/0:0 Tainted: G W 3.8.0-rc3-s0i3-v3-test+ #9
[92146.548175] Call Trace:
[92146.548189] [<c10378e2>] warn_slowpath_common+0x72/0xa0
[92146.548227] [<f86398b4>] ? intel_wait_for_pipe_off+0x184/0x190 [i915]
[92146.548263] [<f86398b4>] ? intel_wait_for_pipe_off+0x184/0x190 [i915]
[92146.548270] [<c10379b3>] warn_slowpath_fmt+0x33/0x40
[92146.548307] [<f86398b4>] intel_wait_for_pipe_off+0x184/0x190 [i915]
[92146.548344] [<f86399c2>] intel_disable_pipe+0x102/0x190 [i915]
[92146.548380] [<f8639ea4>] ? intel_disable_plane+0x64/0x80 [i915]
[92146.548417] [<f8639f7c>] i9xx_crtc_disable+0xbc/0x150 [i915]
[92146.548456] [<f863ebee>] intel_crtc_update_dpms+0x5e/0x90 [i915]
[92146.548493] [<f86437cf>] intel_modeset_setup_hw_state+0x42f/0x8f0 [i915]
[92146.548535] [<f8645b0b>] intel_lid_notify+0x9b/0xc0 [i915]
[92146.548543] [<c15610d3>] notifier_call_chain+0x43/0x60
[92146.548550] [<c105d1e1>] __blocking_notifier_call_chain+0x41/0x80
[92146.548556] [<c105d23f>] blocking_notifier_call_chain+0x1f/0x30
[92146.548563] [<c131a684>] acpi_lid_send_state+0x78/0xa4
[92146.548569] [<c131aa9e>] acpi_button_notify+0x3b/0xf1
[92146.548577] [<c12df56a>] ? acpi_os_execute+0x17/0x19
[92146.548582] [<c12e591a>] ? acpi_ec_sync_query+0xa5/0xbc
[92146.548589] [<c12e2b82>] acpi_device_notify+0x16/0x18
[92146.548595] [<c12f4904>] acpi_ev_notify_dispatch+0x38/0x4f
[92146.548600] [<c12df0e8>] acpi_os_execute_deferred+0x20/0x2b
[92146.548607] [<c1051208>] process_one_work+0x128/0x3f0
[92146.548613] [<c1564f73>] ? common_interrupt+0x33/0x38
[92146.548618] [<c104f8c0>] ? wake_up_worker+0x30/0x30
[92146.548624] [<c12df0c8>] ? acpi_os_wait_events_complete+0x1e/0x1e
[92146.548629] [<c10524f9>] worker_thread+0x119/0x3b0
[92146.548634] [<c10523e0>] ? manage_workers+0x240/0x240
[92146.548640] [<c1056e84>] kthread+0x94/0xa0
[92146.548647] [<c1060000>] ? ftrace_raw_output_sched_stat_runtime+0x70/0xf0
[92146.548652] [<c15649b7>] ret_from_kernel_thread+0x1b/0x28
[92146.548658] [<c1056df0>] ? kthread_create_on_node+0xc0/0xc0
three different modeset flags are introduced in this patch
MODESET_ON_LID_OPEN: do modeset on next lid open event
MODESET_DONE: modeset already done
MODESET_SUSPENDED: suspended, only do modeset when system is resumed
In this way,
1. when lid is closed, MODESET_ON_LID_OPEN is set so that
we'll do modeset on next lid open event.
2. when lid is opened, MODESET_DONE is set
so that duplicate lid open events will be ignored.
3. when system suspends, MODESET_SUSPENDED is set.
In this case, we will not do modeset on any lid events.
Plus, locking mechanism is also introduced to avoid racing.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-02-05 00:41:53 -07:00
|
|
|
mutex_init(&dev_priv->modeset_restore_lock);
|
2012-11-02 12:14:01 -06:00
|
|
|
|
2013-04-02 12:22:20 -06:00
|
|
|
dev_priv->num_plane = 1;
|
|
|
|
if (IS_VALLEYVIEW(dev))
|
|
|
|
dev_priv->num_plane = 2;
|
|
|
|
|
2013-04-05 14:12:39 -06:00
|
|
|
if (INTEL_INFO(dev)->num_pipes) {
|
|
|
|
ret = drm_vblank_init(dev, INTEL_INFO(dev)->num_pipes);
|
|
|
|
if (ret)
|
|
|
|
goto out_gem_unload;
|
|
|
|
}
|
2008-11-18 10:30:25 -07:00
|
|
|
|
2013-05-30 08:07:11 -06:00
|
|
|
if (HAS_POWER_WELL(dev))
|
|
|
|
i915_init_power_well(dev);
|
|
|
|
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
if (drm_core_check_feature(dev, DRIVER_MODESET)) {
|
2010-09-22 15:44:24 -06:00
|
|
|
ret = i915_load_modeset_init(dev);
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
if (ret < 0) {
|
|
|
|
DRM_ERROR("failed to init modeset\n");
|
2010-11-08 10:10:29 -07:00
|
|
|
goto out_gem_unload;
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
}
|
2013-07-09 08:51:37 -06:00
|
|
|
} else {
|
|
|
|
/* Start out suspended in ums mode. */
|
|
|
|
dev_priv->ums.mm_suspended = 1;
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
}
|
|
|
|
|
2012-04-10 22:17:01 -06:00
|
|
|
i915_setup_sysfs(dev);
|
|
|
|
|
2013-04-05 14:12:39 -06:00
|
|
|
if (INTEL_INFO(dev)->num_pipes) {
|
|
|
|
/* Must be done after probing outputs */
|
|
|
|
intel_opregion_init(dev);
|
|
|
|
acpi_video_register();
|
|
|
|
}
|
2009-03-19 15:35:39 -06:00
|
|
|
|
2012-04-26 15:28:12 -06:00
|
|
|
if (IS_GEN5(dev))
|
|
|
|
intel_gpu_ips_init(dev_priv);
|
2010-12-20 19:40:06 -07:00
|
|
|
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
return 0;
|
|
|
|
|
2010-11-08 10:10:29 -07:00
|
|
|
out_gem_unload:
|
2011-07-10 14:12:17 -06:00
|
|
|
if (dev_priv->mm.inactive_shrinker.shrink)
|
|
|
|
unregister_shrinker(&dev_priv->mm.inactive_shrinker);
|
|
|
|
|
2010-11-08 10:10:29 -07:00
|
|
|
if (dev->pdev->msi_enabled)
|
|
|
|
pci_disable_msi(dev->pdev);
|
|
|
|
|
|
|
|
intel_teardown_gmbus(dev);
|
|
|
|
intel_teardown_mchbar(dev);
|
2009-08-03 17:09:16 -06:00
|
|
|
destroy_workqueue(dev_priv->wq);
|
2011-07-10 14:12:17 -06:00
|
|
|
out_mtrrfree:
|
2013-06-27 17:30:23 -06:00
|
|
|
arch_phys_wc_del(dev_priv->gtt.mtrr);
|
2013-01-17 13:45:15 -07:00
|
|
|
io_mapping_free(dev_priv->gtt.mappable);
|
2013-07-16 17:50:05 -06:00
|
|
|
dev_priv->gtt.base.cleanup(&dev_priv->gtt.base);
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
out_rmmap:
|
2010-10-29 14:02:18 -06:00
|
|
|
pci_iounmap(dev->pdev, dev_priv->regs);
|
2009-08-03 19:43:41 -06:00
|
|
|
put_bridge:
|
|
|
|
pci_dev_put(dev_priv->bridge_dev);
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
free_priv:
|
2009-03-24 13:23:04 -06:00
|
|
|
kfree(dev_priv);
|
2007-11-21 21:14:14 -07:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
int i915_driver_unload(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
2010-08-20 13:23:20 -06:00
|
|
|
int ret;
|
2007-11-21 21:14:14 -07:00
|
|
|
|
2012-04-26 15:28:12 -06:00
|
|
|
intel_gpu_ips_teardown();
|
2010-05-20 15:28:11 -06:00
|
|
|
|
2013-05-30 08:07:11 -06:00
|
|
|
if (HAS_POWER_WELL(dev))
|
|
|
|
i915_remove_power_well(dev);
|
|
|
|
|
2012-04-10 22:17:01 -06:00
|
|
|
i915_teardown_sysfs(dev);
|
|
|
|
|
2010-10-28 05:51:39 -06:00
|
|
|
if (dev_priv->mm.inactive_shrinker.shrink)
|
|
|
|
unregister_shrinker(&dev_priv->mm.inactive_shrinker);
|
|
|
|
|
2010-08-20 13:23:20 -06:00
|
|
|
mutex_lock(&dev->struct_mutex);
|
2012-04-26 17:02:58 -06:00
|
|
|
ret = i915_gpu_idle(dev);
|
2010-08-20 13:23:20 -06:00
|
|
|
if (ret)
|
|
|
|
DRM_ERROR("failed to idle hardware: %d\n", ret);
|
2012-04-26 17:02:58 -06:00
|
|
|
i915_gem_retire_requests(dev);
|
2010-08-20 13:23:20 -06:00
|
|
|
mutex_unlock(&dev->struct_mutex);
|
|
|
|
|
2010-08-20 16:25:16 -06:00
|
|
|
/* Cancel the retire work handler, which should be idle now. */
|
|
|
|
cancel_delayed_work_sync(&dev_priv->mm.retire_work);
|
|
|
|
|
2013-01-17 13:45:15 -07:00
|
|
|
io_mapping_free(dev_priv->gtt.mappable);
|
2013-06-27 17:30:23 -06:00
|
|
|
arch_phys_wc_del(dev_priv->gtt.mtrr);
|
2009-01-23 13:57:47 -07:00
|
|
|
|
2010-08-19 09:09:23 -06:00
|
|
|
acpi_video_unregister();
|
|
|
|
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
if (drm_core_check_feature(dev, DRIVER_MODESET)) {
|
2010-10-04 08:33:04 -06:00
|
|
|
intel_fbdev_fini(dev);
|
2010-03-26 12:07:21 -06:00
|
|
|
intel_modeset_cleanup(dev);
|
2012-11-02 12:13:59 -06:00
|
|
|
cancel_work_sync(&dev_priv->console_resume_work);
|
2010-03-26 12:07:21 -06:00
|
|
|
|
2009-11-23 18:48:44 -07:00
|
|
|
/*
|
|
|
|
* free the memory space allocated for the child device
|
|
|
|
* config parsed from VBT
|
|
|
|
*/
|
2013-05-09 17:03:18 -06:00
|
|
|
if (dev_priv->vbt.child_dev && dev_priv->vbt.child_dev_num) {
|
|
|
|
kfree(dev_priv->vbt.child_dev);
|
|
|
|
dev_priv->vbt.child_dev = NULL;
|
|
|
|
dev_priv->vbt.child_dev_num = 0;
|
2009-11-23 18:48:44 -07:00
|
|
|
}
|
2010-08-20 10:26:46 -06:00
|
|
|
|
2010-01-31 22:38:10 -07:00
|
|
|
vga_switcheroo_unregister_client(dev->pdev);
|
2009-09-20 22:33:58 -06:00
|
|
|
vga_client_register(dev->pdev, NULL, NULL, NULL);
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
}
|
|
|
|
|
2010-08-20 13:25:11 -06:00
|
|
|
/* Free error state after interrupts are fully disabled. */
|
2012-11-14 09:14:04 -07:00
|
|
|
del_timer_sync(&dev_priv->gpu_error.hangcheck_timer);
|
|
|
|
cancel_work_sync(&dev_priv->gpu_error.work);
|
2010-08-20 13:25:11 -06:00
|
|
|
i915_destroy_error_state(dev);
|
2010-08-20 10:18:48 -06:00
|
|
|
|
2008-07-29 13:10:39 -06:00
|
|
|
if (dev->pdev->msi_enabled)
|
|
|
|
pci_disable_msi(dev->pdev);
|
|
|
|
|
2010-08-19 09:09:23 -06:00
|
|
|
intel_opregion_fini(dev);
|
2008-08-05 12:37:25 -06:00
|
|
|
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
if (drm_core_check_feature(dev, DRIVER_MODESET)) {
|
2010-08-20 14:26:30 -06:00
|
|
|
/* Flush any outstanding unpin_work. */
|
|
|
|
flush_workqueue(dev_priv->wq);
|
|
|
|
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
mutex_lock(&dev->struct_mutex);
|
2011-06-27 17:18:20 -06:00
|
|
|
i915_gem_free_all_phys_object(dev);
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
i915_gem_cleanup_ringbuffer(dev);
|
2012-06-19 13:55:32 -06:00
|
|
|
i915_gem_context_fini(dev);
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
mutex_unlock(&dev->struct_mutex);
|
2012-02-09 09:15:46 -07:00
|
|
|
i915_gem_cleanup_aliasing_ppgtt(dev);
|
2012-04-24 08:47:39 -06:00
|
|
|
i915_gem_cleanup_stolen(dev);
|
2010-10-07 02:20:12 -06:00
|
|
|
|
|
|
|
if (!I915_NEED_GFX_HWS(dev))
|
|
|
|
i915_free_hws(dev);
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
}
|
|
|
|
|
2013-07-16 17:50:06 -06:00
|
|
|
drm_mm_takedown(&dev_priv->gtt.base.mm);
|
2010-10-10 11:54:08 -06:00
|
|
|
if (dev_priv->regs != NULL)
|
2010-10-29 14:02:18 -06:00
|
|
|
pci_iounmap(dev->pdev, dev_priv->regs);
|
2010-10-10 11:54:08 -06:00
|
|
|
|
2010-07-20 16:44:45 -06:00
|
|
|
intel_teardown_gmbus(dev);
|
2009-12-16 23:48:43 -07:00
|
|
|
intel_teardown_mchbar(dev);
|
|
|
|
|
2010-08-20 10:18:48 -06:00
|
|
|
destroy_workqueue(dev_priv->wq);
|
drm/i915: irq-drive the dp aux communication
At least on the platforms that have a dp aux irq and also have it
enabled - vlvhsw should have one, too. But I don't have a machine to
test this on. Judging from docs there's no dp aux interrupt for gm45.
Also, I only have an ivb cpu edp machine, so the dp aux A code for
snb/ilk is untested.
For dpcd probing when nothing is connected it slashes about 5ms of cpu
time (cpu time is now negligible), which agrees with 3 * 5 400 usec
timeouts.
A previous version of this patch increases the time required to go
through the dp_detect cycle (which includes reading the edid) from
around 33 ms to around 40 ms. Experiments indicated that this is
purely due to the irq latency - the hw doesn't allow us to queue up
dp aux transactions and hence irq latency directly affects throughput.
gmbus is much better, there we have a 8 byte buffer, and we get the
irq once another 4 bytes can be queued up.
But by using the pm_qos interface to request the lowest possible cpu
wake-up latency this slowdown completely disappeared.
Since all our output detection logic is single-threaded with the
mode_config mutex right now anyway, I've decide not ot play fancy and
to just reuse the gmbus wait queue. But this would definitely prep the
way to run dp detection on different ports in parallel
v2: Add a timeout for dp aux transfers when using interrupts - the hw
_does_ prevent this with the hw-based 400 usec timeout, but if the
irq somehow doesn't arrive we're screwed. Lesson learned while
developing this ;-)
v3: While at it also convert the busy-loop to wait_for_atomic, so that
we don't run the risk of an infinite loop any more.
v4: Ensure we have the smallest possible irq latency by using the
pm_qos interface.
v5: Add a comment to the code to explain why we frob pm_qos. Suggested
by Chris Wilson.
v6: Disable dp irq for vlv, that's easier than trying to get at docs
and hw.
v7: Squash in a fix for Haswell that Paulo Zanoni tracked down - the
dp aux registers aren't at a fixed offset any more, but can be on the
PCH while the DP port is on the cpu die.
Reviewed-by: Imre Deak <imre.deak@intel.com> (v6)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2012-12-01 05:53:48 -07:00
|
|
|
pm_qos_remove_request(&dev_priv->pm_qos);
|
2010-08-20 10:18:48 -06:00
|
|
|
|
2013-07-16 17:50:05 -06:00
|
|
|
dev_priv->gtt.base.cleanup(&dev_priv->gtt.base);
|
2013-05-22 08:47:13 -06:00
|
|
|
|
2012-11-15 04:32:30 -07:00
|
|
|
if (dev_priv->slab)
|
|
|
|
kmem_cache_destroy(dev_priv->slab);
|
2010-08-20 10:18:48 -06:00
|
|
|
|
2009-08-03 19:43:41 -06:00
|
|
|
pci_dev_put(dev_priv->bridge_dev);
|
2009-03-24 13:23:04 -06:00
|
|
|
kfree(dev->dev_private);
|
2007-11-21 21:14:14 -07:00
|
|
|
|
2005-11-10 04:16:34 -07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-09-24 09:02:42 -06:00
|
|
|
int i915_driver_open(struct drm_device *dev, struct drm_file *file)
|
2008-07-30 13:06:12 -06:00
|
|
|
{
|
2010-09-24 09:02:42 -06:00
|
|
|
struct drm_i915_file_private *file_priv;
|
2008-07-30 13:06:12 -06:00
|
|
|
|
2009-07-19 23:48:04 -06:00
|
|
|
DRM_DEBUG_DRIVER("\n");
|
2013-06-12 03:35:28 -06:00
|
|
|
file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
|
2010-09-24 09:02:42 -06:00
|
|
|
if (!file_priv)
|
2008-07-30 13:06:12 -06:00
|
|
|
return -ENOMEM;
|
|
|
|
|
2010-09-24 09:02:42 -06:00
|
|
|
file->driver_priv = file_priv;
|
2008-07-30 13:06:12 -06:00
|
|
|
|
2010-09-26 04:03:27 -06:00
|
|
|
spin_lock_init(&file_priv->mm.lock);
|
2010-09-24 09:02:42 -06:00
|
|
|
INIT_LIST_HEAD(&file_priv->mm.request_list);
|
2008-07-30 13:06:12 -06:00
|
|
|
|
2012-06-19 08:52:30 -06:00
|
|
|
idr_init(&file_priv->context_idr);
|
drm/i915: preliminary context support
Very basic code for context setup/destruction in the driver.
Adds the file i915_gem_context.c This file implements HW context
support. On gen5+ a HW context consists of an opaque GPU object which is
referenced at times of context saves and restores. With RC6 enabled,
the context is also referenced as the GPU enters and exists from RC6
(GPU has it's own internal power context, except on gen5). Though
something like a context does exist for the media ring, the code only
supports contexts for the render ring.
In software, there is a distinction between contexts created by the
user, and the default HW context. The default HW context is used by GPU
clients that do not request setup of their own hardware context. The
default context's state is never restored to help prevent programming
errors. This would happen if a client ran and piggy-backed off another
clients GPU state. The default context only exists to give the GPU some
offset to load as the current to invoke a save of the context we
actually care about. In fact, the code could likely be constructed,
albeit in a more complicated fashion, to never use the default context,
though that limits the driver's ability to swap out, and/or destroy
other contexts.
All other contexts are created as a request by the GPU client. These
contexts store GPU state, and thus allow GPU clients to not re-emit
state (and potentially query certain state) at any time. The kernel
driver makes certain that the appropriate commands are inserted.
There are 4 entry points into the contexts, init, fini, open, close.
The names are self-explanatory except that init can be called during
reset, and also during pm thaw/resume. As we expect our context to be
preserved across these events, we do not reinitialize in this case.
As Adam Jackson pointed out, The cutoff of 1MB where a HW context is
considered too big is arbitrary. The reason for this is even though
context sizes are increasing with every generation, they have yet to
eclipse even 32k. If we somehow read back way more than that, it
probably means BIOS has done something strange, or we're running on a
platform that wasn't designed for this.
v2: rename load/unload to init/fini (daniel)
remove ILK support for get_size() (indirectly daniel)
add HAS_HW_CONTEXTS macro to clarify supported platforms (daniel)
added comments (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-04 15:42:42 -06:00
|
|
|
|
2008-07-30 13:06:12 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
/**
|
|
|
|
* i915_driver_lastclose - clean up after all DRM clients have exited
|
|
|
|
* @dev: DRM device
|
|
|
|
*
|
|
|
|
* Take care of cleaning up after all DRM clients have exited. In the
|
|
|
|
* mode setting case, we want to restore the kernel's initial mode (just
|
|
|
|
* in case the last client left us in a bad state).
|
|
|
|
*
|
2012-03-26 01:45:41 -06:00
|
|
|
* Additionally, in the non-mode setting case, we'll tear down the GTT
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
* and DMA structures, since the kernel won't be using them, and clea
|
|
|
|
* up any GEM state.
|
|
|
|
*/
|
2007-07-10 23:53:27 -06:00
|
|
|
void i915_driver_lastclose(struct drm_device * dev)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
2007-11-21 21:14:14 -07:00
|
|
|
drm_i915_private_t *dev_priv = dev->dev_private;
|
|
|
|
|
2012-07-21 08:47:09 -06:00
|
|
|
/* On gen6+ we refuse to init without kms enabled, but then the drm core
|
|
|
|
* goes right around and calls lastclose. Check for this and don't clean
|
|
|
|
* up anything. */
|
|
|
|
if (!dev_priv)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (drm_core_check_feature(dev, DRIVER_MODESET)) {
|
2011-04-21 15:18:32 -06:00
|
|
|
intel_fb_restore_mode(dev);
|
2010-01-31 22:38:10 -07:00
|
|
|
vga_switcheroo_process_delayed_switch();
|
2008-03-29 15:53:58 -06:00
|
|
|
return;
|
DRM: i915: add mode setting support
This commit adds i915 driver support for the DRM mode setting APIs.
Currently, VGA, LVDS, SDVO DVI & VGA, TV and DVO LVDS outputs are
supported. HDMI, DisplayPort and additional SDVO output support will
follow.
Support for the mode setting code is controlled by the new 'modeset'
module option. A new config option, CONFIG_DRM_I915_KMS controls the
default behavior, and whether a PCI ID list is built into the module for
use by user level module utilities.
Note that if mode setting is enabled, user level drivers that access
display registers directly or that don't use the kernel graphics memory
manager will likely corrupt kernel graphics memory, disrupt output
configuration (possibly leading to hangs and/or blank displays), and
prevent panic/oops messages from appearing. So use caution when
enabling this code; be sure your user level code supports the new
interfaces.
A new SysRq key, 'g', provides emergency support for switching back to
the kernel's framebuffer console; which is useful for testing.
Co-authors: Dave Airlie <airlied@linux.ie>, Hong Liu <hong.liu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-07 15:24:08 -07:00
|
|
|
}
|
2008-03-29 15:53:58 -06:00
|
|
|
|
2008-07-30 13:06:12 -06:00
|
|
|
i915_gem_lastclose(dev);
|
|
|
|
|
2005-09-24 22:28:13 -06:00
|
|
|
i915_dma_cleanup(dev);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2007-08-25 04:23:09 -06:00
|
|
|
void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
|
2005-04-16 16:20:36 -06:00
|
|
|
{
|
drm/i915: preliminary context support
Very basic code for context setup/destruction in the driver.
Adds the file i915_gem_context.c This file implements HW context
support. On gen5+ a HW context consists of an opaque GPU object which is
referenced at times of context saves and restores. With RC6 enabled,
the context is also referenced as the GPU enters and exists from RC6
(GPU has it's own internal power context, except on gen5). Though
something like a context does exist for the media ring, the code only
supports contexts for the render ring.
In software, there is a distinction between contexts created by the
user, and the default HW context. The default HW context is used by GPU
clients that do not request setup of their own hardware context. The
default context's state is never restored to help prevent programming
errors. This would happen if a client ran and piggy-backed off another
clients GPU state. The default context only exists to give the GPU some
offset to load as the current to invoke a save of the context we
actually care about. In fact, the code could likely be constructed,
albeit in a more complicated fashion, to never use the default context,
though that limits the driver's ability to swap out, and/or destroy
other contexts.
All other contexts are created as a request by the GPU client. These
contexts store GPU state, and thus allow GPU clients to not re-emit
state (and potentially query certain state) at any time. The kernel
driver makes certain that the appropriate commands are inserted.
There are 4 entry points into the contexts, init, fini, open, close.
The names are self-explanatory except that init can be called during
reset, and also during pm thaw/resume. As we expect our context to be
preserved across these events, we do not reinitialize in this case.
As Adam Jackson pointed out, The cutoff of 1MB where a HW context is
considered too big is arbitrary. The reason for this is even though
context sizes are increasing with every generation, they have yet to
eclipse even 32k. If we somehow read back way more than that, it
probably means BIOS has done something strange, or we're running on a
platform that wasn't designed for this.
v2: rename load/unload to init/fini (daniel)
remove ILK support for get_size() (indirectly daniel)
add HAS_HW_CONTEXTS macro to clarify supported platforms (daniel)
added comments (Ben)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2012-06-04 15:42:42 -06:00
|
|
|
i915_gem_context_close(dev, file_priv);
|
2009-06-03 01:27:35 -06:00
|
|
|
i915_gem_release(dev, file_priv);
|
2005-04-16 16:20:36 -06:00
|
|
|
}
|
|
|
|
|
2010-09-24 09:02:42 -06:00
|
|
|
void i915_driver_postclose(struct drm_device *dev, struct drm_file *file)
|
2008-07-30 13:06:12 -06:00
|
|
|
{
|
2010-09-24 09:02:42 -06:00
|
|
|
struct drm_i915_file_private *file_priv = file->driver_priv;
|
2008-07-30 13:06:12 -06:00
|
|
|
|
2010-09-24 09:02:42 -06:00
|
|
|
kfree(file_priv);
|
2008-07-30 13:06:12 -06:00
|
|
|
}
|
|
|
|
|
2007-09-02 20:06:45 -06:00
|
|
|
struct drm_ioctl_desc i915_ioctls[] = {
|
2010-08-14 04:20:34 -06:00
|
|
|
DRM_IOCTL_DEF_DRV(I915_INIT, i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_FLUSH, i915_flush_ioctl, DRM_AUTH),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_FLIP, i915_flip_bufs, DRM_AUTH),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_BATCHBUFFER, i915_batchbuffer, DRM_AUTH),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_IRQ_EMIT, i915_irq_emit, DRM_AUTH),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_IRQ_WAIT, i915_irq_wait, DRM_AUTH),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GETPARAM, i915_getparam, DRM_AUTH),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_SETPARAM, i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
|
2012-01-17 04:50:12 -07:00
|
|
|
DRM_IOCTL_DEF_DRV(I915_ALLOC, drm_noop, DRM_AUTH),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_FREE, drm_noop, DRM_AUTH),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_INIT_HEAP, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
|
2010-08-14 04:20:34 -06:00
|
|
|
DRM_IOCTL_DEF_DRV(I915_CMDBUFFER, i915_cmdbuffer, DRM_AUTH),
|
2012-01-17 04:50:12 -07:00
|
|
|
DRM_IOCTL_DEF_DRV(I915_DESTROY_HEAP, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
|
2012-04-26 15:28:01 -06:00
|
|
|
DRM_IOCTL_DEF_DRV(I915_SET_VBLANK_PIPE, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
|
2010-08-14 04:20:34 -06:00
|
|
|
DRM_IOCTL_DEF_DRV(I915_GET_VBLANK_PIPE, i915_vblank_pipe_get, DRM_AUTH),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_EXECBUFFER2, i915_gem_execbuffer2, DRM_AUTH|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED),
|
2012-09-21 18:01:20 -06:00
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_SET_CACHING, i915_gem_set_caching_ioctl, DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_GET_CACHING, i915_gem_get_caching_ioctl, DRM_UNLOCKED),
|
2010-08-14 04:20:34 -06:00
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_ENTERVT, i915_gem_entervt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_LEAVEVT, i915_gem_leavevt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_CREATE, i915_gem_create_ioctl, DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_PREAD, i915_gem_pread_ioctl, DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_PWRITE, i915_gem_pwrite_ioctl, DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_MMAP, i915_gem_mmap_ioctl, DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_MMAP_GTT, i915_gem_mmap_gtt_ioctl, DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_SET_DOMAIN, i915_gem_set_domain_ioctl, DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_SET_TILING, i915_gem_set_tiling, DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_GET_TILING, i915_gem_get_tiling, DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_MADVISE, i915_gem_madvise_ioctl, DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_OVERLAY_ATTRS, intel_overlay_attrs, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
|
2012-01-03 09:05:39 -07:00
|
|
|
DRM_IOCTL_DEF_DRV(I915_SET_SPRITE_COLORKEY, intel_sprite_set_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GET_SPRITE_COLORKEY, intel_sprite_get_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
|
2012-05-24 16:03:10 -06:00
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_WAIT, i915_gem_wait_ioctl, DRM_AUTH|DRM_UNLOCKED),
|
2012-06-04 15:42:54 -06:00
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_CREATE, i915_gem_context_create_ioctl, DRM_UNLOCKED),
|
|
|
|
DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_DESTROY, i915_gem_context_destroy_ioctl, DRM_UNLOCKED),
|
2012-07-12 12:01:05 -06:00
|
|
|
DRM_IOCTL_DEF_DRV(I915_REG_READ, i915_reg_read_ioctl, DRM_UNLOCKED),
|
2005-07-07 05:03:38 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
|
2005-07-10 01:31:26 -06:00
|
|
|
|
2012-03-26 01:45:41 -06:00
|
|
|
/*
|
|
|
|
* This is really ugly: Because old userspace abused the linux agp interface to
|
|
|
|
* manage the gtt, we need to claim that all intel devices are agp. For
|
|
|
|
* otherwise the drm core refuses to initialize the agp support code.
|
2005-07-10 01:31:26 -06:00
|
|
|
*/
|
2007-07-10 23:53:27 -06:00
|
|
|
int i915_driver_device_is_agp(struct drm_device * dev)
|
2005-07-10 01:31:26 -06:00
|
|
|
{
|
|
|
|
return 1;
|
|
|
|
}
|