The MBUS (and its associated controller) is the bus in the Allwinner SoCs
that DMA devices use in the system to access the memory.
Among other things (and depending on the SoC generation), it can also
enforce priorities or report bandwidth usages on a per-master basis.
One of the most notable thing is that instead of having the same mapping
for the RAM than the CPU, it maps it at address 0, which means we'll have
to do address translation thanks to the dma-ranges property.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
David Bauer reported that the VDSL modem (attached via PCIe)
on his AVM Fritz!Box 7530 was complaining about not having
enough space in the BAR. A closer inspection of the old
qcom-ipq40xx.dtsi pulled from the GL-iNet repository listed:
| qcom,pcie@80000 {
| compatible = "qcom,msm_pcie";
| reg = <0x80000 0x2000>,
| <0x99000 0x800>,
| <0x40000000 0xf1d>,
| <0x40000f20 0xa8>,
| <0x40100000 0x1000>,
| <0x40200000 0x100000>,
| <0x40300000 0xd00000>;
| reg-names = "parf", "phy", "dm_core", "elbi",
| "conf", "io", "bars";
Matching the reg-names with the listed reg leads to
<0xd00000> as the size for the "bars".
Cc: stable@vger.kernel.org
BugLink: https://www.mail-archive.com/openwrt-devel@lists.openwrt.org/msg45212.html
Reported-by: David Bauer <mail@david-bauer.net>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Andy Gross <agross@kernel.org>
This adds the gpio-ranges property so that the GPIO pins are initialized
by the GPIO framework and not pinctrl. This fixes a circular dependency
between these two frameworks so GPIO hogging can be used on this board.
This was not tested on this particular hardware, however this same
change was tested on qcom-pm8941 using a LG Nexus 5 (hammerhead) phone.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Andy Gross <agross@kernel.org>
This adds the gpio-ranges property so that the GPIO pins are initialized
by the GPIO framework and not pinctrl. This fixes a circular dependency
between these two frameworks so GPIO hogging can be used on this board.
This was not tested on this particular hardware, however this same
change was tested on qcom-pm8941 using a LG Nexus 5 (hammerhead) phone.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Andy Gross <agross@kernel.org>
This adds the gpio-ranges property so that the GPIO pins are initialized
by the GPIO framework and not pinctrl. This fixes a circular dependency
between these two frameworks so GPIO hogging can be used on this board.
This was not tested on this particular hardware, however this same
change was tested on qcom-pm8941 using a LG Nexus 5 (hammerhead) phone.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Andy Gross <agross@kernel.org>
This adds the gpio-ranges property so that the GPIO pins are initialized
by the GPIO framework and not pinctrl. This fixes a circular dependency
between these two frameworks so GPIO hogging can be used on this board.
This was not tested on this particular hardware, however this same
change was tested on qcom-pm8941 using a LG Nexus 5 (hammerhead) phone.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Andy Gross <agross@kernel.org>
We can now add l4 abe interconnect hierarchy and ti-sysc data with
ti-sysc driver supporting external optional clocks needed by mcpdm.
This data is generated based on platform data from a booted system
and the interconnect acces protection registers for ranges. To avoid
regressions, we initially validate the device tree provided data
against the existing platform data on boot.
Note that mcpdm we now need to enable at module level only for devices
that have the external pdmclk wired from the PMIC as the clock is
needed for the module to be accessible.
Also note that abe seems to be the same as on omap4 except for domains
and clocks and we may be able to combine the l4 abe data later on.
But let's play it safe and just initially use what we have already
defined in the platform data.
Cc: devicetree@vger.kernel.org
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can now add l4 abe interconnect hierarchy and ti-sysc data with
ti-sysc driver supporting external optional clocks needed by mcpdm.
This data is generated based on platform data from a booted system
and the interconnect acces protection registers for ranges. To avoid
regressions, we initially validate the device tree provided data
against the existing platform data on boot.
Note that mcpdm we now need to enable at module level only for devices
that have the external pdmclk wired from the PMIC as the clock is
needed for the module to be accessible.
Cc: devicetree@vger.kernel.org
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The mcpdm module found on omap4 and 5 needs pdmclk clock from
the pmic that may or may not be wired. Without this clock we
cannot read the registers for mcpdm at all. For the external
mcpdm clock to work, it needs to be muxed at the module level
for ti-sysc driver probe to mux it early enough for probe.
Let's set up a common file for it to make things a bit easier
to make l4 abe interconnect to probe with ti-sysc driver. Note
that this is not needed for omap5 as we can just update mcpdm
muxing in omap5-board-common.dtsi in later patches.
Cc: devicetree@vger.kernel.org
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The correct DT property for specifying a GPIO used for reset
is "reset-gpios", the driver now accepts this name, use it here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
When going to suspend to ram mode (or rtc-only mode), the DDR regulator
must be told to stay on, else this rail will go down when the PMIC_EN
signal is deasserted.
Signed-off-by: Mike Erdahl <m-erdahl@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
These regulator outputs are needed even in deep sleep modes to prevent
low-voltage detection events. Make these always ON to avoid this.
Signed-off-by: Kabir Sahane <x0153567@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
ti,syscon-lane-sel and ti,syscon-lane-conf properties specific to enable
PCIe x2 lane mode are added here.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
I2C2 is available on the PE pingroup, on the same pins as the camera
sensor interface (CSI) controller's camera control interface pins.
This provides an option to use I2C2 instead of that control interface
to configure camera sensors.
Add a pinctrl node for it. The property /omit-if-no-ref/ is added to
keep the device tree blob size down if it is unused.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
TBS A711 tablet has volume up/down keys connected to r_lradc. Add
support for these keys.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Allwinner A83T SoC has a low res adc like the one in Allwinner A10 SoC.
Now the driver has been modified to support it.
Add support for it.
Signed-off-by: Ziping Chen <techping.chan@gmail.com>
Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The defines are taken from dt-bindings/pinctrl/am33xx.h
Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The defines are taken from dt-bindings/pinctrl/am33xx.h
Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The defines are taken from dt-bindings/pinctrl/am33xx.h
Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The defines are taken from dt-bindings/pinctrl/am33xx.h
Signed-off-by: Christina Quast <cquast@hanoverdisplays.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
External E-Mail
The X11 license text [1] is explicitly for the X Consortium and has a
couple of extra clauses. The MIT license text [2] is actually what the
current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
External E-Mail
The X11 license text [1] is explicitly for the X Consortium and has a
couple of extra clauses. The MIT license text [2] is actually what the
current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
External E-Mail
The X11 license text [1] is explicitly for the X Consortium and has a
couple of extra clauses. The MIT license text [2] is actually what the
current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
External E-Mail
The X11 license text [1] is explicitly for the X Consortium and has a
couple of extra clauses. The MIT license text [2] is actually what the
current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
In the current state, A33 NAND controllers use PIO during
transfers. Throughput can be increased thanks to the use of DMA
(mostly during reads, because of the ECC pipelining feature).
Besides the usual addition of DMA DT properties, because the A33
NAND DMA handling is different than for older SoCs, we must also
update the compatible which has recently been introduced for this
purpose.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This reverts commit fa9463564e.
Per Linus Walleij:
Dear ARM SoC maintainers,
can you please revert this patch. It was the wrong solution to the
wrong problem, and I must have acted in stress. Andrey fixed the
real bug in a proper way in these commits:
commit e5545c94e4
"gpio: of: Check propname before applying "cs-gpios" quirks"
commit 7ce40277bf
"gpio: of: Check for "spi-cs-high" in child instead of parent node"
Signed-off-by: Olof Johansson <olof@lixom.net>
Few small fixes for omap variants:
- Fix ams-delta gpio IDs
- Add missing of_node_put for omapdss platform init code
- Fix unconfigured audio regulators for two am335x boards
- Fix use of wrong offset for am335x d_can clocks
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlymfJcRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXOpAQ//dVHZ2V7/lHr+UoYm/FJiYOdjMiSF+oMm
+x/oh39rJm9K0R96ZQG1LJZPmt6bCRgi2tOAPsQuDdJhhQL58Wf5KkRcMiGHr40b
hm6ji83UbUqRUZ2jALX2yRJ9D6RFYrXRcgBNZdZsXprQvbk88jiBGSMdkNChuFP2
I16o0sj/nK+aikPKd6UJnCLNYFyppP+0fTMdvxrwRix8AQczsOU67C8zfzCDsiZ8
dY/l212pr/jYmGm4L+ynTtdOxdxLu39xisRml6LLsY0LCQmWnciif1tIi6GwfEwu
95PyRFrScg9TWn7z8ss4Fwkqkak+TlHQ5eE3DssRYX4ww5IhUdT1YzfmCbP97Jhc
GNdHhDR4yBs7cX9HIOQH3Zjhfqlx19D1pYBy55iNmsDGO5/bQU/h+bLZxxYuGRCs
WOiCnCdeVTjlMcFBTXzQ8NTC0rzg3vOj78Ai4DNarS56CNcw+zucgV0gcLIr0/ms
D7yeHDvPbUQTT7beFmKW8KNSbtvrcKpnlBWHSpXPWo+gXCZ8GrpSSa7qpdtA7nEg
RqYMiQmha075/7YTQ1qt/pm35q34STMcV7Y0zx3v0aVS0+1aM91oH+jArfTTJ7Hr
5Z5oUECutwECc5GM95vbUSMqYJ0lG094N0y5APvLDkF5YGh1UP7mb99w6xMvAvsg
3GgdTGkm7Xg=
=P4SD
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.1/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Fixes for omaps for v5.1-rc cycle
Few small fixes for omap variants:
- Fix ams-delta gpio IDs
- Add missing of_node_put for omapdss platform init code
- Fix unconfigured audio regulators for two am335x boards
- Fix use of wrong offset for am335x d_can clocks
* tag 'omap-for-v5.1/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Fix dcan clkctrl clock for am3
ARM: dts: am335x-evmsk: Correct the regulators for the audio codec
ARM: dts: am335x-evm: Correct the regulators for the audio codec
ARM: OMAP2+: add missing of_node_put after of_device_is_available
ARM: OMAP1: ams-delta: Fix broken GPIO ID allocation
Signed-off-by: Olof Johansson <olof@lixom.net>
- fix a typo in sama5d2 pinmuxing which concerns the ISC data 0 signal
- fix a kobject reference leak
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEADBLyYlprFuNbTVNPjnmE/d7ZC0FAlyl/rIACgkQPjnmE/d7
ZC1RAw/+NgVazhR8QkZKA396pFhCC10CyulMIGXRBVV6W/4/PReObU7px8F27bX5
ahusOi19+xJ0sbM3GnChCugPTlMcCDXhAIZVS7+GPfbsFJoIUX0gv/F9OvV/hd3x
zxjVGbquqW7H7ArJWSraIpLvfeUgyiQIrqEhHBZLdZx+sPHokYNVeUvnNuecePkv
uj9De10D+5mHl6H5XhNqCe42Czgoe/6LW9NEtHllSiUOAdZIbzIvl8L836mPNmrl
s2telHNR3Kl2optkJuTXQHXHSQBXYcrme1YyP2dzY+n66JFMu5scKlQNrEFnwzAK
WkN1ydcHizAGjAVsvGdfxh1gv7zs9pqt2D4aGDvR5R0jN2VhgrE6n+JVWNYdZYG+
WEzsmnXliqRvOIGytNp/cRSbtB8RkkQ4oDnhSk6+1+ZS3BaJlILLUuLDs0vE4P9U
q4sVuOwMd5E8aacZ8C6b7LJ+kB43CCafbB07VNVHgreVdQDpMriu5OtMYZkm4Pbr
mlkhJnKgv3/SLuC/ZgUHhgz723s09My854zs/fbKcrcGiCizgdnYtq01oE11J3H4
CbL623zFJNfpcGCTTuLcaz0aIXmfQZ+UsazhMK3r15GXyWSwOa3fTLnzJjesBo+y
w+Wmi+FrW2xoHZWyoOK5cC2wnqVxy1GDTVys/kWceCiHu04wJwY=
=kRr0
-----END PGP SIGNATURE-----
Merge tag 'at91-5.1-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixes
AT91 fixes for 5.1
- fix a typo in sama5d2 pinmuxing which concerns the ISC data 0 signal
- fix a kobject reference leak
* tag 'at91-5.1-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
arm/mach-at91/pm : fix possible object reference leak
ARM: dts: at91: Fix typo in ISC_D0 on PC9
Signed-off-by: Olof Johansson <olof@lixom.net>
sd-card related fixes on both rk3328 ans rk3288-tinker and a
regulator fix on rock64 and making ddc actually work on the
Rock PI 4 due to missing the ddc bus.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlyhSTcQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgZJDB/9YqOy1Xzf7URHsOHMecGkt1dMSQom+Ln6Y
pc4Fxu93W3jsELPcVi01iRTYVg8W90RKjVLer+mM3LuFJpAh2hIxIcMZu7zqEZWg
6HNJA6GbcW0ZqUdBdV0GID0VIdHdkopq6b4qtbhuLUCaSzRocKgxStPPcEmeV4Yt
HDZOzkuks+BgUfsCfYmEiyoEIVUFLMFsD/MLo1az1mGNQ0bpi4DYN8XCY8lKDtmT
PHfLQuyWdmRAojD+xymvFShFGoyLAbHMK0v6ckaJ0tSy+3VQ8QgzCxhUPF+fR8vg
8kfgPGkjV5t7IS/DrcFYEp0vH2RRTMhOhx5PkFocypHK0J0UBzSs
=KU2f
-----END PGP SIGNATURE-----
Merge tag 'v5.1-rockchip-dtfixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes
Fixes for dtc warnings, fixes for ethernet transfers on rk3328,
sd-card related fixes on both rk3328 ans rk3288-tinker and a
regulator fix on rock64 and making ddc actually work on the
Rock PI 4 due to missing the ddc bus.
* tag 'v5.1-rockchip-dtfixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Remove #address/#size-cells from rk3288-veyron gpio-keys
ARM: dts: rockchip: Remove #address/#size-cells from rk3288 mipi_dsi
ARM: dts: rockchip: Fix gpu opp node names for rk3288
arm64: dts: rockchip: fix rk3328 sdmmc0 write errors
arm64: dts: rockchip: fix rk3328 rgmii high tx error rate
ARM: dts: rockchip: Fix SD card detection on rk3288-tinker
arm64: dts: rockchip: Fix vcc_host1_5v GPIO polarity on rk3328-rock64
ARM: dts: rockchip: fix rk3288 cpu opp node reference
arm64: dts: rockchip: add DDC bus on Rock Pi 4
arm64: dts: rockchip: fix rk3328-roc-cc gmac2io tx/rx_delay
Signed-off-by: Olof Johansson <olof@lixom.net>
Update the properties for the lm3532 device node for droid4.
With this change the backlight LED string and the keypad
LED strings will be controlled separately.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
[tony@atomide.com: remove the line "backlight = <&lcd_backlight>"]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Jacek Anaszewski <jacek.anaszewski@gmail.com>
TBS A711 tablet contains u-blox NEO-6M module connected to UART2.
Enable UART2 to gain access to the module from userspace.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add simplified partitions for BMC and alternate flash. Include these by
default in Witherspoon.
Signed-off-by: Edward A. James <eajames@us.ibm.com>
Signed-off-by: Adriana Kobylak <anoo@us.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Bind aspeed ADC channels 0-7 to "iio-hwmon" driver so the data of these
voltage sensing channels can be accessed by "lm_sensors". Channels 8-15
are not used on CMM BMC.
Signed-off-by: Tao Ren <taoren@fb.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Add a node to describe the video engine on the AST2500.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The GFX controller is the internal graphics device used by the SoC
(opposed to the one connected via the PCIe device and used by the host).
This configures it with a framebuffer region and adds it to the command
line so kernel boot messages appear on the display.
Enabled for Romulus, Witherspoon, and the ASPEED AST2500 EVB.
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The ast2500 has a reset for the CRT device that must be deasserted
before it can be used. Similarly it has a clock gate for a clock called
D1CLK that must be set to running.
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
We have for the H3 boards some kind of cargo cult apparently, where we
would have a pinctrl node even for GPIOs without any particular settings.
This is pretty much useless, so let's remove them.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
So far we've enabled pull-up and pull-down resistors on GPIOs using a
pinctrl node. Now that the GPIO binding allows for a flag to declare this,
let's switch to it.
This brings us closer to removing all the GPIO pinctrl nodes, which will in
turn allow us to switch the pinctrl strict mode on.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The flash_memory region was incorrect and exceeds AST2400's RAM range.
Fix it by putting it before coldfire region, and aligned with 32MiB.
Signed-off-by: Lei YU <mine260309@gmail.com>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
i.MX6 comes with 4 viewports, so configure PCIE node accordingly so
that the driver won't assume we only have 2.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX7D comes with 4 viewports, so configure PCIE node accordingly so
that the driver won't assume we only have 2.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add nodes enabling internal PCI controllers to which the internal USB
controllers are connected, add USB PHY node and pinmux nodes.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The NAND chips in our DTs have address and size cells, even though they
don't have any child nodes. Remove them.
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The NAND controller node name should be nand-controller and not nand as we
used previously according to the devicetree specification. Let's fix our
DTs.
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
A83T DTSI has cpu clocks defined only on the first CPU in each cluster.
We can bring down any CPU in the cluster, so we need to define clock
for each CPU, so that the system knows what clock to use if the first
CPU is down.
Also move the clocks property below the compatible on cpus where it is
already defined. Property "clock-names" is not needed.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Add pin definitions for UART2 PB pins. These are used on TBS-A711
tablet.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
A711 tablet has BMA250 accelerometer connected to I2C1 bus. Enable
both the I2C1 bus and add the accelerometer device to it.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Enable to use CPUs as cooling device in the future, by adding
"#cooling-cells" to each CPU node. This property should be present for
all the CPUs of a cluster. If these are present only for a subset of
CPUs of a cluster then things will start falling apart as soon as the
CPUs are brought online in a different order. For example, this will
happen because the operating system looks for such properties in the CPU
node it is trying to bring up, so that it can register a cooling device.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
A83T has 5 UART interfaces, but only the first two have their nodes
defined in sun8i-a83t.dtsi. Add nodes for the missing interfaces.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
TBS A711 tablet has a bcm20702a1 bluetooth chip (part of AP6210 WiFi/BT
module) connected to UART1. Add node for the blutooth chip.
The driver needs brcm/BCM20702A1.hcd firmware file to run.
Signed-off-by: Ondrej Jirman <megous@megous.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This patch enables the vop0 and hdmi nodes
for a MK808 with rk3066 processor.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds the hdmi nodes to rk3066.
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This adds the GPIO line names from the schematics to get them displayed
in the debugfs output of each GPIO controller.
The schematics from Odroid-C1+ PCB revision 0.4 20150615 are used as
referenced.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Only a certain number of CFU1's come with NOR flash populated. Disable
it by default to avoid trying to probe NOR flash on devices that don't
have it. Devices that do have it can rely on the bootloader to enable
this node.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The function argument for the ISC_D0 on PC9 was incorrect. According to
the documentation it should be 'C' aka 3.
Signed-off-by: David Engraf <david.engraf@sysgo.com>
Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Fixes: 7f16cb676c ("ARM: at91/dt: add sama5d2 pinmux")
Cc: <stable@vger.kernel.org> # v4.4+
When entering suspend-to-mem, all PMIC outputs are disabled except
VDDIODDR which is put in power saving mode, and whose voltage is
increased (probably to counter the poor accuracy of power saving mode).
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
[claudiu.beznea@microchip.com: use regulator-changeable-in-suspend,
regulator-suspend-max-microvolt, regulator-suspend-max-microvolt,
use macros for regulators' states, add regulator-inital-state]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
This adds labels to commonly used device-tree nodes so that derivative
boards can avoid ahb/apb hierarchy.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Mighty is basically the same Chromebook as Jaq but it has a full-sized
SD slot and some different (slightly more rugged) plastics around it.
Like Jaq, Mighty may show up with various different brandings but all
of them have the same board inside.
In the downstream kernel Mighty and Jaq share a "dtsi" and Mighty just
adds the SD write protect (needed for a full-sized SD slot). We'll do
this upstream by just including the Jaq dts and make the changes.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Describe the remaining 3 LEDs, which are driven by the first CAT9554
port expander.
Drop the superfluous status property from the leds node while at it.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Enable the I2C bus, and add the following devices:
- Two CAT9554 port expanders (8 GPIOs, interrupt not wired by
default),
- R1EX24016ASAS0A EEPROM.
The bus also contains a MAX9856 Audio Codec, which is not yet supported.
All devices (incl. the audio codec) are documented to support an I2C bus
running at 400 kHz.
Pinctrl is based on the RZ/A BSP.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The recently added uart mux options had a few typos. Fix them.
Fixes: 43d0fe112585 ("ARM: dts: sun7i: add pinctrl for missing uart mux options")
Reported-by: Werner Böllmann <Werner.Boellmann@fh-dortmund.de>
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
We switched to the generic pinctrl binding some time ago, yet the GMAC
pinctrl node apparently slipped through. Fix this.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The USB OTG binding we have mandates to have a dr_mode property, yet not
all boards are setting it.
Since the generic otg binding states that the default mode should be the
OTG mode, let's use that one in our DTSI.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
We must not use legacy clock defines for dts clckctrl clocks as the offsets
will be wrong.
Fixes: 87fc89ced3 ("ARM: dts: am335x: Move l4 child devices to probe them with ti-sysc")
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add i.MX7ULP OCOTP support, its clock source is from
M4 BUS clock which is NOT available in Linux clock tree,
but M4 BUS clock is always ON when A7 (Linux) is alive,
so just use dummy clock here.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This is one of two boards that make use of the recently introduced SIOX
bus. Apart from the devices described in the dts it features a display
with touch that I didn't include here because it needs some non-mainline
change to operate correctly.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support of stm32mp157c discovery2 board (part number: STM32MP157C-DK2).
This board is a "super-set" of stm32mp157a-dk1. It embeds a STM32MP157c SOC
with AC package (TFBGA361, 148 ios) and 512MB of DDR3. Same connections
than stm32mp157a-dk1 board are available. Display panel (otm8009a) and
Murata wifi/BT combo is added.
This patch adds basic support for a kernel boot and enable otm8009a display
panel.
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add support of stm32mp157a discovery1 board (part number: STM32MP157A-DK1).
This board embeds a STM32MP157a SOC with AC package (TFBGA361, 148 ios)
and 512MB of DDR3. Several connections are available on this boards:
4*USB2.0, 1*USB2.0 typeC, SDcard, RJ45, HDMI, Arduino connector, ...
This patch enables basic support for a kernel boot.
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
The USB OTG binding we have mandates to have a dr_mode property, yet not
all boards are setting it.
Since the generic otg binding states that the default mode should be the
OTG mode, let's use that one in our DTSI.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The NAND pinctrl nodes names don't follow the pattern we've used and
enforced for some time. Make sure they do.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The children nodes of the pinctrl node hadn't have any reg property for
quite some time, so we don't need the size-cells property. Remove it.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The SATA controller never have any children nodes, so we don't need the
address and size cells properties.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The AHCI node was introduced with a typo in the reset-names property that
got written resets-name instead.
This was working because the reset is optional for that driver, and the
controller was put out of reset by the bootloader.
Fixes: 41c64d3318 ("ARM: dts: sun8i: r40: add sata node")
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Even though it doesn't make any difference at the binary level, the reg
property is an array of cells, and should be represented as such.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The regulator properties suffix is -supply, yet a _supply slipped in.
This was working because the regulator framework will provide a dummy
regulator when none is provided in the device tree, and the regulator
itself was always enabled.
Fixes: 90c5d7cdae ("ARM: dts: sun8i: a711: Add regulator support")
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Even though we shouldn't really have any external user of the clock
provided by the TCON, if clock-output-names is set, then #clock-cells must
be there as well.
Fix this.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
While the USB PHY Device Tree mandates that the name of the VBUS detect pin
should be usb0_vbus_det-gpios, a significant number of device tree use
usb0_vbus_det-gpio instead.
This was functional because the GPIO framework falls back to the gpio
suffix that is legacy, but we should fix this.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
While the USB PHY Device Tree mandates that the name of the ID detect pin
should be usb0_id_det-gpios, a significant number of device tree use
usb0_id_det-gpio instead.
This was functional because the GPIO framework falls back to the gpio
suffix that is legacy, but we should fix this.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The i2c-gpio driver uses named gpios now and the array of GPIOs is
deprecated. Switch to the new binding.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
As can be shown by the YAML schema now, the combination of GIC compatibles
we were using has never been an option.
Switch to the gic-400 variant, which is the more correct option.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Some nodes still have pinctrl-names entry, yet they don't have any pinctrl
group anymore. Drop them.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Commit 1848f3f444 ("ARM: dts: sun9i: Remove GPIO pinctrl nodes to avoid
warnings") was wrong on the optimus, and instead of droping the
pinctrl-names property, it dropped the regulator-name one.
Obviously, that wasn't what was intended. Reinstate regulator-name and drop
pinctrl-names.
Fixes: 1848f3f444 ("ARM: dts: sun9i: Remove GPIO pinctrl nodes to avoid warnings")
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The A23 and A33 both have an I2C controller in the ARISC domain, that share
the same pins with the RSB bus.
Even if it's an unusual configuration, that device can be used to drive the
PMIC, so let's use it.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The DSI bindings require that an address cell size of 1, and a size cell of
0. Instead of duplicating it in each and every board DTS file, let's put it
in the DTSI.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The soc node in the A80 DTSI has a ranges property, but no matching unit
address, which results in a DTC warning. Add the unit address to remove
that warning.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Our display engine endpoints trigger some DTC warnings due to the fact that
we're having a single endpoint that doesn't need any reg property, and
since we don't have a reg property, we don't need the address-cells and
size-cells properties anymore.
Fix those
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Our display engine endpoints trigger some DTC warnings due to the fact that
we're having a single endpoint that doesn't need any reg property, and
since we don't have a reg property, we don't need the address-cells and
size-cells properties anymore.
Fix those
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Our display engine endpoints trigger some DTC warnings due to the fact that
we're having a single endpoint that doesn't need any reg property, and
since we don't have a reg property, we don't need the address-cells and
size-cells properties anymore.
Fix those
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Our display engine endpoints trigger some DTC warnings due to the fact that
we're having a single endpoint that doesn't need any reg property, and
since we don't have a reg property, we don't need the address-cells and
size-cells properties anymore.
Fix those
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Our display engine endpoints trigger some DTC warnings due to the fact that
we're having a single endpoint that doesn't need any reg property, and
since we don't have a reg property, we don't need the address-cells and
size-cells properties anymore.
Fix those
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Our display engine endpoints trigger some DTC warnings due to the fact that
we're having a single endpoint that doesn't need any reg property, and
since we don't have a reg property, we don't need the address-cells and
size-cells properties anymore.
Fix those
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Our display engine endpoints trigger some DTC warnings due to the fact that
we're having a single endpoint that doesn't need any reg property, and
since we don't have a reg property, we don't need the address-cells and
size-cells properties anymore.
Fix those
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Since most of the display IPs have a single endpoint, having a reg
property, a unit-address and #address-cells and #size-cells will emit a
warning.
Let's remove those.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Unlike what the binding for multiple pipeline documents, the A83t doesn't
have the cross links between the TCON and the mixers.
Let's add them.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Make sure that A20 Olimex Lime2 pin bank regulators are
properly represented.
While pin banks A, B and F are connected to 3.3V static
regulator, pin banks E and G tied with LDO3 and LDO4 regulators
with 2.8V reference.
Signed-off-by: Priit Laes <priit.laes@paf.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Since only one alternative at a time is used, and some functions may not
be used at all, this cuts down the size of the board dtb files a bit.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This adds pinctrl settings the EMAC using pins in the PH block.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This adds pinctrl settings for the CAN controller using pins
PA16 and PA17.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This adds pinctrl settings for various missing uart options.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The H3 and H5 have never been converted to the new convention we want to
have for the pinctrl nodes.
Convert them.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Some nodes still have pinctrl-names entry, yet they don't have any pinctrl
group anymore. Drop them.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
- Correct phy mode setting of imx6dl-yapp4 board to fix a problem
caused by commit 5ecdd77c61 ("net: dsa: qca8k: disable delay
for RGMII mode").
- Add a missing of_node_put call to fix leaked reference detected by
coccinelle in imx51 machine code.
- Fix imx6q cpuidle driver bug which causes that CPU might not wake up
at expected time.
- Increase reset duration of Ethernet phy Micrel KSZ9031RNX to fix
transmission timeouts error seen on imx6qdl-phytec-pfla02 board.
- Correct SPDX License Identifier style for imx6ull-pinfunc-snvs.h.
- Fix 'bus-witdh' typos in imx6qdl-icore-rqs.dtsi.
- Correct pseudo PHY address of switch device for imx6dl-yapp4 board.
- Update PWM driver options in imx defconfig files due to the change
on driver part.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJclKQNAAoJEFBXWFqHsHzOSugIAJGMo/4tEOijA6oysBhzwE3A
xy7nHp92RxAZEImjE14NRNgyS6zTZd51PWn3CQjjtw+x+6OBsk4kI+ftQvxp1irg
7ag6uvjZ5lPaW04tF6bUbI9vZd9+Fsy1z7D/hTzsPPj7w7iH+2rMgWsNwma/ZZ9r
UFmSfkgxE1kj8sHsnm3EoryKLeu69gD1p+chsWwe4/zxeo+yDeOQuXc1fc05HN5Y
JOPvHk8PWPDNHwhu8XX20aPGGZpjxi75uhwGDbIQnVCp/k4fDZyDxKfNKcZSrFbK
JsDxGRIRYd+TXM/E/UJ1TdXsmP6pUoyMXVJi3+0nk0QqLnQqjkdTP2O9MRt+Qng=
=jCPr
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.1:
- Correct phy mode setting of imx6dl-yapp4 board to fix a problem
caused by commit 5ecdd77c61 ("net: dsa: qca8k: disable delay
for RGMII mode").
- Add a missing of_node_put call to fix leaked reference detected by
coccinelle in imx51 machine code.
- Fix imx6q cpuidle driver bug which causes that CPU might not wake up
at expected time.
- Increase reset duration of Ethernet phy Micrel KSZ9031RNX to fix
transmission timeouts error seen on imx6qdl-phytec-pfla02 board.
- Correct SPDX License Identifier style for imx6ull-pinfunc-snvs.h.
- Fix 'bus-witdh' typos in imx6qdl-icore-rqs.dtsi.
- Correct pseudo PHY address of switch device for imx6dl-yapp4 board.
- Update PWM driver options in imx defconfig files due to the change
on driver part.
* tag 'imx-fixes-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v4_v5_defconfig: enable PWM driver
ARM: imx_v6_v7_defconfig: continue compiling the pwm driver
ARM: dts: imx6dl-yapp4: Use correct pseudo PHY address for the switch
ARM: dts: imx6qdl: Fix typo in imx6qdl-icore-rqs.dtsi
ARM: dts: imx6ull: Use the correct style for SPDX License Identifier
ARM: dts: pfla02: increase phy reset duration
ARM: imx6q: cpuidle: fix bug that CPU might not wake up at expected time
ARM: imx51: fix a leaked reference by adding missing of_node_put
ARM: dts: imx6dl-yapp4: Use rgmii-id phy mode on the cpu port
5.1, please pull the following:
- Helen fixes the HDMI hot-pug detect GPIO polarity for the Rasperry Pi
model B revision 2
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAlyRTfsACgkQh9CWnEQH
BwQbWBAAohl51B5h7cJGWz2F53tP9fDGcDL8CN1D2gIIid/3IPQtxhC7Z+Gdj0SF
mlSUmibKF1LeIgYYH0y/q5sSiW1Srew5ukkgYLGIiJ49YRysvgbAn0WYue7QMU8G
jegJBHy5Gz7JJvue+3KFaoZwDLos+IRI9vAeLMcK3PoQey4lfHS2s0NOkAVLxbcc
bOLdCNSOLDrw+wFM3MgtNqNQPjCg7X4eTJEg5pKwGFwjFdlGQqSNQ6u/SWKg6w64
eb3CLxzihIgX7s473HD7reK2Q+yhjj1mSWDC0HWTstJ90suMBeW3yQMf7v/IwRE/
iRLRlbsD0mCq1JMG8TuYmm3eq18PkFAteF2Hm6fMhdR1lE/QNQM2f/W7itYmMqZC
/kL/bkvthpoDAkCjTNEBtgOri1N9oJWVgC77asUc1gAKz5SwBpkPQSNZzxy5Tuqz
WNNd9v3lxnS5tnsqs//Iqgt23KTouD3w4MAGVkI4eVpjh1Kz83H+OrgU1fBxoqKl
rer8h4yS2sYkHfdZsnMZ/H+GBNqme8tVJufzasr03h60mXIFzNOy8RLaexZTslil
UP3d5e8fZo7u4BeNh7925R/K5pX+HjcmndXoQPflwoZ3SdulICgT8naDfEpoqpLQ
UTNuhDvlNY1ec7mnZQ5GwcDUwQ77e6KsNqwq2vMtffIMyGc/4j0=
=XW7G
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.1/devicetree-fixes' of https://github.com/Broadcom/stblinux into arm/fixes
This pull request contains Broadcom ARM-based SoCs Device Tree fixes for
5.1, please pull the following:
- Helen fixes the HDMI hot-pug detect GPIO polarity for the Rasperry Pi
model B revision 2
* tag 'arm-soc/for-5.1/devicetree-fixes' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm283x: Fix hdmi hpd gpio pull
The SPI DT bindings are for historical reasons a pitfall,
the ability to flag a GPIO line as active high/low with
the second cell flags was introduced later so the SPI
subsystem will only accept the bool flag spi-cs-high
to indicate that the line is active high.
It worked by mistake, but the mistake was corrected
in another commit.
The comment in the DTS file was also misleading: this
CS is indeed active high.
Fixes: cffbb02daf ("ARM: dts: nomadik: Augment NHK15 panel setting")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
They are pointless. As dtc points out:
Warning (avoid_unnecessary_addr_size):
/gpio-keys:
unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Let's remove them.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
They are pointless. As dtc points out:
Warning (avoid_unnecessary_addr_size):
/mipi@ff960000:
unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Let's remove them.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The device tree compiler yells like this:
Warning (unit_address_vs_reg):
/gpu-opp-table/opp@100000000:
node has a unit name, but no reg property
Let's match the cpu opp node names and use a dash.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The vdd_logic rail controls the voltage supplied to misc logic on
rk3288, including the voltage supplied to the memory controller. The
vcc logic is implemented by a PWM regulator.
Right now there are no consumers of vdd_logic on veyron but if anyone
ever wants to try to add DDR Freq they'd need it.
Note that in the downstream Chrome OS kernel the PWM regulator has
a voltage table with these points:
1350000 0%
1300000 10%
1250000 20%
1200000 31%
1150000 41%
1125000 46%
1100000 52%
1050000 62%
1000000 72%
950000 83%
The DDR Freq driver in the downstream kernel only uses some of those
points, namely:
DDR3: 1200000, 1150000, 1100000, 1050000
LPDDR: 1150000, 1100000, 1050000
When adapting the downstream kernel to upstream I have opted to switch
to using the "continuous" mode of the PWM regulator driver. This was
the only way I could get the upstream driver to achieve _exactly_ the
same voltages as the downstream driver could. Specifically note that
the old driver in downstream Chrome OS 3.14 _didn't_ have the
DIV_ROUND_CLOSEST_ULL() in the Rockchip PLL driver. That means if I
use the same (downstream) table I might end up with a duty cycle
that's 1 larger than was used downstream, leading to a slightly
different voltage. Due to the way the rounding worked I couldn't even
just adjust the "percent" by 1 for a given voltage level--certain duty
cycles just aren't achievable with the upstream math for voltage
tables.
Using continuous mode you can achieve the exact same duty cycle by
simply adjusting the voltage you use by a tad bit. The voltages that
are equivalent to the ones used in the downstream kernel's table are:
1350000, 1304472, 1255691, 1200407, 1154878,
1128862, 1099593, 1050813, 1005285, 950000
Note that the top/bottom voltage is exactly the same just due to the
way that continuous mode is calculated and the fact that I used those
as anchors. I didn't make any attempt to do the resistor math (as was
done on rk3399-gru).
If anyone ever gets DDRFreq working on veyron upstream they should
thus adjust the voltage specified in the DDRFreq operating points
slightly (as per the above) to obtain the existing/tested values. AKA
you'd use:
DDR3: 1200407, 1154878, 1099593, 1050813
LPDDR: 1154878, 1099593, 1050813
A few other notes:
- The "period" here (1994) is different than the "period" downstream
(2000) for similar reasons: there's a DIV_ROUND_CLOSEST_ULL() that
wasn't downstream. With 1994 upstream comes up with the same value
(0x94) to program into the hardware that downstream put there. As
far as I can tell 0x94 actually means 1993.27.
- The duty cycle unit of 0x94 was picked by just matching the period
which nicely allows us to insert 0x7b as that value to program into
the hardware for 950mV. The 0x7b was found by observing what the
downstream kernel calculated (not that the system can actually run
with vdd_log at 950 mV).
- The downstream kernel can also be seen to program a different value
into the CTRL field. Upstream achieves 0x0b and downstream 0x1b.
This is because the upstream commit bc834d7b07 ("pwm: rockchip:
Move the configuration of polarity") fixed a bug by adding "ctrl &=
~PWM_POLARITY_MASK". Downstream accidentally left bit 4 set.
Luckily this bit doesn't matter--it's only used when the PWM goes
inactive (AKA if it's in oneshot mode or is disabled) and we don't
do that for the PWM regulator.
I measured the voltage of vdd_log while adjusting it and found that
with the upstream kernel voltage difference between requested and
actual was 9.2 mV at 950 mV and 13.4 mV at 1350 mV with in-between
voltages consistently showing ~1% error. This error is likely
expected as voltage can be seen to sag a bit when more load is put on
the rail.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
When the rk3288-jerry device tree was first submitted we left out the
dvs-gpios because I pointed out that the property "dvs-gpios" wasn't
yet supported upstream [1]. Soon after that the property was added in
commit bad47ad2ee ("regulator: rk808: fixed the overshoot when
adjust voltage"). ...but we forgot to go back and add the property to
the jerry device tree file. Let's do so now.
NOTE: without this patch, jerry is likely still stable (thanks to the
fallback of making many small jumps in the rk808 regulator code) but
it'll take quite a bit longer to make voltage transitions.
[1] https://lore.kernel.org/linux-arm-kernel/CAD=FV=WwFgjzbk9xF5TU_ie6UnHQMyrZ176D4+jJTWWOoaKC2Q@mail.gmail.com/
Fixes: f3ee390e4e ("ARM: dts: rockchip: add veyron-jerry board")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
As far as I can tell/remember rev10 was originally created to support
making a SKU of jerry that had a different LCD. rev11-rev15 were
added to give some wiggle room for future builds. Downstream has a
separate device tree for rev10-rev15 (compared to rev3-rev7) with the
expectation that differences relating to the LCD would be accounted
for there but nothing was ever added to the rev10-rev15 making it
identical to the rev3-rev7 one.
It's likely nothing actually shipped with rev10-rev15 but they are
listed in the downstream kernel's device tree and it seems like it
should add a little safety if we match them here just in case
something actually shipped with one of these revisions and that device
will break if we don't claim support.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds HDMI video output support to the iwg23s board
from iWave. Due to a problem with the bootloader not dealing
with the configuration of one of the pins correctly, we have
to use a gpio-hog for the interrupt line to make sure the pin
is configured as GPIO-input when requesting the interrupt.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit adds DU support to the RZ/G1C (a.k.a. r8a77470)
specific device tree.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Commit d027521497 ("ARM: dts: sun8i-a23-a33: Move NAND controller device
node to sort by address") moved the NAND controller node around, but
dropped the default muxing in the process.
Reintroduce it.
Fixes: d027521497 ("ARM: dts: sun8i-a23-a33: Move NAND controller device node to sort by address")
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Correctly map the regulators used by tlv320aic3106.
Both 1.8V and 3.3V for the codec is derived from VBAT via fixed regulators.
Cc: <Stable@vger.kernel.org> # v4.14+
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Correctly map the regulators used by tlv320aic3106.
Both 1.8V and 3.3V for the codec is derived from VBAT via fixed regulators.
Cc: <Stable@vger.kernel.org> # v4.14+
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Describe the 128 MiB CFI NOR FLASH, which contains the boot loader and
its environment.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
After switching to the new FSL QSPI driver the properties
'fsl,qspi-has-second-chip' and 'big-endian' are not used anymore.
The driver now uses the 'reg' property to determine the bus and
the chipselect. The endianness is selected by the driver depending
on which SoC is used.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Even though the ChipIdea USB controller binding[1] doesn't specify the
properties that reference a PHY as required, the Linux driver
requires[2] such a reference.
The clock situation is like on i.MX53: The USB controller is clocked
from IMX5_CLK_USBOH3_GATE and the PHY from IMX5_CLK_USB_PHY1_GATE.
[1]: Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
[2]: Search for EINVAL in drivers/usb/chipidea/ci_hdrc_imx.c
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The switch is accessible through pseudo PHY which is located at 0x10.
Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Fixes: 87489ec3a7 ("ARM: dts: imx: Add Y Soft IOTA Draco, Hydra and Ursa boards")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It can be seen that 0xffb40000 < 0xffc01000, thus efuse comes first.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The device tree binding already lists compatible strings for these two
SoCs. Add a device node for them.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The 'max-brightness' property is not a valid one as per
Documentation/devicetree/bindings/leds/leds-gpio.txt, so remove it.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add MMDC1 compatible string which is missing, and also set
it to be disabled by default, as most of the platforms ONLY
use single channel MMDC0, if dual MMDC channels are used, it
can be enabled in board dts file.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Node name should be generic, so use "memory-controller"
instead of "mmdc" for MMDC node name, also remove "mmdc"
label for platforms with single MMDC node.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX7ULP has a MMDC module to control DDR, it reuses
i.MX6Q's MMDC module, add support for it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch corrects the SPDX License Identifier style
in imx6ull-pinfunc-snvs.h.
Changes made by using a script provided by Joe Perches here:
https://lkml.org/lkml/2019/2/7/46
and making some manual changes.
Suggested-by: Joe Perches <joe@perches.com>
Signed-off-by: Nishad Kamdar <nishadkamdar@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The name of CODEC input widget to which microphone is connected through
the "Headphone" jack is "IN12" not "IN1". This fixes microphone support
on Odroid XU3.
Cc: <stable@vger.kernel.org> # v4.14+
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The imx6q Technical reference manual shows the interrupt is
available to wake from sleep using the power button. The driver
has been available for quite some time, and other variants of the
i.MX6 have it enabled, so this implements it much like the others.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Now that the backlight driver is upstream, we can properly manage the
backlight from the panel.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This adds the i2c device node for the ethernet switch watchdog.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Increase the reset duration to ensure correct phy functionality. The
reset duration is taken from barebox commit 52fdd510de ("ARM: dts:
pfla02: use long enough reset for ethernet phy"):
Use a longer reset time for ethernet phy Micrel KSZ9031RNX. Otherwise a
small percentage of modules have 'transmission timeouts' errors like
barebox@Phytec phyFLEX-i.MX6 Quad Carrier-Board:/ ifup eth0
warning: No MAC address set. Using random address 7e:94:4d:02:f8:f3
eth0: 1000Mbps full duplex link detected
eth0: transmission timeout
T eth0: transmission timeout
T eth0: transmission timeout
T eth0: transmission timeout
T eth0: transmission timeout
Cc: Stefan Christ <s.christ@phytec.de>
Cc: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Fixes: 3180f95666 ("ARM: dts: Phytec imx6q pfla02 and pbab01 support")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
PMIC swbst regulator is used for the MikroBUS socket (pin +5V).
We have to set the regulator to "boot-on" and "always-on"
to output a voltage of 5V on this socket.
Signed-off-by: Pierre-Jean Texier <pjtexier@koncepto.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The PVDD_APIO_1V8 (LDO2) and PVDD_ABB_1V8 (LDO8) regulators were turned
off by Linux kernel as unused. However they supply critical parts of
SoC so they should be always on:
1. PVDD_APIO_1V8 supplies SYS pins (gpx[0-3], PSHOLD), HDMI level shift,
RTC, VDD1_12 (DRAM internal 1.8 V logic), pull-up for PMIC interrupt
lines, TTL/UARTR level shift, reset pins and SW-TACT1 button.
It also supplies unused blocks like VDDQ_SRAM (for SROM controller) and
VDDQ_GPIO (gpm7, gpy7).
The LDO2 cannot be turned off (S2MPS11 keeps it on anyway) so
marking it "always-on" only reflects its real status.
2. PVDD_ABB_1V8 supplies Adaptive Body Bias Generator for ARM cores,
memory and Mali (G3D).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Describe properly the MMC0 node (with attached embedded MMC memory) on
Arndale Octa by:
1. Adding the regulator for host interface (although it still has to be
"always-on" so the board with Linaro U-Boot will boot properly);
2. Using "non-removable" instead of "broken-cd" property, because eMMC
is embedded into the board;
3. Adding support for HS200 v1.8 to indicate such support in host
controller although this has no practical effect (embedded memory does
not support it).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The Exynos5420's Mobile Storage Host supports SD cards in UHS-I standard
(SD specification v3.0), with 1.8 V signaling in SD UHS DDR50. Adjust
the regulator and add necessary capability properties. Change the SDR
and DDR timings to match values in Insignal v3.4 Android kernel.
Tested with SD UHS-I card in SD UHS DDR50 mode.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Although on the schematics of Insignal Arndale Octa board the
PVDD_MIFS_1V1 (ldo23) and PVDD_G3DS_1V0 (ldo27) are marked as 1.2 V, the
vendor v3.4 Android kernel sets them lower. Also name suggests that
they should work on 1.1 V and 1.0 V respectively, not 1.2 V.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add missing audio routing entry for the capture stream, this change
is required to fix audio recording on Odroid XU3/XU3-Lite.
Fixes: 885b005d23 ("ARM: dts: exynos: Add support for secondary DAI to Odroid XU3")
Cc: stable@vger.kernel.org
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Arndale Octa (Exynos5420) has two ADC pins (AIN0 and AIN1) exposed on
CON6 header pins. Add ADC node to DTS file to enable it.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Fix the interrupt information for the GPIO lines with a shared EINT
interrupt.
Fixes: 16d7ff2642 ("ARM: dts: add dts files for exynos5260 SoC")
Cc: stable@vger.kernel.org
Signed-off-by: Stuart Menefy <stuart.menefy@mathembedded.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add DA9063 PMIC node to the I2C bus.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add IIC3 node to R8A7792 SoC device tree and a DA9063 PMIC node
to V2H Blanche board device tree.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use rgmii-id phy mode for the CPU port (MAC0) of the QCA8334 switch
to add delays to both Tx and Rx clock.
It worked with the rgmii mode before because the qca8k driver
(incorrectly) enabled delays in that mode and rgmii-id was not
implemented at all.
Commit 5ecdd77c61 ("net: dsa: qca8k: disable delay for RGMII mode")
removed the delays from the RGMII mode and hence broke the networking.
To fix the problem, commit a968b5e9d5 ("net: dsa: qca8k: Enable delay
for RGMII_ID mode") was introduced.
Now the correct phy mode is available so use it.
Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GW54xx has a front-panel microHDMI connector routed to a TDA19971
which is connected the the IPU CSI when using IMX6Q.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The GW551x has a front-panel microHDMI connector routed to a TDA19971
which is connected the the IPU CSI.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On vf610-zii-ssmb-spu3 board there is a supervisory microcontroller that
provides the watchdog functionality, so disable the on-chip Vybrid's
watchdog.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
None of these vf610-zii boards have a battery or super-capacitor
holding up power to the SNVS RTC embedded in the Vybrid SoC,
so it is preferable to disable the snvsrtc node.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Partitions in the NOR and EEPROM are application specific. Prepare the
SoM device tree so platform device tree's can add partitions.
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the missing interrupt information for the GPIO lines with
dedicated EINT interrupts.
Signed-off-by: Stuart Menefy <stuart.menefy@mathembedded.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Most of the work to support the high speed I2C ports on the Exynos5260
was added in commit 218e149613 ("i2c: exynos5: add support for HSI2C
on Exynos5260 SoC") and the pinctrl nodes have always been available.
All that is missing to get them working is the addition of the DT bindings.
Signed-off-by: Stuart Menefy <stuart.menefy@mathembedded.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
By default the MMC clock will be derived from mediatop PLL, which
usually runs at 666MHz. However as most SD and MMC clocks are multiples
or fractions of 100MHz, it makes more sense to use the bustop PLL
which runs at 800MHz. This matches the behaviour of the Samsung vendor
supplied 3.4 kernel.
Signed-off-by: Stuart Menefy <stuart.menefy@mathembedded.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Having nodes and overrides-by-label ordered alphabetically reduces the
possibility of conflicts from simultaneous edits. No functional change.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Arndale Octa board comes without fan so proper CPU cooling is necessary
to avoid critical shutdowns when CPUs are busy. Although thermal zones
were present but CPU cooling was missing in DTS.
Adjust the trip points and add respective cooling nodes for each CPU
thermal zone. The CPU throttling will start at 60 degrees of C,
intensify at 80 degrees of C and slow down CPUs as much as possible at
110 degrees of C.
With this configuration, when running four CPU intensive tasks, the
temperatures did not exceed 90 degrees of Celsius mostly oscillating
around 88 degrees in hottest thermal zone. Test was however done with
only four CPUs online (big cluster, Cortex A15) because of errors when
booting secondary CPUs.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Define the LDO14, LDO17, LDO22, LDO25, LDO30, LDO34, LDO36 and LDO37
unused regulators to describe the hardware.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Replacing bootargs with stdout-path property in chosen node allows using
early console by adding just 'earlycon' parameter to kernel command
line.
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add ADC node to Odroid U3 with its regulator, purely for documentation
purposes. The ADC stays disabled because it is not used (all inputs
grounded).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Exynos4412 should use "samsung,exynos4212-adc" compatible to report
proper number of (four) channels.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
The Amlogic Meson8b SoC has an internal clock measurer IP which allows
measuring frequencies of various clock paths.
Enable it on meson8b.dtsi so we can use it.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Amlogic Meson8 SoC has an internal clock measurer IP which allows
measuring frequencies of various clock paths.
Enable it on meson8.dtsi so we can use it.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This patch adds wifi support to the ASUS Tinker Board (S) machines.
This is provided by an wifi card (RTL8723BS) wired into the sdio interface.
It requires certain pins pulled, to enable the WiFi.
The schematics for these board do not show the WiFi connection, so the
connections have been taken from:
https://github.com/TinkerBoard/debian_kernel/blob/develop/arch/arm/boot/dts/rk3288-miniarm.dts
In particular the pulling of two pins.
Co-developed-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: David Summers <beagleboard@davidjohnsummers.uk>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Tested-by: Tony McKahan <tonymckahan@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The following message can be seen during boot:
rockchip-thermal ff280000.tsadc: Missing rockchip,grf property
Fix this by adding rockchip,grf property to tsadc node.
The warning itself is not relevant on rk3288 right now, as the
tsadc doesn't need to set GRF-values at this point and only newer
variants do.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The mmc.txt didn't explicitly say disable-wp is for SD card slot only,
but that is what it was designed for in the first place.
Remove all disable-wp from emmc or sdio controllers.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The Problem:
On ASUS Tinker Board S, when booting from the eMMC, and there is card
in the sd slot, there are constant errors.
Also when warm reboot, uboot can not access the sd slot
Cause:
Identified by Robin Murphy @ ARM. The Card Detect on rk3288
devices is pulled up by vccio-sd; so when the regulator powers this
off, card detect gives spurious errors. A second problem, is during
power down, vccio-sd apprears to be powered down. This causes a
problem when warm rebooting from the sd card. This was identified by
Jonas Karlman.
History:
A common fault on these rk3288 board, which impliment the reference
design.
When this arose before:
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-August/281153.html
And Ulf and Jaehoon clearly said this was a broken card detect design,
which should be solved via polling
Solution:
Hence broken-cd is set as a property. This cures the errors. The
powering down of vccio-sd during reboot is cured by adding
regulator-boot-on.
This solutions has been fairly widely reviewed and tested.
Fixes: e58c5e739d ("ARM: dts: rockchip: move shared tinker-board nodes to a common dtsi")
Cc: stable@vger.kernel.org
[Heiko: slightly inaccurate fixes but tinker is a sbc (aka like a Pi) where
we can hopefully expect people not to rely on overly old stable kernels]
Signed-off-by: David Summers <beagleboard@davidjohnsummers.uk>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The following error can be seen during boot:
of: /cpus/cpu@501: Couldn't find opp node
Change cpu nodes to use operating-points-v2 in order to fix this.
Fixes: ce76de9846 ("ARM: dts: rockchip: convert rk3288 to operating-points-v2")
Cc: stable@vger.kernel.org
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This is an H3-based board that sticks close to the reference design.
Supported features:
* UART
* DRAM
* MMC
* eMMC
* Ethernet
* USB host
* USB peripheral
* HDMI
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
- An improvement from Ard Biesheuvel, who noted that the identity map
setup was taking a long time due to flush_cache_louis().
- Update a comment about dma_ops from Wolfram Sang.
- Remove use of "-p" with ld, where this flag has been a no-op since
2004.
- Remove the printing of the virtual memory layout, which is no longer
useful since we hide pointers.
- Correct SCU help text.
- Remove legacy TWD registration method.
- Add pgprot_device() implementation for mapping PCI sysfs resource
files.
- Initialise PFN limits earlier for kmemleak.
- Fix argument count to match macro definition (affects clang builds)
- Use unified assembler language almost everywhere for clang, and
other clang improvements (from Stefan Agner, Nathan Chancellor).
- Support security extension for noMMU and other noMMU cleanups
(from Vladimir Murzin).
- Remove unnecessary SMP bringup code (which was incorrectly copy'n'
pasted from the ARM platform implementations) and remove it from
the arch code to discourge further copys of it appearing.
- Add Cortex A9 erratum preventing kexec working on some SoCs.
- AMBA bus identification updates from Mike Leach.
- More use of raw spinlocks to avoid -RT kernel issues
(from Yang Shi and Sebastian Andrzej Siewior).
- MCPM hyp/svc mode mismatch fixes from Marek Szyprowski.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIUAwUAXIvD9vTnkBvkraxkAQIiiw/41bA3yIv+4J/t7vw6PkMRzFwRG8YYc+ms
Rw6wlJIeBkiq2m5XOTNswMMjSDbYu0n5utzFTsf65nFxW2i34XkaC1kDws+vNdtx
WrEPSj6sjXSjuWEV5O3neET5Wc+z+tEJRkRs7E/e/2x1DE4kzYWNy1UT3ohamZmh
HN1Z9C7ijX5toPQ4AtiX12pc8f6CcodBsRUfebYf0+A7cVTyCkIxvMlvhparQjMW
8e4kLRuNvbHuzbbtlPCNMwnLR85FwM463OByk8F0nZ0RShQduAbnHaSZjVwLZUn5
8MMY4Yir7+R3sKc348kqE8WEVgKbeZYrgDJmM1RezJWfEblyFHnanNr/DWeskmZR
4ZFIESNAwQuTSIeCRhllBsGWrEU3pP8bnSTVAEKdv403rWTsRiA+R5/aMKMkfubK
1zNx8B3JszI4FeHVTW0l+2yVBbwm8ZTqHMBuSUF61I292ZrUXfaC+MgZ7CuhD1n9
vKO2MxuKb3BULJmpX5uT8RzBcRA/7eTDZrLkCUmSHmxwIMdkC4cVKyT33s9rue0J
kT/W/iKB9QB4KuHVRVdOJ2VX/KN5YjsRNc5D4kW1Ml9gfdQ3ohWA4yZzPR26KeRE
dHGcCbKK6jHyLxSQdJl1wItGBBUrAKV3u5IDgTClbE9X2LmJIbXwnMdAPC9WVJNb
BfUPlCLS9w==
=U6og
-----END PGP SIGNATURE-----
Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm
Pull ARM updates from Russell King:
- An improvement from Ard Biesheuvel, who noted that the identity map
setup was taking a long time due to flush_cache_louis().
- Update a comment about dma_ops from Wolfram Sang.
- Remove use of "-p" with ld, where this flag has been a no-op since
2004.
- Remove the printing of the virtual memory layout, which is no longer
useful since we hide pointers.
- Correct SCU help text.
- Remove legacy TWD registration method.
- Add pgprot_device() implementation for mapping PCI sysfs resource
files.
- Initialise PFN limits earlier for kmemleak.
- Fix argument count to match macro definition (affects clang builds)
- Use unified assembler language almost everywhere for clang, and other
clang improvements (from Stefan Agner, Nathan Chancellor).
- Support security extension for noMMU and other noMMU cleanups (from
Vladimir Murzin).
- Remove unnecessary SMP bringup code (which was incorrectly copy'n'
pasted from the ARM platform implementations) and remove it from the
arch code to discourge further copys of it appearing.
- Add Cortex A9 erratum preventing kexec working on some SoCs.
- AMBA bus identification updates from Mike Leach.
- More use of raw spinlocks to avoid -RT kernel issues (from Yang Shi
and Sebastian Andrzej Siewior).
- MCPM hyp/svc mode mismatch fixes from Marek Szyprowski.
* tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: (32 commits)
ARM: 8849/1: NOMMU: Fix encodings for PMSAv8's PRBAR4/PRLAR4
ARM: 8848/1: virt: Align GIC version check with arm64 counterpart
ARM: 8847/1: pm: fix HYP/SVC mode mismatch when MCPM is used
ARM: 8845/1: use unified assembler in c files
ARM: 8844/1: use unified assembler in assembly files
ARM: 8843/1: use unified assembler in headers
ARM: 8841/1: use unified assembler in macros
ARM: 8840/1: use a raw_spinlock_t in unwind
ARM: 8839/1: kprobe: make patch_lock a raw_spinlock_t
ARM: 8837/1: coresight: etmv4: Update ID register table to add UCI support
ARM: 8836/1: drivers: amba: Update component matching to use the CoreSight UCI values.
ARM: 8838/1: drivers: amba: Updates to component identification for driver matching.
ARM: 8833/1: Ensure that NEON code always compiles with Clang
ARM: avoid Cortex-A9 livelock on tight dmb loops
ARM: smp: remove arch-provided "pen_release"
ARM: actions: remove boot_lock and pen_release
ARM: oxnas: remove CPU hotplug implementation
ARM: qcom: remove unnecessary boot_lock
ARM: 8832/1: NOMMU: Limit visibility for CONFIG_FLASH_{MEM_BASE,SIZE}
ARM: 8831/1: NOMMU: pmsa-v8: remove unneeded semicolon
...
- fix memory access if logo is bigger than the screen (Manfred
Schlaegl)
- silence fbcon logo on 'quiet' boots (Prarit Bhargava)
- use kvmalloc() for scrollback buffer in fbcon (Konstantin Khorenko)
- misc fixes (Colin Ian King, YueHaibing, Matteo Croce, Mathieu
Malaterre, Anders Roxell, Arnd Bergmann)
- misc cleanups (Rob Herring, Lubomir Rintel, Greg Kroah-Hartman,
Jani Nikula, Michal Vokáč)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCAAGBQJci4YTAAoJEH4ztj+gR8IL8jkP/0BkuxHS1ZCP/JAbah/yM838
yuULNSxsO5FqmoH7n7AqDZ8j0NttMEQirzxN7vv5QkZi6QxWVHIFMaxqQSB4DfMg
lLF9LFAL/tzKBc5f3dVnD2YzJpNpg715ncfY55Jz0o/as2RE9OLlmwxYGF1VRLIG
EsBjYm4b0iVCOSu2YxecNCfPoy2LhwdqM8dxXdVgyuDRqxwoD2giC5pNDQVUMvQ3
037S256DblvedGNdj7g0QmmdvOmsd8jjhE/hJmjrvIp43pHDuFSH9mRZufKTVF3l
kXIlrJahH35w/Fv2rdWM4PlmuAKBIm49NVaZFfCodjCLIBidPSWNctKQnhY71Skf
oJSqftgiApVIGweKXYQnFpw964LVe5q85xeVRj3zLr9LCuo4EhiP8ue58eFnwWud
FTLEgiWSlomrd98t2C6HEnEUMv6XlulI2mAMmqBTZmmV/Vm1hiwHkL6sMFLfuB1A
Ee1m6LIqMombGsUwkUmRRGqWNeunX1TETVDCXuPb9EyyigSaA1PDtANF9UzXWMNf
ZKU9Vz0Lq3TFuhr5PolLjiAvXgxf9YLk36VgCu9CoGh/GFpMqRGoDPQkGOxy81E9
FpXTk7A7XmtUiwX4Tfxy6RrRBBtZWwvuBP79/yyEpl+IVbES/nS6R8TekQp5jbZj
r/1Z8shbwO4hltu6z14X
=+ZFI
-----END PGP SIGNATURE-----
Merge tag 'fbdev-v5.1' of git://github.com/bzolnier/linux
Pull fbdev updates from Bartlomiej Zolnierkiewicz:
"Just a couple of small fixes and cleanups:
- fix memory access if logo is bigger than the screen (Manfred
Schlaegl)
- silence fbcon logo on 'quiet' boots (Prarit Bhargava)
- use kvmalloc() for scrollback buffer in fbcon (Konstantin Khorenko)
- misc fixes (Colin Ian King, YueHaibing, Matteo Croce, Mathieu
Malaterre, Anders Roxell, Arnd Bergmann)
- misc cleanups (Rob Herring, Lubomir Rintel, Greg Kroah-Hartman,
Jani Nikula, Michal Vokáč)"
* tag 'fbdev-v5.1' of git://github.com/bzolnier/linux:
fbdev: mbx: fix a misspelled variable name
fbdev: omap2: fix warnings in dss core
video: fbdev: Fix potential NULL pointer dereference
fbcon: Silence fbcon logo on 'quiet' boots
printk: Export console_printk
ARM: dts: imx28-cfa10036: Fix the reset gpio signal polarity
video: ssd1307fb: Do not hard code active-low reset sequence
dt-bindings: display: ssd1307fb: Remove reset-active-low from examples
fbdev: fbmem: fix memory access if logo is bigger than the screen
video/fbdev: refactor video= cmdline parsing
fbdev: mbx: fix up debugfs file creation
fbdev: omap2: no need to check return value of debugfs_create functions
video: fbdev: geode: remove ifdef OLPC noise
video: offb: annotate implicit fall throughs
omapfb: fix typo
fbdev: Use of_node_name_eq for node name comparisons
fbcon: use kvmalloc() for scrollback buffer
fbdev: chipsfb: remove set but not used variable 'size'
fbdev/via: fix spelling mistake "Expandsion" -> "Expansion"
Pull networking fixes from David Miller:
"First batch of fixes in the new merge window:
1) Double dst_cache free in act_tunnel_key, from Wenxu.
2) Avoid NULL deref in IN_DEV_MFORWARD() by failing early in the
ip_route_input_rcu() path, from Paolo Abeni.
3) Fix appletalk compile regression, from Arnd Bergmann.
4) If SLAB objects reach the TCP sendpage method we are in serious
trouble, so put a debugging check there. From Vasily Averin.
5) Memory leak in hsr layer, from Mao Wenan.
6) Only test GSO type on GSO packets, from Willem de Bruijn.
7) Fix crash in xsk_diag_put_umem(), from Eric Dumazet.
8) Fix VNIC mailbox length in nfp, from Dirk van der Merwe.
9) Fix race in ipv4 route exception handling, from Xin Long.
10) Missing DMA memory barrier in hns3 driver, from Jian Shen.
11) Use after free in __tcf_chain_put(), from Vlad Buslov.
12) Handle inet_csk_reqsk_queue_add() failures, from Guillaume Nault.
13) Return value correction when ip_mc_may_pull() fails, from Eric
Dumazet.
14) Use after free in x25_device_event(), also from Eric"
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (72 commits)
gro_cells: make sure device is up in gro_cells_receive()
vxlan: test dev->flags & IFF_UP before calling gro_cells_receive()
net/x25: fix use-after-free in x25_device_event()
isdn: mISDNinfineon: fix potential NULL pointer dereference
net: hns3: fix to stop multiple HNS reset due to the AER changes
ip: fix ip_mc_may_pull() return value
net: keep refcount warning in reqsk_free()
net: stmmac: Avoid one more sometimes uninitialized Clang warning
net: dsa: mv88e6xxx: Set correct interface mode for CPU/DSA ports
rxrpc: Fix client call queueing, waiting for channel
tcp: handle inet_csk_reqsk_queue_add() failures
net: ethernet: sun: Zero initialize class in default case in niu_add_ethtool_tcam_entry
8139too : Add support for U.S. Robotics USR997901A 10/100 Cardbus NIC
fou, fou6: avoid uninit-value in gue_err() and gue6_err()
net: sched: fix potential use-after-free in __tcf_chain_put()
vhost: silence an unused-variable warning
vsock/virtio: fix kernel panic from virtio_transport_reset_no_sock
connector: fix unsafe usage of ->real_parent
vxlan: do not need BH again in vxlan_cleanup()
net: hns3: add dma_rmb() for rx description
...
Including:
- A big cleanup and optimization patch-set for the
Tegra GART driver
- Documentation updates and fixes for the IOMMU-API
- Support for page request in Intel VT-d scalable mode
- Intel VT-d dma_[un]map_resource() support
- Updates to the ATS enabling code for PCI (acked by Bjorn) and
Intel VT-d to align with the latest version of the ATS spec
- Relaxed IRQ source checking in the Intel VT-d driver for some
aliased devices, needed for future devices which send IRQ
messages from more than on request-ID
- IRQ remapping driver for Hyper-V
- Patches to make generic IOVA and IO-Page-Table code usable
outside of the IOMMU code
- Various other small fixes and cleanups
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAlyCNlIACgkQK/BELZcB
GuNDiRAAscgYj0BdqpZVUNHl4PySR12QJpS1myl/OC4HEbdB/EOh+bYT4Q1vptCU
GNK6Gt9SVfcbtWrLiGfcP9ODXmbqZ6AIOIbHKv9cvw1mnyYAtVvT/kck7B/W5jEr
/aP/5RTO7XcqscWO44zBkrtLFupegtpQFB0jXYTJYTrwQoNKRqCUqfetZGzMkXjL
x/h7kFTTIRcVP8RFcOeAMwC6EieaI8z8HN976Gu7xSV8g0VJqoNsBN8jbUuBh5AN
oPyd9nl1KBcIQEC1HsbN8I5wIhTh1sJ2UDqFHAgtlnO59zWHORuFUUt6SXbC9UqJ
okJTzFp9Dh2BqmFPXxBTxAf3j+eJP2XPpDI9Ask6SytEPhgw39fdlOOn2MWfSFoW
TaBJ4ww/r98GzVxCP7Up98xFZuHGDICL3/M7Mk3mRac/lgbNRbtfcBa5NV4fyQhY
184t656Zm/9gdWgGAvYQtApr6/iI+wRMLkIwuw63wqH09yfbDcpTOo6DEQE3B5KR
4H1qSIiVGVVZlWQateR6N32ZmY4dWzpnL2b8CfsdBytzHHFb/c3dPnZB8fxx9mwF
onyvjg9nkIiv7mdcN4Ox2WXrAExTeSftyPajN0WWawNJU3uPTBgNrqNHyWSkiaN4
dAvEepfGuFQGz2Fj03Pv7OqY8veyRezErVRLwiMJRNyy7pi6Wng=
=cKsD
-----END PGP SIGNATURE-----
Merge tag 'iommu-updates-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull IOMMU updates from Joerg Roedel:
- A big cleanup and optimization patch-set for the Tegra GART driver
- Documentation updates and fixes for the IOMMU-API
- Support for page request in Intel VT-d scalable mode
- Intel VT-d dma_[un]map_resource() support
- Updates to the ATS enabling code for PCI (acked by Bjorn) and Intel
VT-d to align with the latest version of the ATS spec
- Relaxed IRQ source checking in the Intel VT-d driver for some aliased
devices, needed for future devices which send IRQ messages from more
than on request-ID
- IRQ remapping driver for Hyper-V
- Patches to make generic IOVA and IO-Page-Table code usable outside of
the IOMMU code
- Various other small fixes and cleanups
* tag 'iommu-updates-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (60 commits)
iommu/vt-d: Get domain ID before clear pasid entry
iommu/vt-d: Fix NULL pointer reference in intel_svm_bind_mm()
iommu/vt-d: Set context field after value initialized
iommu/vt-d: Disable ATS support on untrusted devices
iommu/mediatek: Fix semicolon code style issue
MAINTAINERS: Add Hyper-V IOMMU driver into Hyper-V CORE AND DRIVERS scope
iommu/hyper-v: Add Hyper-V stub IOMMU driver
x86/Hyper-V: Set x2apic destination mode to physical when x2apic is available
PCI/ATS: Add inline to pci_prg_resp_pasid_required()
iommu/vt-d: Check identity map for hot-added devices
iommu: Fix IOMMU debugfs fallout
iommu: Document iommu_ops.is_attach_deferred()
iommu: Document iommu_ops.iotlb_sync_map()
iommu/vt-d: Enable ATS only if the device uses page aligned address.
PCI/ATS: Add pci_ats_page_aligned() interface
iommu/vt-d: Fix PRI/PASID dependency issue.
PCI/ATS: Add pci_prg_resp_pasid_required() interface.
iommu/vt-d: Allow interrupts from the entire bus for aliased devices
iommu/vt-d: Add helper to set an IRTE to verify only the bus number
iommu: Fix flush_tlb_all typo
...
-----BEGIN PGP SIGNATURE-----
iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAlyCpL0UHGJoZWxnYWFz
QGdvb2dsZS5jb20ACgkQWYigwDrT+vzoHw//ZyFbwekF0mV3RZwcV35LkScIOw0d
O1DgjJo8UbuV51+/foQeUZ8IzjHlybQhoFdJupPuw+LyaDUkwqjAmdtY8J/FjWSm
AJeVzu6gMF0Z9kwwGO4NyqX2EWluTD0xNLgf8g+fe3p1MtEuH6VCrqe+hk3wma0K
CrSIKWY/sO408SpAaWiLTEZmVT+hXiP9hJw1qTrbqKLtyWa4oCjErdoyUDsA01+5
gPndKC/3pu6q6q9Dd94582HuQaE2dKHWQXx6Fzd/tdCyYffpbOUAUNP3aRXaTKrS
MwKxOF3y7yUnz5RbxRgopwNVf5WyXhCnnPZRLaSxqnTSZCY6FCUi3l6RpVyWu2Ha
iztBbkTP/x6WV3VWg810qgQKQ9wl8oALMkoOfR6lWCR7MTuJnMXJtbrz0jWpEC2O
ZPwK9fAxFj2/3e13hx88O7Ek8kfajTPM8T15K79pvpljfqa0BD9SrhPyQ5ssmxj4
idz4yIFCATULKszPXA1QbfC1/xCDveQOEPSerL3eACXsLN17vfpOwOT9vWJm6bpr
6u5ggM2dEA07eI1ANnY6twn5g0kSYU9qISNQO98tA86IvaCnME0Z+k+SCwUNIM9U
ep9k0NdAGDNsYOfdVEEY0fYGT9k+9f9w8AfZLNvh0N3s7mGQQ35jf0Z75jj/jsor
cbMcPAN2jOCyFVs=
=vf9L
-----END PGP SIGNATURE-----
Merge tag 'pci-v5.1-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas:
- Use match_string() instead of reimplementing it (Andy Shevchenko)
- Enable SERR# forwarding for all bridges (Bharat Kumar Gogada)
- Use Latency Tolerance Reporting if already enabled by platform (Bjorn
Helgaas)
- Save/restore LTR info for suspend/resume (Bjorn Helgaas)
- Fix DPC use of uninitialized data (Dongdong Liu)
- Probe bridge window attributes only once at enumeration-time to fix
device accesses during rescan (Bjorn Helgaas)
- Return BAR size (not "size -1 ") from pci_size() to simplify code (Du
Changbin)
- Use config header type (not class code) identify bridges more
reliably (Honghui Zhang)
- Work around Intel Denverton incorrect Trace Hub BAR size reporting
(Alexander Shishkin)
- Reorder pciehp cached state/hardware state updates to avoid missed
interrupts (Mika Westerberg)
- Turn ibmphp semaphores into completions or mutexes (Arnd Bergmann)
- Mark expected switch fall-through (Mathieu Malaterre)
- Use of_node_name_eq() for node name comparisons (Rob Herring)
- Add ACS and pciehp quirks for HXT SD4800 (Shunyong Yang)
- Consolidate Rohm Vendor ID definitions (Andy Shevchenko)
- Use u32 (not __u32) for things not exposed to userspace (Logan
Gunthorpe)
- Fix locking semantics of bus and slot reset interfaces (Alex
Williamson)
- Update PCIEPORTBUS Kconfig help text (Hou Zhiqiang)
- Allow portdrv to claim subtractive decode Ports so PCIe services will
work for them (Honghui Zhang)
- Report PCIe links that become degraded at run-time (Alexandru
Gagniuc)
- Blacklist Gigabyte X299 Root Port power management to fix Thunderbolt
hotplug (Mika Westerberg)
- Revert runtime PM suspend/resume callbacks that broke PME on network
cable plug (Mika Westerberg)
- Disable Data Link State Changed interrupts to prevent wakeup
immediately after suspend (Mika Westerberg)
- Extend altera to support Stratix 10 (Ley Foon Tan)
- Allow building altera driver on ARM64 (Ley Foon Tan)
- Replace Douglas with Tom Joseph as Cadence PCI host/endpoint
maintainer (Lorenzo Pieralisi)
- Add DT support for R-Car RZ/G2E (R8A774C0) (Fabrizio Castro)
- Add dra72x/dra74x/dra76x SoC compatible strings (Kishon Vijay Abraham I)
- Enable x2 mode support for dra72x/dra74x/dra76x SoC (Kishon Vijay
Abraham I)
- Configure dra7xx PHY to PCIe mode (Kishon Vijay Abraham I)
- Simplify dwc (remove unnecessary header includes, name variables
consistently, reduce inverted logic, etc) (Gustavo Pimentel)
- Add i.MX8MQ support (Andrey Smirnov)
- Add message to help debug dwc MSI-X mask bit errors (Gustavo
Pimentel)
- Work around imx7d PCIe PLL erratum (Trent Piepho)
- Don't assert qcom reset GPIO during probe (Bjorn Andersson)
- Skip dwc MSI init if MSIs have been disabled (Lucas Stach)
- Use memcpy_fromio()/memcpy_toio() instead of plain memcpy() in PCI
endpoint framework (Wen Yang)
- Add interface to discover supported endpoint features to replace a
bitfield that wasn't flexible enough (Kishon Vijay Abraham I)
- Implement the new supported-feature interface for designware-plat,
dra7xx, rockchip, cadence (Kishon Vijay Abraham I)
- Fix issues with 64-bit BAR in endpoints (Kishon Vijay Abraham I)
- Add layerscape endpoint mode support (Xiaowei Bao)
- Remove duplicate struct hv_vp_set in favor of struct hv_vpset (Maya
Nakamura)
- Rework hv_irq_unmask() to use cpumask_to_vpset() instead of
open-coded reimplementation (Maya Nakamura)
- Align Hyper-V struct retarget_msi_interrupt arguments (Maya Nakamura)
- Fix mediatek MMIO size computation to enable full size of available
MMIO space (Honghui Zhang)
- Fix mediatek DMA window size computation to allow endpoint DMA access
to full DRAM address range (Honghui Zhang)
- Fix mvebu prefetchable BAR regression caused by common bridge
emulation that assumed all bridges had prefetchable windows (Thomas
Petazzoni)
- Make advk_pci_bridge_emul_ops static (Wei Yongjun)
- Configure MPS settings for VMD root ports (Jon Derrick)
* tag 'pci-v5.1-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (92 commits)
PCI: Update PCIEPORTBUS Kconfig help text
PCI: Fix "try" semantics of bus and slot reset
PCI/LINK: Report degraded links via link bandwidth notification
dt-bindings: PCI: altera: Add altr,pcie-root-port-2.0
PCI: altera: Enable driver on ARM64
PCI: altera: Add Stratix 10 PCIe support
PCI/PME: Fix possible use-after-free on remove
PCI: aardvark: Make symbol 'advk_pci_bridge_emul_ops' static
PCI: dwc: skip MSI init if MSIs have been explicitly disabled
PCI: hv: Refactor hv_irq_unmask() to use cpumask_to_vpset()
PCI: hv: Replace hv_vp_set with hv_vpset
PCI: hv: Add __aligned(8) to struct retarget_msi_interrupt
PCI: mediatek: Enlarge PCIe2AHB window size to support 4GB DRAM
PCI: mediatek: Fix memory mapped IO range size computation
PCI: dwc: Remove superfluous shifting in definitions
PCI: dwc: Make use of GENMASK/FIELD_PREP
PCI: dwc: Make use of BIT() in constant definitions
PCI: dwc: Share code for dw_pcie_rd/wr_other_conf()
PCI: dwc: Make use of IS_ALIGNED()
PCI: imx6: Add code to request/control "pcie_aux" clock for i.MX8MQ
...
Synopsys GMAC 4.10 is used. And Phy mode for eval and disco is RMII
with PHY SMSC LAN8742
Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Core changes:
- The big change this time around is the irqchip handling in
the qualcomm pin controllers, closely coupled with the
gpiochip. This rework, in a classic fall-between-the-chairs
fashion has been sidestepped for too long. The Qualcomm
IRQchips using the SPMI and SSBI transport mechanisms have
been rewritten to use hierarchical irqchip. This creates
the base from which I intend to gradually pull support for
hierarchical irqchips into the gpiolib irqchip helpers to
cut down on duplicate code. We have too many hacks in the
kernel because people have been working around the missing
hierarchical irqchip for years, and once it was there,
noone understood it for a while. We are now slowly adapting
to using it. This is why this pull requests include changes
to MFD, SPMI, IRQchip core and some ARM Device Trees
pertaining to the Qualcomm chip family. Since Qualcomm have
so many chips and such large deployments it is paramount
that this platform gets this right, and now it (hopefully)
does.
- Core support for pull-up and pull-down configuration, also
from the device tree. When a simple GPIO chip support a
"off or on" pull-up or pull-down resistor, we provide a
way to set this up using machine descriptors or device tree.
If more elaborate control of pull up/down (such as
resistance shunt setting) is required, drivers should be
phased over to use pin control. We do not yet provide a
userspace ABI for this pull up-down setting but I suspect
the makers are going to ask for it soon enough. PCA953x
is the first user of this new API.
- The GPIO mockup driver has been revamped after some
discussion improving the IRQ simulator in the process.
The idea is to make it possible to use the mockup for
both testing and virtual prototyping, e.g. when you do
not yet have a GPIO expander to play with but really
want to get something to develop code around before
hardware is available. It's neat. The blackbox testing
usecase is currently making its way into kernelci.
- ACPI GPIO core preserves non direction flags when updating
flags.
- A new device core helper for devm_platform_ioremap_resource()
is funneled through the GPIO tree with Greg's ACK.
New drivers:
- TQ-Systems QTMX86 GPIO controllers (using port-mapped
I/O)
- Gateworks PLD GPIO driver (vaccumed up from OpenWrt)
- AMD G-Series PCH (Platform Controller Hub) GPIO driver.
- Fintek F81804 & F81966 subvariants.
- PCA953x now supports NXP PCAL6416.
Driver improvements:
- IRQ support on the Nintendo Wii (Hollywood) GPIO.
- get_direction() support for the MVEBU driver.
- Set the right output level on SAMA5D2.
- Drop the unused irq trigger setting on the Spreadtrum
driver.
- Wakeup support for PCA953x.
- A slew of cleanups in the various Intel drivers.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJcgoLEAAoJEEEQszewGV1zjBAP/3OmTFGv49PFmJwSx+PlLiYf
V6/UPaQzq81CGSMtHxbS51TyP9Id7PCfsacbuFYutzn0D1efvl7jrkb8qJ6fVvCM
bl/i6q8ipRTPzAf1hD3QCgCe3BXCA064/OcPrz987oIvI3bJQXsmBjBSXHWr4Cwa
WfB5DX/afn9TK3XHhMQGfw5f0d+TtnKAs90RTTVKiz9Ow8eFYZJOhgPkvhCR3Gi9
YJIzIAiwhHZ7/zauo4JAYFU/O/Z3YEC5zeLne2ItebzNooRkSxdz0c9Hs7HlCZmU
930Uv9jNN89N3vPqpZzAHtPvwDOmAILMWvKy9xRSp+eoIukarRJgF7ALPk7QWxK1
yy+tGj4dXBQ6tI8W3wUN1WgjNpii3K1HbJ+1LQVQL2/q9o+3YXXqmjdjuw7C8YYV
5ystNrUppkgfIIciHL4lhqw3wKJJhVEAns2V245hIitoShT+RvIg8GQbGZmWlQFd
YsHbynqHL9iwfRNv26kEqZXZOo/4D1t6Scw+OPVyba2Wyttf+qbmg+XaYMqFaxYW
mfydvdtymeCOUIPJMzw58KGPUTXJ4UPLENyayXNUHokr1a8VO8OIthY7zwi0CpvJ
IcsAY9zoGxvfbRV922mlIsw3oOBcM2IN2lC9sY469ZVnjBrdC3rsQpIBZr+Vzz8i
YlUfXLSGSyuUZUz//2eG
=VoVC
-----END PGP SIGNATURE-----
Merge tag 'gpio-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for the v5.1 cycle:
Core changes:
- The big change this time around is the irqchip handling in the
qualcomm pin controllers, closely coupled with the gpiochip. This
rework, in a classic fall-between-the-chairs fashion has been
sidestepped for too long.
The Qualcomm IRQchips using the SPMI and SSBI transport mechanisms
have been rewritten to use hierarchical irqchip. This creates the
base from which I intend to gradually pull support for hierarchical
irqchips into the gpiolib irqchip helpers to cut down on duplicate
code.
We have too many hacks in the kernel because people have been
working around the missing hierarchical irqchip for years, and once
it was there, noone understood it for a while. We are now slowly
adapting to using it.
This is why this pull requests include changes to MFD, SPMI,
IRQchip core and some ARM Device Trees pertaining to the Qualcomm
chip family. Since Qualcomm have so many chips and such large
deployments it is paramount that this platform gets this right, and
now it (hopefully) does.
- Core support for pull-up and pull-down configuration, also from the
device tree. When a simple GPIO chip supports an "off or on" pull-up
or pull-down resistor, we provide a way to set this up using
machine descriptors or device tree.
If more elaborate control of pull up/down (such as resistance shunt
setting) is required, drivers should be phased over to use pin
control. We do not yet provide a userspace ABI for this pull
up-down setting but I suspect the makers are going to ask for it
soon enough. PCA953x is the first user of this new API.
- The GPIO mockup driver has been revamped after some discussion
improving the IRQ simulator in the process.
The idea is to make it possible to use the mockup for both testing
and virtual prototyping, e.g. when you do not yet have a GPIO
expander to play with but really want to get something to develop
code around before hardware is available. It's neat. The blackbox
testing usecase is currently making its way into kernelci.
- ACPI GPIO core preserves non direction flags when updating flags.
- A new device core helper for devm_platform_ioremap_resource() is
funneled through the GPIO tree with Greg's ACK.
New drivers:
- TQ-Systems QTMX86 GPIO controllers (using port-mapped I/O)
- Gateworks PLD GPIO driver (vaccumed up from OpenWrt)
- AMD G-Series PCH (Platform Controller Hub) GPIO driver.
- Fintek F81804 & F81966 subvariants.
- PCA953x now supports NXP PCAL6416.
Driver improvements:
- IRQ support on the Nintendo Wii (Hollywood) GPIO.
- get_direction() support for the MVEBU driver.
- Set the right output level on SAMA5D2.
- Drop the unused irq trigger setting on the Spreadtrum driver.
- Wakeup support for PCA953x.
- A slew of cleanups in the various Intel drivers"
* tag 'gpio-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (110 commits)
gpio: gpio-omap: fix level interrupt idling
gpio: amd-fch: Set proper output level for direction_output
x86: apuv2: remove unused variable
gpio: pca953x: Use PCA_LATCH_INT
platform/x86: fix PCENGINES_APU2 Kconfig warning
gpio: pca953x: Fix dereference of irq data in shutdown
gpio: amd-fch: Fix type error found by sparse
gpio: amd-fch: Drop const from resource
gpio: mxc: add check to return defer probe if clock tree NOT ready
gpio: ftgpio: Register per-instance irqchip
gpio: ixp4xx: Add DT bindings
x86: pcengines apuv2 gpio/leds/keys platform driver
gpio: AMD G-Series PCH gpio driver
drivers: depend on HAS_IOMEM for devm_platform_ioremap_resource()
gpio: tqmx86: Set proper output level for direction_output
gpio: sprd: Change to use SoC compatible string
gpio: sprd: Use SoC compatible string instead of wildcard string
gpio: of: Handle both enable-gpio{,s}
gpio: of: Restrict enable-gpio quirk to regulator-gpio
gpio: davinci: use devm_platform_ioremap_resource()
...
* New i10nm EDAC driver for Intel 10nm CPUs (Qiuxu Zhuo and Tony Luck)
* Altera SDRAM functionality carveout for separate enablement of RAS and
SDRAM capabilities on some Altera chips. (Thor Thayer)
* The usual round of cleanups and fixes
Last but not least:
* Recruit James Morse as a reviewer for the ARM side
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAlx+SqYACgkQEsHwGGHe
VUpwxg//fDdlIcnNjPUKWcBQxfy7meFd5xlDwbbIbkdE1mfHLBP6n2gRVM9NguSm
shYPXcdqIrFTn4D7nOxVLS2Gqa7cF/j9M+YaqTNfe9/OVI0oSeM84D2+kEUi2tHQ
LkCbBL9W+SAk4wjcFUPrEuwPaABfPdt0g9wuEf3Yg+PQsZ4FojwF7p91plBiKo/X
GewLIM4+QT/mIkyn5u+2UJWayUvtdc1nchBGg3klYaDTRsUqH9pn284bInj7/Woj
r34288yXuksIhDnUd2h4F9RCdZegBLIZf/k7Rqdg+Acot64c3PprE+/SI9nFcYfn
fcF/48Sv6vMfP5kDKeJhsDjWu85VdpP+Cp4bxebXx4NURWn30kyYGDdpvbpgWxzc
XDOXiEDxfh43/dNEyqCRr86dcZS8ro1pQNlnQvxOJyMljdEGjbB4JizG2ZvVluBP
hSu3ifgpTiBGJMRQQijha41SMuWE7Z1ZgZt/XnyPAKwEEFtQVrm7IfnDohag3VYw
6kWMVeyenmx/yF1JmA0fTxAdeeZPMnbUx0JxHRo1wJXF+1b19b0P+1nYUjgKlXQN
Wq78DGPkQ9InfISFegS/A2AMWk+ZgLZ5d4pVwRVWdyeOMQVUoXO4R3KQur1tV7gu
vm5BpWRZUszhcVvuhly8fOTyOsudYsNe7EeMd2V0Q2FZBy81MH8=
=A1kA
-----END PGP SIGNATURE-----
Merge tag 'edac_for_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
Pull EDAC updates from Borislav Petkov:
- A new EDAC AST 2500 SoC driver (Stefan M Schaeckeler)
- New i10nm EDAC driver for Intel 10nm CPUs (Qiuxu Zhuo and Tony Luck)
- Altera SDRAM functionality carveout for separate enablement of RAS
and SDRAM capabilities on some Altera chips. (Thor Thayer)
- The usual round of cleanups and fixes
And last but not least: recruit James Morse as a reviewer for the ARM
side.
* tag 'edac_for_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
EDAC/altera: Add separate SDRAM EDAC config
EDAC, altera: Add missing of_node_put()
EDAC, skx_common: Add code to recognise new compound error code
EDAC, i10nm: Fix randconfig builds
EDAC, i10nm: Add a driver for Intel 10nm server processors
EDAC, skx_edac: Delete duplicated code
EDAC, skx_common: Separate common code out from skx_edac
EDAC: Do not check return value of debugfs_create() functions
EDAC: Add James Morse as a reviewer
dt-bindings, EDAC: Add Aspeed AST2500
EDAC, aspeed: Add an Aspeed AST2500 EDAC driver
Two new SoC families are added this time.
Sugaya Taichi submitted support for the Milbeaut SoC family from
Socionext and explains:
"SC2000 is a SoC of the Milbeaut series. equipped with a DSP optimized for
computer vision. It also features advanced functionalities such as 360-degree,
real-time spherical stitching with multi cameras, image stabilization for
without mechanical gimbals, and rolling shutter correction. More detail is
below:
https://www.socionext.com/en/products/assp/milbeaut/SC2000.html"
Interestingly, this one has a history dating back to older chips
made by Socionext and previously Matsushita/Panasonic based on their
own mn10300 CPU architecture that was removed from the kernel last year.
Manivannan Sadhasivam adds support for another SoC family, this is the
Bitmain BM1880 chip used in the Sophon Edge TPU developer board.
The chip is intended for Deep Learning applications, and comes
with dual-core Arm Cortex-A53 to run Linux as well as a RISC-V
microcontroller core to control the tensor unit.
For the moment, the TPU is not accessible in mainline Linux, so
we treat it as a generic Arm SoC.
More information is available at https://www.sophon.ai/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJcf9USAAoJEGCrR//JCVIn8M8P/1+wpy+9PZynYOqIZvTAR0Pr
wqZD20FIjzbEMBpbSMWpOSxg+KbSuf+K1s+1lF6hAGry5UW8CVgZ7DMQ2DyBZfzN
NEcJ1MfchN1AblpD4L76C7PzLR4ZbmNHmXaGX5KQ3ItXFX50TI+PBNdlRMho1y2P
NGD8SLD1K+erfGyx6CHY+Wf6el25I7tP739HZGvZfMR1SDSKp73fwbjmBBg8vg7/
2kIwjU7msgtIh4xAgNnZ7+uNUovi04ibDpQnOMta4Urdc9WBJPVQrTmrNJU0loJr
bffhrrK4adZgp40gtjajCqPR6F96shyZ2G7nYxe53FGE4whSsMCZuGb5aXJ9OtZq
ez0w3Vy16+2uLLA55xVGgcsOv/4pwXnxuVnfw4D5lonU8Q5bbh5pBTVnvV6lFOea
IOLaEcfwBCLKMAkZ//eHn9PIGg3RBko4MZniJwb+WLbHXWR+MriQ4+Pb+cvugOAo
ky4I9iU/XAmUfJxVC1ShHZrzgz2kEoZXCsX0yqXR1eG4o1Ztbftrs4UOyvTxeqxl
lvLXg3b0SDA5QBwQHUxL0G9HTqm4LdMs3lg98kI05gWofz6Bmk1aEi7U4uguhGKf
KafuUZ6snVF5KGJAI745Q4IkLKelxjBymLEi+FVKk6y0KAejQXuSMpgXwC1SnIN3
M69uqcDP+ICqCgDbwWCx
=HQS8
-----END PGP SIGNATURE-----
Merge tag 'armsoc-newsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM new SoC family support from Arnd Bergmann:
"Two new SoC families are added this time.
Sugaya Taichi submitted support for the Milbeaut SoC family from
Socionext and explains:
"SC2000 is a SoC of the Milbeaut series. equipped with a DSP
optimized for computer vision. It also features advanced
functionalities such as 360-degree, real-time spherical stitching
with multi cameras, image stabilization for without mechanical
gimbals, and rolling shutter correction. More detail is below:
https://www.socionext.com/en/products/assp/milbeaut/SC2000.html"
Interestingly, this one has a history dating back to older chips made
by Socionext and previously Matsushita/Panasonic based on their own
mn10300 CPU architecture that was removed from the kernel last year.
Manivannan Sadhasivam adds support for another SoC family, this is the
Bitmain BM1880 chip used in the Sophon Edge TPU developer board.
The chip is intended for Deep Learning applications, and comes with
dual-core Arm Cortex-A53 to run Linux as well as a RISC-V
microcontroller core to control the tensor unit. For the moment, the
TPU is not accessible in mainline Linux, so we treat it as a generic
Arm SoC.
More information is available at
https://www.sophon.ai/"
* tag 'armsoc-newsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: multi_v7_defconfig: add ARCH_MILBEAUT and ARCH_MILBEAUT_M10V
ARM: configs: Add Milbeaut M10V defconfig
ARM: dts: milbeaut: Add device tree set for the Milbeaut M10V board
clocksource/drivers/timer-milbeaut: Introduce timer for Milbeaut SoCs
dt-bindings: timer: Add Milbeaut M10V timer description
ARM: milbeaut: Add basic support for Milbeaut m10v SoC
dt-bindings: Add documentation for Milbeaut SoCs
dt-bindings: arm: Add SMP enable-method for Milbeaut
dt-bindings: sram: milbeaut: Add binding for Milbeaut smp-sram
MAINTAINERS: Add entry for Bitmain SoC platform
arm64: dts: bitmain: Add Sophon Egde board support
arm64: dts: bitmain: Add BM1880 SoC support
arm64: Add ARCH_BITMAIN platform
dt-bindings: arm: Document Bitmain BM1880 SoC
As usual, the drivers/tee and drivers/reset subsystems get merged
here, with the expected set of smaller updates and some new hardware
support. The tee subsystem now supports device drivers to be attached
to a tee, the first example here is a random number driver with its
implementation in the secure world.
Three new power domain drivers get added for specific chip families:
- Broadcom BCM283x chips (used in Raspberry Pi)
- Qualcomm Snapdragon phone chips
- Xilinx ZynqMP FPGA SoCs
One new driver is added to talk to the BPMP firmware on NVIDIA
Tegra210
Existing drivers are extended for new SoC variants from NXP,
NVIDIA, Amlogic and Qualcomm.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJcfpKpAAoJEGCrR//JCVInMpYQANwKKWOTm5NHqtf7/ZKBzx6/
Yk7Jj8QLGKrHScnuBZSBvTwv5Cc5O5Ye+tAuGVArOoD2ktXlLZmHZ/ZPFAudT3di
aFYbA44RNhv+O/xOmToDCCjSHm176hwUY0Cs5bFnfx6TcMsdOYIQIG+XQKx/a9zg
3ZBEv7wZqcBArLc0X2Z2/uiVrEIh3wWwXytvw+8TG8ifUfpbDxRUxDlj1JRDpjMu
yX4q8JDhdQvi2FTXbXcEHTdQ6RT11svPM/YxQDxfULRK9aNKf4GZJ4QlwZy+SO7N
cEFxDd4ML/iJ1LjalvtXGkR0xrw9/gOlO3vbB9Uw3EngBDUSQfHmqJet10a14l8q
KcToe3teIB+Z1R+plrt+h5UDJTbVibgZXhU6wIdkDgtF6oTyg1moIbTqNKHgcA3b
HLJv4gFejeluQzJ/3dZHBnkvJo1XFAvGFmFXle0bmJRFtDx73CKnf6MA9N82l2/x
nTn4LTxXIJVKWTWAs1qkrFyIx1gOrpGhiHPQ2JiOPMZLstz3Sr6tiJuWOr+1Ex4/
UlZsD/CrRb+SbPBonpkD+bvzSR+j0M72A7hGmfZcDzainciWgunyXglUlzO/MT24
C6p4R9MZ2Fffoe8pESppabRNUItp8gNsNGI7CY1IK8pgpxLrujw8OnqykpV0VETo
As+6dZrHfPNSuI7udJi5
=+DOl
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"As usual, the drivers/tee and drivers/reset subsystems get merged
here, with the expected set of smaller updates and some new hardware
support. The tee subsystem now supports device drivers to be attached
to a tee, the first example here is a random number driver with its
implementation in the secure world.
Three new power domain drivers get added for specific chip families:
- Broadcom BCM283x chips (used in Raspberry Pi)
- Qualcomm Snapdragon phone chips
- Xilinx ZynqMP FPGA SoCs
One new driver is added to talk to the BPMP firmware on NVIDIA
Tegra210
Existing drivers are extended for new SoC variants from NXP, NVIDIA,
Amlogic and Qualcomm"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (113 commits)
tee: optee: update optee_msg.h and optee_smc.h to dual license
tee: add cancellation support to client interface
dpaa2-eth: configure the cache stashing amount on a queue
soc: fsl: dpio: configure cache stashing destination
soc: fsl: dpio: enable frame data cache stashing per software portal
soc: fsl: guts: make fsl_guts_get_svr() static
hwrng: make symbol 'optee_rng_id_table' static
tee: optee: Fix unsigned comparison with less than zero
hwrng: Fix unsigned comparison with less than zero
tee: fix possible error pointer ctx dereferencing
hwrng: optee: Initialize some structs using memset instead of braces
tee: optee: Initialize some structs using memset instead of braces
soc: fsl: dpio: fix memory leak of a struct qbman on error exit path
clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' static
soc: qcom: llcc-slice: Fix typos
qcom: soc: llcc-slice: Consolidate some code
qcom: soc: llcc-slice: Clear the global drv_data pointer on error
drivers: soc: xilinx: Add ZynqMP power domain driver
firmware: xilinx: Add APIs to control node status/power
dt-bindings: power: Add ZynqMP power domain bindings
...
This is a smaller update than the past few times, but with just over
500 non-merge changesets still dwarfes the rest of the SoC tree.
Three new SoC platforms get added, each one a follow-up to an existing
product, and added here in combination with a reference platform:
- Renesas RZ/A2M (R7S9210) 32-bit Cortex-A9 Real-time imaging processor
https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rza/rza2m.html
- Renesas RZ/G2E (r8a774c0) 64-bit Cortex-A53 SoC "for
Rich Graphics Applications".
https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rzg/rzg2e.html
- NXP i.MX8QuadXPlus 64-bit Cortex-A35 SoC
https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-applications-processors/i.mx-8-processors/i.mx-8x-family-arm-cortex-a35-3d-graphics-4k-video-dsp-error-correcting-code-on-ddr:i.MX8X
These are actual commercial products we now support with an in-kernel
device tree source file:
- Bosch Guardian is a product made by Bosch Power
Tools GmbH, based on the Texas Instruments AM335x chip
- Winterland IceBoard is a Texas Instruments AM3874 based
machine used in telescopes at the south pole and elsewhere, see commit
d031773169 for some pointers:
- Inspur on5263m5 is an x86 server platform with an Aspeed
ast2500 baseboard management controller. This is for running on
the BMC.
- Zodiac Digital Tapping Unit, apparently a kind of ethernet
switch used in airplanes.
- Phicomm K3 is a WiFi router based on Broadcom bcm47094
- Methode Electronics uDPU FTTdp distribution point unit
- X96 Max, a generic TV box based on Amlogic G12a (S905X2)
- NVIDIA Shield TV (Darcy) based on Tegra210
And then there are several new SBC, evaluation, development or modular
systems that we add:
- Three new Rockchips rk3399 based boards:
- FriendlyElec NanoPC-T4 and NanoPi M4
- Radxa ROCK Pi 4
- Five new i.MX6 family SoM modules and boards for industrial
products:
- Logic PD i.MX6QD SoM and evaluation baseboad
- Y Soft IOTA Draco/Hydra/Ursa family boards based on i.MX6DL
- Phytec phyCORE i.MX6 UltraLite SoM and evaluation module
- MYIR Tech MYD-LPC4357 development based on the NXP lpc4357
microcontroller
- Chameleon96, an Intel/Altera Cyclone5 based FPGA development
system in 96boards form factor
- Arm Fixed Virtual Platforms(FVP) Base RevC, a purely
virtual platform for corresponding to the latest "fast model"
- Another Raspberry Pi variant: Model 3 A+, supported both
in 32-bit and 64-bit mode.
- Oxalis Evalkit V100 based on NXP Layerscape LS1012a,
in 96Boards enterprise form factor
- Elgin RV1108 R1 development board based on 32-bit Rockchips RV1108
For already supported boards and SoCs, we often add support for new
devices after merging the drivers. This time, the largest changes include
updates for
- STMicroelectronics stm32mp1, which was now formally
launched last week
- Qualcomm Snapdragon 845, a high-end phone and low-end laptop chip
- Action Semi S700
- TI AM654x, their recently merged 64-bit SoC from the OMAP family
- Various Amlogic Meson SoCs
- Mediatek MT2712
- NVIDIA Tegra186 and Tegra210
- The ancient NXP lpc32xx family
- Samsung s5pv210, used in some older mobile phones
Many other chips see smaller updates and bugfixes beyond that.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJcf9c1AAoJEGCrR//JCVInvl8QAIgmK09QZr3VAD5WnKSoWwiX
GP1+qgmr/cbIF9X+Kt/0Y2E+oIi9uxu7v5iwpYf0inzV4QOKwy9LvpeInd7s07bf
hSPMN0wZ9bV5Ylk0YtlvGvOQTqys9oweeSEkHfjQ8Jm7aFkaRXQ1dt23d8KLILoB
8GKk9A4ncn1AB1vu6xBqeqBiaQiqhMjb9paWkmjYrjhP22hHlVyGlMd8cwfG+A5a
5Ft4lWkzvgrXPMwZgrCGU233OV5UHrn2A8ohiIUN5J6aSWxu8eMEryU+MF0poidl
malJ+AHl2mK83YN3wYemxy/lEJzAW4PrjCVgY2bRDqwlOnI3+d+z7rVSfuMCzSKs
TDTbv9VqPJhsZFr/GIkvB3iwnYfvP/mXrzM7gbw7rQqthEKOy+3HtZwmHAKF4QNK
TT4wyngC/CwiyULEwtPCjbxZ/7yal6sygllioCo+M2OHeattIQEnqi/Yvc0vx/th
th9Pepf26jUp/ZJNlxk0XDyBMPhUf6sHUvh7a+y6l6ZxZ6avbFdGPeJrQe5HF2Sp
KM7BH3w/CpoNRSKs37mR7JpNdYNDSonItgaIm5xVJZk+Wr/BWgtcr6BbGD/vlT7N
kIDDinyhczhvhpTmWs6QZdZNQmf6bASzTVeFv2+ES+kXt/AKhv0O5N4Pw/oU+VBv
pD5+7YjjA0fMKcYae3gs
=1goV
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC device tree updates from Arnd Bergmann:
"This is a smaller update than the past few times, but with just over
500 non-merge changesets still dwarfes the rest of the SoC tree.
Three new SoC platforms get added, each one a follow-up to an existing
product, and added here in combination with a reference platform:
- Renesas RZ/A2M (R7S9210) 32-bit Cortex-A9 Real-time imaging
processor:
https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rza/rza2m.html
- Renesas RZ/G2E (r8a774c0) 64-bit Cortex-A53 SoC "for Rich Graphics
Applications":
https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rzg/rzg2e.html
- NXP i.MX8QuadXPlus 64-bit Cortex-A35 SoC:
https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-applications-processors/i.mx-8-processors/i.mx-8x-family-arm-cortex-a35-3d-graphics-4k-video-dsp-error-correcting-code-on-ddr:i.MX8X
These are actual commercial products we now support with an in-kernel
device tree source file:
- Bosch Guardian is a product made by Bosch Power Tools GmbH, based
on the Texas Instruments AM335x chip
- Winterland IceBoard is a Texas Instruments AM3874 based machine
used in telescopes at the south pole and elsewhere, see commit
d031773169 for some pointers:
- Inspur on5263m5 is an x86 server platform with an Aspeed ast2500
baseboard management controller. This is for running on the BMC.
- Zodiac Digital Tapping Unit, apparently a kind of ethernet switch
used in airplanes.
- Phicomm K3 is a WiFi router based on Broadcom bcm47094
- Methode Electronics uDPU FTTdp distribution point unit
- X96 Max, a generic TV box based on Amlogic G12a (S905X2)
- NVIDIA Shield TV (Darcy) based on Tegra210
And then there are several new SBC, evaluation, development or modular
systems that we add:
- Three new Rockchips rk3399 based boards:
- FriendlyElec NanoPC-T4 and NanoPi M4
- Radxa ROCK Pi 4
- Five new i.MX6 family SoM modules and boards for industrial
products:
- Logic PD i.MX6QD SoM and evaluation baseboad
- Y Soft IOTA Draco/Hydra/Ursa family boards based on i.MX6DL
- Phytec phyCORE i.MX6 UltraLite SoM and evaluation module
- MYIR Tech MYD-LPC4357 development based on the NXP lpc4357
microcontroller
- Chameleon96, an Intel/Altera Cyclone5 based FPGA development system
in 96boards form factor
- Arm Fixed Virtual Platforms(FVP) Base RevC, a purely virtual
platform for corresponding to the latest "fast model"
- Another Raspberry Pi variant: Model 3 A+, supported both in 32-bit
and 64-bit mode.
- Oxalis Evalkit V100 based on NXP Layerscape LS1012a, in 96Boards
enterprise form factor
- Elgin RV1108 R1 development board based on 32-bit Rockchips RV1108
For already supported boards and SoCs, we often add support for new
devices after merging the drivers. This time, the largest changes
include updates for
- STMicroelectronics stm32mp1, which was now formally launched last
week
- Qualcomm Snapdragon 845, a high-end phone and low-end laptop chip
- Action Semi S700
- TI AM654x, their recently merged 64-bit SoC from the OMAP family
- Various Amlogic Meson SoCs
- Mediatek MT2712
- NVIDIA Tegra186 and Tegra210
- The ancient NXP lpc32xx family
- Samsung s5pv210, used in some older mobile phones
Many other chips see smaller updates and bugfixes beyond that"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (506 commits)
ARM: dts: exynos: Fix max voltage for buck8 regulator on Odroid XU3/XU4
dt-bindings: net: ti: deprecate cpsw-phy-sel bindings
ARM: dts: am335x: switch to use phy-gmii-sel
ARM: dts: am4372: switch to use phy-gmii-sel
ARM: dts: dm814x: switch to use phy-gmii-sel
ARM: dts: dra7: switch to use phy-gmii-sel
arch: arm: dts: kirkwood-rd88f6281: Remove disabled marvell,dsa reference
ARM: dts: exynos: Add support for secondary DAI to Odroid XU4
ARM: dts: exynos: Add support for secondary DAI to Odroid XU3
ARM: dts: exynos: Disable ARM PMU on Odroid XU3-lite
ARM: dts: exynos: Add stdout path property to Arndale board
ARM: dts: exynos: Add minimal clkout parameters to Exynos3250 PMU
ARM: dts: exynos: Enable ADC on Odroid HC1
arm64: dts: sprd: Remove wildcard compatible string
arm64: dts: sprd: Add SC27XX fuel gauge device
arm64: dts: sprd: Add SC2731 charger device
arm64: dts: sprd: Add ADC calibration support
arm64: dts: sprd: Remove PMIC INTC irq trigger type
arm64: dts: rockchip: Enable tsadc device on rock960
ARM: dts: rockchip: add chosen node on veyron devices
...
Pull networking updates from David Miller:
"Here we go, another merge window full of networking and #ebpf changes:
1) Snoop DHCPACKS in batman-adv to learn MAC/IP pairs in the DHCP
range without dealing with floods of ARP traffic, from Linus
Lüssing.
2) Throttle buffered multicast packet transmission in mt76, from
Felix Fietkau.
3) Support adaptive interrupt moderation in ice, from Brett Creeley.
4) A lot of struct_size conversions, from Gustavo A. R. Silva.
5) Add peek/push/pop commands to bpftool, as well as bash completion,
from Stanislav Fomichev.
6) Optimize sk_msg_clone(), from Vakul Garg.
7) Add SO_BINDTOIFINDEX, from David Herrmann.
8) Be more conservative with local resends due to local congestion,
from Yuchung Cheng.
9) Allow vetoing of unsupported VXLAN FDBs, from Petr Machata.
10) Add health buffer support to devlink, from Eran Ben Elisha.
11) Add TXQ scheduling API to mac80211, from Toke Høiland-Jørgensen.
12) Add statistics to basic packet scheduler filter, from Cong Wang.
13) Add GRE tunnel support for mlxsw Spectrum-2, from Nir Dotan.
14) Lots of new IP tunneling forwarding tests, also from Nir Dotan.
15) Add 3ad stats to bonding, from Nikolay Aleksandrov.
16) Lots of probing improvements for bpftool, from Quentin Monnet.
17) Various nfp drive #ebpf JIT improvements from Jakub Kicinski.
18) Allow #ebpf programs to access gso_segs from skb shared info, from
Eric Dumazet.
19) Add sock_diag support for AF_XDP sockets, from Björn Töpel.
20) Support 22260 iwlwifi devices, from Luca Coelho.
21) Use rbtree for ipv6 defragmentation, from Peter Oskolkov.
22) Add JMP32 instruction class support to #ebpf, from Jiong Wang.
23) Add spinlock support to #ebpf, from Alexei Starovoitov.
24) Support 256-bit keys and TLS 1.3 in ktls, from Dave Watson.
25) Add device infomation API to devlink, from Jakub Kicinski.
26) Add new timestamping socket options which are y2038 safe, from
Deepa Dinamani.
27) Add RX checksum offloading for various sh_eth chips, from Sergei
Shtylyov.
28) Flow offload infrastructure, from Pablo Neira Ayuso.
29) Numerous cleanups, improvements, and bug fixes to the PHY layer
and many drivers from Heiner Kallweit.
30) Lots of changes to try and make packet scheduler classifiers run
lockless as much as possible, from Vlad Buslov.
31) Support BCM957504 chip in bnxt_en driver, from Erik Burrows.
32) Add concurrency tests to tc-tests infrastructure, from Vlad
Buslov.
33) Add hwmon support to aquantia, from Heiner Kallweit.
34) Allow 64-bit values for SO_MAX_PACING_RATE, from Eric Dumazet.
And I would be remiss if I didn't thank the various major networking
subsystem maintainers for integrating much of this work before I even
saw it. Alexei Starovoitov, Daniel Borkmann, Pablo Neira Ayuso,
Johannes Berg, Kalle Valo, and many others. Thank you!"
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (2207 commits)
net/sched: avoid unused-label warning
net: ignore sysctl_devconf_inherit_init_net without SYSCTL
phy: mdio-mux: fix Kconfig dependencies
net: phy: use phy_modify_mmd_changed in genphy_c45_an_config_aneg
net: dsa: mv88e6xxx: add call to mv88e6xxx_ports_cmode_init to probe for new DSA framework
selftest/net: Remove duplicate header
sky2: Disable MSI on Dell Inspiron 1545 and Gateway P-79
net/mlx5e: Update tx reporter status in case channels were successfully opened
devlink: Add support for direct reporter health state update
devlink: Update reporter state to error even if recover aborted
sctp: call iov_iter_revert() after sending ABORT
team: Free BPF filter when unregistering netdev
ip6mr: Do not call __IP6_INC_STATS() from preemptible context
isdn: mISDN: Fix potential NULL pointer dereference of kzalloc
net: dsa: mv88e6xxx: support in-band signalling on SGMII ports with external PHYs
cxgb4/chtls: Prefix adapter flags with CXGB4
net-sysfs: Switch to bitmap_zalloc()
mellanox: Switch to bitmap_zalloc()
bpf: add test cases for non-pointer sanitiation logic
mlxsw: i2c: Extend initialization by querying resources data
...
Raspberry pi board model B revison 2 have the hot plug detector gpio
active high (and not low as it was in the dts).
Signed-off-by: Helen Koike <helen.koike@collabora.com>
Fixes: 49ac67e0c3 ("ARM: bcm2835: Add VC4 to the device tree.")
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Anholt <eric@anholt.net>
Sugaya Taichi <sugaya.taichi@socionext.com> explains:
Here is the series of patches the initial support for SC2000(M10V) of
Milbeaut SoCs. "M10V" is the internal name of SC2000, so commonly used in
source code.
SC2000 is a SoC of the Milbeaut series. equipped with a DSP optimized for
computer vision. It also features advanced functionalities such as 360-degree,
real-time spherical stitching with multi cameras, image stabilization for
without mechanical gimbals, and rolling shutter correction. More detail is
below:
https://www.socionext.com/en/products/assp/milbeaut/SC2000.html
Specifications for developers are below:
- Quad-core 32bit Cortex-A7 on ARMv7-A architecture
- NEON support
- DSP
- GPU
- MAX 3GB DDR3
- Cortex-M0 for power control
- NAND Flash Interface
- SD UHS-I
- SD UHS-II
- SDIO
- USB2.0 HOST / Device
- USB3.0 HOST / Device
- PCI express Gen2
- Ethernet Engine
- I2C
- UART
- SPI
- PWM
Support is quite minimal for now, since it only includes timer, clock,
pictrl and serial controller drivers, so we can only boot to userspace
through initramfs. Support for the other peripherals will come eventually.
* milbeaut/newsoc:
ARM: multi_v7_defconfig: add ARCH_MILBEAUT and ARCH_MILBEAUT_M10V
ARM: configs: Add Milbeaut M10V defconfig
ARM: dts: milbeaut: Add device tree set for the Milbeaut M10V board
clocksource/drivers/timer-milbeaut: Introduce timer for Milbeaut SoCs
dt-bindings: timer: Add Milbeaut M10V timer description
ARM: milbeaut: Add basic support for Milbeaut m10v SoC
dt-bindings: Add documentation for Milbeaut SoCs
dt-bindings: arm: Add SMP enable-method for Milbeaut
dt-bindings: sram: milbeaut: Add binding for Milbeaut smp-sram
Link: https://lore.kernel.org/linux-arm-kernel/1551243056-10521-1-git-send-email-sugaya.taichi@socionext.com/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The maximum voltage value for buck8 regulator on Odroid XU3/XU4 boards is
set too low. Increase it to the 2000mV as specified on the board schematic.
So far the board worked fine, because of the bug in the PMIC driver, which
used incorrect step value for that regulator. It interpreted the voltage
value set by the bootloader as 1225mV and kept it unchanged. The regulator
driver has been however fixed recently in the commit 56b5d4ea77
("regulator: s2mps11: Fix steps for buck7, buck8 and LDO35"), what results
in reading the proper buck8 value and forcing it to 1500mV on boot. This
is not enough for proper board operation and results in eMMC errors during
heavy IO traffic. Increasing maximum voltage value for buck8 restores
original driver behavior and fixes eMMC issues.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Fixes: 86a2d2ac5e ("ARM: dts: Add dts file for Odroid XU3 board")
Fixes: 56b5d4ea77 ("regulator: s2mps11: Fix steps for buck7, buck8 and LDO35")
Cc: <stable@vger.kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Use unified assembler syntax (UAL) in assembly files. Divided
syntax is considered deprecated. This will also allow to build
the kernel using LLVM's integrated assembler.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
commit 137cd7100e
"ARM: dts: Enable Gemini flash access" contained a bug
by disabling the display controller, while the whole
idea with the patch was to enable flash access AND
the display controller, simultaneously. Fix it up.
Fixes: 137cd7100e ("ARM: dts: Enable Gemini flash access")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Three conflicts, one of which, for marvell10g.c is non-trivial and
requires some follow-up from Heiner or someone else.
The issue is that Heiner converted the marvell10g driver over to
use the generic c45 code as much as possible.
However, in 'net' a bug fix appeared which makes sure that a new
local mask (MDIO_AN_10GBT_CTRL_ADV_NBT_MASK) with value 0x01e0
is cleared.
Signed-off-by: David S. Miller <davem@davemloft.net>
Fix PHY reset signal on clearfog gt 8K (Armada 8040 based)
Fix NAND description on Armada XP boards which was broken since a few
release
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCXG/EtQAKCRALBhiOFHI7
1VPDAJ9DSFQaCmlSRwC/jO1HvchB+y9sxACcDQioH28bCYQt3SYp7K87D1ow8wE=
=b5Ed
-----END PGP SIGNATURE-----
Merge tag 'mvebu-fixes-5.0-2' of git://git.infradead.org/linux-mvebu into arm/fixes
mvebu fixes for 5.0 (part 2)
Fix PHY reset signal on clearfog gt 8K (Armada 8040 based)
Fix NAND description on Armada XP boards which was broken since a few
release
* tag 'mvebu-fixes-5.0-2' of git://git.infradead.org/linux-mvebu:
arm64: dts: clearfog-gt-8k: fix SGMII PHY reset signal
ARM: dts: armada-xp: fix Armada XP boards NAND description
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
We now have a proper PHY driver with drivers/phy/ti/phy-gmii-sel.c to
configure the CPSW PHY. These changes update all CPSW users to use the
new driver that already got merged during v5.0 merge window.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlxtm/MRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXN7MxAAlYPHcWbjBc1tDEDZ68MvkhJHeL1jgacC
CRILC/B6iRXQjo1GiHMPD7TLeAWPkzn6s6ZpwZIy0bosLxBhVTFk2goTvZ4PufiV
my1J5zWd8cMB7IDr8xUzMqQ1QD9LmUGXmbIq1xsne5ChCxsElgg6TonsI6ZronBg
eaa/vfiIHmcwSHW7gXWKND29scVzdWI3WgVVj0mlRC1FJRR9G6D7LWlz+18+RiSj
dm5je/tu0Qq1gGNsHlUeMPhoeF7Kx2nBefSNp1NIkHOhk0sgnkfd7VLlFpFi3P0n
SN3sFL4U9JUOh37mdADek/hQ069jHai6KegaP1oK9uhrKV1n90/b8tjVRdUakaAV
PjebAcPxVwIcGk7VE9tf+Dif6HVD+f4HGlAgQ9BiPNnmOCvZ2YkhhH2Sb7MeAmw3
8k4rYpwd+Bb/IRde05iKGU+MRh/LVviwG3llcFealuFG+oPKu/JsEiLbsuGKgNdL
7KdgakkDiecbqDIDx5haXBNfPJEdMxTvmoyFooWHsK6ldA0RJVxKMJTLXx2jLShX
zoBak9LU6eCZBFCbolMw0rUlVr1jUqx9jqnAYEUNL0rI8FRW3kIB6dQL0gxD8bfh
X0RiC1LfOTgiSI8J1iRqNNF2qXEAadkwpiy4XHuV/N1GC8lpPuBHP6j0mWpddHpV
VhNeRAE1Jcg=
=W5Fk
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.1/dt-cpsw-phy' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Device tree changes to make CPSW Ethernet use proper phy driver
We now have a proper PHY driver with drivers/phy/ti/phy-gmii-sel.c to
configure the CPSW PHY. These changes update all CPSW users to use the
new driver that already got merged during v5.0 merge window.
* tag 'omap-for-v5.1/dt-cpsw-phy' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
dt-bindings: net: ti: deprecate cpsw-phy-sel bindings
ARM: dts: am335x: switch to use phy-gmii-sel
ARM: dts: am4372: switch to use phy-gmii-sel
ARM: dts: dm814x: switch to use phy-gmii-sel
ARM: dts: dra7: switch to use phy-gmii-sel
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Recent changes with commit cd28d1d6e52e: ("net: phy: at803x: Disable phy
delay for RGMII mode") broke Ethernet on am335x-evmsk, and turns out some
device driver fixes are needed.
Even without the driver fixes, am335x needs to run in rgmii-id mode instead
rgmii-txid mode. Things have been working based on luck as the broken driver
has been configuring rgmii-id mode. Let's fix that as that way things work
as they're supposed to work from hardware wiring point of view.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlxtiWwRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXMczhAArsN8/tziFRZcwD8rFIURAXU5SIsbkUhM
7cFvrJqtpfr0ae3G9fdEc/mox0lu3fnyMoGI5+FvKpFJvrW3zvXWYKVs+LJJyZNS
OAE42kYb5yVeUwnFxX8NPSL2v7xMxj576gnyMtgv1L3u1UPEwkjytNuo4z4u08lK
wlBDu/puH0U9hDef5fXPtmpSRPWhfw/4Bm2hj39KulqUPQ6pUnWgHyBg4mqmWYUa
9PS9nZXUAi0iXhCfh2lhAnSw2brYpW5Z76CI2FRcVHOhJ0aQG2+2ojkYVi7IZz6p
egwfOrPj8Xt98EnGBMe3LKmq5m2WVZNAG/G/tzpZGcZRrdWYHpTn5Ua2vPTMzo1R
1N+T8dM0ykkDZ3mKaAI7ixc/sQDXWGQWshzFkik3nKL6EdXpjtaI9yAtfShGiGKE
0g8JByLQ33QwY5yKh+bRbyPt8BO0pJ9cECapBc/UkdmTZ8LrN4co43wFP37aZRv8
fmPJcqlfRni1YMjY9LgFL23mZHgFYdUv4UUqpfczGs9d6RLZM5WodxFod8BGjS2W
kL0ZmTJOecO4mvpUlUYxnSQBhG4FuW3OA266KClSc9rM5PTZzP54BQhyqpzjc/HL
oWNxTpMwAUx7aXUO1TmWinahpZwNt2Ts/PY/8LqHr/6+Q3db39tV17xsGTp7lFjm
W0H8S4UkUQw=
=6JkK
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.0/fixes-rc7-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Two am335x ethernet phy mode fixes for v5.0-rc cycle
Recent changes with commit cd28d1d6e52e: ("net: phy: at803x: Disable phy
delay for RGMII mode") broke Ethernet on am335x-evmsk, and turns out some
device driver fixes are needed.
Even without the driver fixes, am335x needs to run in rgmii-id mode instead
rgmii-txid mode. Things have been working based on luck as the broken driver
has been configuring rgmii-id mode. Let's fix that as that way things work
as they're supposed to work from hardware wiring point of view.
* tag 'omap-for-v5.0/fixes-rc7-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x-evm: Fix PHY mode for ethernet
ARM: dts: am335x-evmsk: Fix PHY mode for ethernet
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Switch to use phy-gmii-sel PHY instead of cpsw-phy-sel.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Switch to use phy-gmii-sel PHY instead of cpsw-phy-sel.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Switch to use phy-gmii-sel PHY instead of cpsw-phy-sel.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Switch to use phy-gmii-sel PHY instead of cpsw-phy-sel.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
1. Enable ADC on Odroid HC1 board.
2. Fix clkout register failure on Exynos3250.
3. Allow using earlycon on Arndale board.
4. Disable ARM PMU on Odroid XU3 Lite because it is locked by Trusted
Firmware.
5. Add support for secondary DAI to Odroid XU3 and XU4 boards.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAlxsT7EQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD13TbD/0eQCYKTS63O9mUBlclpcpaKHt4WnzOfxDC
ww3JIrjk/lc4bW7rx0s5I70cLxYVMWMZmJYWQsR75QgTwWzECz561KvQAaNCngfh
OAaIsY1h0wwULGhsL4LJP91zlfxrx31YpnvIT3wtKmxATUBLpcbUbH0AHmhwLmaD
wRtdFdN9UeaD7gOAakRcS5OGjli7wEju+eO4QP0VZDfxsuAGvPDmeueHJ3B8PDtM
nLCUdzCqbe0JgY8AUAfNB6JkpDHf4SCzCc0wiwqslYFEWFbLgkeCZR2oTpTeo+St
WLcxTZCK4qC3pzpQV2bLTNhDlpRZon50kQnWV5OVdKihbtRvNuCstC8PIWTZL8ny
TL/f9xwka4wNehhA+mkblNF1geAvESxbKfXnY+grZiEdzjGwHAABVwGUoDkCao0I
SyO85lzdQ0M/I2t562EN/RK8uHhBhIWCoD8mMVteyrDLKXtpEkH2Jw5naznlaFQN
Moq2hY598NHi3oDMz1A9yy6YJSKUP36k8biVkTBBwaXkkrs3sKNJ6lyHiuEvpaTx
fslqaMWRfLv99CRnZvjGzNnZ0rdDB+jHV8a9G7GFX83AEt9a1/wcEdK2VWqn05B2
tGAyf+sayH0JTr+xfmRPn/B185s0ef2+ZuxEWamJxGIpOxMA0Azjntb6ZcVGQz/I
5sa2wTQItQ==
=vbXr
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.1, part 2
1. Enable ADC on Odroid HC1 board.
2. Fix clkout register failure on Exynos3250.
3. Allow using earlycon on Arndale board.
4. Disable ARM PMU on Odroid XU3 Lite because it is locked by Trusted
Firmware.
5. Add support for secondary DAI to Odroid XU3 and XU4 boards.
* tag 'samsung-dt-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Add support for secondary DAI to Odroid XU4
ARM: dts: exynos: Add support for secondary DAI to Odroid XU3
ARM: dts: exynos: Disable ARM PMU on Odroid XU3-lite
ARM: dts: exynos: Add stdout path property to Arndale board
ARM: dts: exynos: Add minimal clkout parameters to Exynos3250 PMU
ARM: dts: exynos: Enable ADC on Odroid HC1
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Commit 482997699e ("ARM: tegra: Fix unit_address_vs_reg DTC warnings
for /memory") inadventently broke device tree ABI by adding a unit-
address to the "/memory" node because the device tree compiler flagged
the missing unit-address as a warning.
Tegra124 Chromebooks (a.k.a. Nyan) use a bootloader that relies on the
full name of the memory node in device tree being exactly "/memory". It
can be argued whether this was a good decision or not, and some other
bootloaders (such as U-Boot) do accept a unit-address in the name of the
node, but the device tree is an ABI and we can't break existing setups
just because the device tree compiler considers it bad practice to omit
the unit-address nowadays.
This partially reverts the offending commit and restores device tree ABI
compatibility.
Fixes: 482997699e ("ARM: tegra: Fix unit_address_vs_reg DTC warnings for /memory")
Reported-by: Tristan Bastian <tristan-c.bastian@gmx.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tested-by: Tristan Bastian <tristan-c.bastian@gmx.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
marvell,dsa properties has been removed from kirkwood-rd88f6281.dtsi
while cleanuping the dsa binding, but the dsa reference in
kirkwood-rd88f6281-z0.dts has been missed causing the following errors:
arch/arm/boot/dts/kirkwood-rd88f6281-z0.dts:21.4-16: Warning (reg_format): /dsa/switch@0:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm/boot/dts/kirkwood-rd88f6281-z0.dts:23.5-15: Warning (reg_format): /dsa/switch@0/port@4:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm/boot/dts/kirkwood-rd88f6281-z0.dtb: Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
arch/arm/boot/dts/kirkwood-rd88f6281-z0.dtb: Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
arch/arm/boot/dts/kirkwood-rd88f6281-z0.dtb: Warning (spi_bus_reg): Failed prerequisite 'reg_format'
arch/arm/boot/dts/kirkwood-rd88f6281-z0.dts:20.12-26.5: Warning (avoid_default_addr_size): /dsa/switch@0: Relying on default #address-cells value
arch/arm/boot/dts/kirkwood-rd88f6281-z0.dts:20.12-26.5: Warning (avoid_default_addr_size): /dsa/switch@0: Relying on default #size-cells value
arch/arm/boot/dts/kirkwood-rd88f6281-z0.dts:22.11-25.6: Warning (avoid_default_addr_size): /dsa/switch@0/port@4: Relying on default #address-cells value
arch/arm/boot/dts/kirkwood-rd88f6281-z0.dts:22.11-25.6: Warning (avoid_default_addr_size): /dsa/switch@0/port@4: Relying on default #size-cells value
So remove the dsa reference too in order to fix this issue.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The PHY must add both tx and rx delay and not only on the tx clock.
The board uses AR8031_AL1A PHY where the rx delay is enabled by default,
the tx dealy is disabled.
The reason why rgmii-txid worked because the rx delay was not disabled by
the driver so essentially we ended up with rgmii-id PHY mode.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The PHY must add both tx and rx delay and not only on the tx clock.
The board uses AR8031_AL1A PHY where the rx delay is enabled by default,
the tx dealy is disabled.
The reason why rgmii-txid worked because the rx delay was not disabled by
the driver so essentially we ended up with rgmii-id PHY mode.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 3b79919946 ("ARM: dts:
armada-370-xp: update NAND node with new bindings") updated some
Marvell Armada DT description to use the new NAND controller bindings,
but did it incorrectly for a number of boards: armada-xp-gp,
armada-xp-db and armada-xp-lenovo-ix4-300d. Due to this, the NAND is
no longer detected on those platforms.
This commit fixes that by properly using the new NAND DT binding. This
commit was runtime-tested on Armada XP GP, the two other platforms are
only compile-tested.
Fixes: 3b79919946 ("ARM: dts: armada-370-xp: update NAND node with new bindings")
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This patch extends DAPM routing and adds secondary CPU DAI entry
to support the secondary audio PCM interface on Odroid XU4.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This patch extends DAPM routing and adds secondary CPU DAI entry
to support the secondary audio PCM interface on Odroid XU3.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
ARM Performance Monitoring Units (PMUs) are permanently disabled in the
Exynos5422 SoC version used on Odroid XU3-lite boards. Disable them in
boards dtb to avoid confusing user and getting following warning on boot:
hw-breakpoint: Failed to enable monitor mode on CPU 0
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Replace bootargs and kernel console parameter with 'stdout-path' property
in 'chosen' node to instruct kernel which serial driver should be used
for the kernel console and logs. This allows to enable earlycon messages
by adding just 'earlycon' parameter to kernel command line.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add minimal parameters needed by the Exynos CLKOUT driver to Exynos3250
PMU node. This fixes the following warning on boot:
exynos_clkout_init: failed to register clkout clock
Fixes: d19bb397e1 ("ARM: dts: exynos: Update PMU node with CLKOUT related data")
Cc: <stable@vger.kernel.org>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Odroid HC1 uses the exynos5422-odroid-core.dtsi file as a base. All
other Exynos5422 Odroids use the "common". The ADC node was defined
only in the latter.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
from the Edison tablet and a chosen node for veyron devices.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlxp5qUQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgXsjCACcvu8DsAywvD4A1Ifnj1LCwIfzzTk7Njle
NMtg4xGJDgjuTWYZMWUeIf7/te/sRX5w1T9a+yURxU7q7+aFhquKSIfhncqpKzeI
0glWTsOuIVaQSjn4+R5as6KPOxgWrBLZOolu39HmDnmaAjDn6hb5/NTm+lxSSrQO
R/IJuMSbHL++vPNsP7415hYuZf+5uwFkbOeE7b3nU4zhPFa5IO7WNQlzytf3o4+M
4YqZ+C3eA9/M0izFN2UOvkqKIgHp6ZGGzE1fpcbrM74OqyreZh9CuuBnGbOmSD4N
medTwJEVnuKJRFSmAyXuEUP8+M+RAQOrPZOop/HtvHdRhhfHvrCE
=HTA/
-----END PGP SIGNATURE-----
Merge tag 'v5.1-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
A number of improvements for rv1108 boards, removal of an obsolete property
from the Edison tablet and a chosen node for veyron devices.
* tag 'v5.1-rockchip-dts32-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add chosen node on veyron devices
ARM: dts: rockchip: remove cap-mmc-highspeed from rk3188-bqedison2qc mmc1 node
ARM: dts: rockchip: Use the correct regulator properties on rv1108-evb
ARM: dts: rockchip: Use the correct regulator properties on rv1108-elgin
ARM: dts: rockchip: Fix vcc5/6-supply representation on rv1108-elgin
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- support for a new variant of pca953x
- documentation fix from Wolfram
- some tegra186 name changes
- two minor fixes for madera and altera-a10sr
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAlxleLcACgkQEacuoBRx
13I45Q//YMGUYzkMjOL+lp2DYnnVhVNqrF4hoLjinWVrnhZ6gqu88RgV2Cea4Pta
oxVxnSsE8LK7kY8VZ8tcBmIqLLkQAJdSVtqkeSoZF2vhWBAbE9ZaSOYb17SIkSXK
Ok16lZgZ+ZWOM5EjEvuRpB/qYGjX2glD5/Y2Kl7+wsX1W6U2pXasP0IjhcvDU8mJ
NXNgfkr6kluMUqHJyqKo8eT/P3Hdv0CK9GsN2vGyfJenCdTSd7EC6KuhWAivi+fG
/lf1bVuc2cCiXjxdSOXx+Yz7SjNe56viTaqnn/K6OlfLgErjKnRW+AxPkTZXNtDi
pfMMpPXiwPcbQR2wrXG/7OMmJ1kUsfWoIUCx5RDwhF1KbEQVqgaSITLylk+4Yp/3
eM0fYsQ+KvOdAnWKSgfxBhaaiO7z5XDdrnkSHBDoiBrm07BqBgK/v3Rivzf2GMEv
QvM4OBfThS9I8skV5BaOBRDfHZs4N0EU/vhsW9gt50urtlSM0vSYx6kdMq/8R0k4
NkJT43u+1vi5koMljBAsZYZiyXOQ2B+PlfpTMfMu+93QH8wlu9mOt1r3YTQyA1Xf
jiOK8M2yQKP5g7RuPM6MtMsqlZKDM5nAlSf7S280Z3+vBd+LaELbXvT2/JL5ViGU
hfH/gaNwUGUYd8EsWvfhHVdPAAecDCwxfKyKEnFGhMrtunTgwfI=
=nV64
-----END PGP SIGNATURE-----
Merge tag 'gpio-v5.1-updates-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel
gpio updates for v5.1
- support for a new variant of pca953x
- documentation fix from Wolfram
- some tegra186 name changes
- two minor fixes for madera and altera-a10sr
In order to use earlycon, the stdout-path property needs to be set
in the chosen node. All veyron devices use uart2 for debugging, so
add it to the core veyron dtsi.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The mmc1 pins are used for SDIO with a wifi chip.
The function mmc_sdio_switch_hs() only checks for MMC_CAP_SD_HIGHSPEED and
not for MMC_CAP_MMC_HIGHSPEED, so cap-mmc-highspeed can be removed.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The netfilter conflicts were rather simple overlapping
changes.
However, the cls_tcindex.c stuff was a bit more complex.
On the 'net' side, Cong is fixing several races and memory
leaks. Whilst on the 'net-next' side we have Vlad adding
the rtnl-ness support.
What I've decided to do, in order to resolve this, is revert the
conversion over to using a workqueue that Cong did, bringing us back
to pure RCU. I did it this way because I believe that either Cong's
races don't apply with have Vlad did things, or Cong will have to
implement the race fix slightly differently.
Signed-off-by: David S. Miller <davem@davemloft.net>
for 5.1, please pull the following:
- Stefan updates the BCM2835 SoC driver with downstream properties and
uses that to implement a reboot notifier to tell the VC4 firmware when
Linux on the ARM CPU is rebooting
- Eric adds a proper power domain driver for the BCM283x SoCs and
updates a bunch of drivers to have a better and clearer Device Tree
definition to support power domains/breaking up of functionality. This
requires converting the existing watchdog driver into a MFD and then
breaking up the functionality into separate drivers and finally
updating the DTS files to leverage the power domains information.
- Wei provides a fix for making a symbol static
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAlxV0IYACgkQh9CWnEQH
BwQIHA//TL12EfHws6C64EKspqsg9NE5/+K3HRRJbgwtuBQ/n6oYBMyJx+6x6Nwc
7QjuCkZ/VWKxy0Fn+ToGnX0JgrQL5kND3Cm0d8cyZ0VJ6juppizyAa1YkFplShSr
l0XlYaJo1HrB3hBd/+YbGZnLp9flbii5d3MIcy8ZoWmN7zLeHnQbHaf8jcbJC+Iw
Mal8ojk2ru0rMimMQieTiPzWwiec08wtSIYs2590rOVWFyhGIn/KmHqpG6iYjdwj
oQbr86R0jMPCb/g3SXRttxW8wFbtYdmILdkzhOaEd4JyJEwUCNDciM3E04OyE9VN
fNMc1l0zh7dfyo9bFRpgS6AAxYQVj3led+B1NGtpnjDPybVWU10gipGdgFt9UPRE
pJnS1LcPbAJ1FdbcYFU0TsiViWLZehm2cbc4rPYvqKp1Y+82FJZTYyu0GmBOUwB6
jpM5ZVvET8k3nw6ImeE3jjT3kBfF31u552+iO4RQvKHRm/GBMtyTDrFZVUwgqMFE
NEKnj3/VLSCxP3dnQImw1ro2493piZNdlBEs6mAugFUGqcb+40KOtOOpWiGMFH7h
BZN0kj128ryG/YCVKDOnZSbYRLhpxc1VcVYJ3rYJgn8mrFFmNo/fjDgaRogrJN/s
LmCiSIqsmuy8f36/IWd+aHk6ex5yskJe7x5M/7tlmz03oXg1viQ=
=t5+u
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.1/drivers' of https://github.com/Broadcom/stblinux into arm/drivers
This pull request contains Broadcom ARM/ARM64/MIPS based SoCs changes
for 5.1, please pull the following:
- Stefan updates the BCM2835 SoC driver with downstream properties and
uses that to implement a reboot notifier to tell the VC4 firmware when
Linux on the ARM CPU is rebooting
- Eric adds a proper power domain driver for the BCM283x SoCs and
updates a bunch of drivers to have a better and clearer Device Tree
definition to support power domains/breaking up of functionality. This
requires converting the existing watchdog driver into a MFD and then
breaking up the functionality into separate drivers and finally
updating the DTS files to leverage the power domains information.
- Wei provides a fix for making a symbol static
* tag 'arm-soc/for-5.1/drivers' of https://github.com/Broadcom/stblinux:
ARM: bcm283x: Switch V3D over to using the PM driver instead of firmware.
ARM: bcm283x: Extend the WDT DT node out to cover the whole PM block. (v4)
soc: bcm: bcm2835-pm: Make local symbol static
soc: bcm: Make PM driver default for BCM2835
soc: bcm: bcm2835-pm: Add support for power domains under a new binding.
bcm2835-pm: Move bcm2835-watchdog's DT probe to an MFD.
dt-bindings: soc: Add a new binding for the BCM2835 PM node. (v4)
firmware: raspberrypi: notify VC4 firmware of a reboot
soc: bcm2835: sync firmware properties with downstream
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
We add support for Bosch Guardian am335x device, and configure more
devices like GNSS and LCD backlight for omap3-gta04. And we replace
the wlcore binding documentation URL with a local file that we have.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlxlryMRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXOMDBAAw57p8QZSacuX1OLXcwCotq1p/LWs7423
Y+Dm2UhEdmi89+DL5yDO6Wd46VJ2/mZ9T+WR2cUeUsSs/YPApTmBBB7cBs5Kk7GS
07olRxqnbB+myESx5he5lSfxAwnXRF2is7PE0bf3gTTulPaVkz1/OUYZdwdL8j4q
wabUZ3cyDkr1ZwSiTMpddDlP0o/kNWcGt7Lhu3+kvYygAKqjRaXgtwlFbWDgwQFl
OBFO5lhupC07EItzPYqNxZMKKamf9Gegw86bfa1rFVy5Q5xCKnstKcoShF8i/h4K
2sYq8siUU6r4KNVibIaT0zRdmXBVIcZYzR4dK5MJrzaS64hX+F12p7XDezcUGqfR
/1guoQSHbZL8a/gGFtRdkxmv6UDfVlARY0f+oRRNX3SUAuvaOnmpqFyLNw1MUcsv
OuuciW9O8WE7MZ01hhTokVEI9M0xZXx0xdyx7jr/pAN7vnxrR+mDRNbaxAAr4941
YWjmg77k04qfV9hCKX5dMGMnT+fJWxO6kkfkTqS7OF6QNDHtV8Ym/T5riTxkzeAj
fjB4E9TmQ8Zad2A+bDH2PTIJsjnU1Ofnr/SFCR/ztCw70I+t6yzAGs+mQX6Dve/g
6tcnE0YgBM4x030DlykUixFFB/8OLCCsHP5qGAHtu9yp7Iwda8Yeyt7K4AeetF7l
KYXTWZrxljU=
=gumh
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.1/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
More dts changes for omaps
We add support for Bosch Guardian am335x device, and configure more
devices like GNSS and LCD backlight for omap3-gta04. And we replace
the wlcore binding documentation URL with a local file that we have.
* tag 'omap-for-v5.1/dt-pt2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap3-gta04: declare backlight in lcd node
ARM: dts: am335x: Add support for Bosch Guardian
ARM: dts: gta04: add gps support
ARM: dts: gta04: add ldo 3v3 regulator
ARM: dts: gta04: add pinctrl settings for wkup domain
ARM: dts: omap3-gta04a5: Replace LXR reference with a local one
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Use new "wakeup-source" instead of "gpio-key,wakeup" in Z-Turn
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlxiwoEACgkQykllyylKDCGAJQCbB4cK6W0fXAfw/Zi7mHBEo0yL
lxEAn3/zTTTB2DFB+kimxZFZcHJaEY11
=dMVs
-----END PGP SIGNATURE-----
Merge tag 'zynq-dt-for-v5.1' of https://github.com/Xilinx/linux-xlnx into arm/dt
ARM: dts: zynq: DT changes for v5.1
- Use new "wakeup-source" instead of "gpio-key,wakeup" in Z-Turn
* tag 'zynq-dt-for-v5.1' of https://github.com/Xilinx/linux-xlnx:
ARM: dts: zynq: replace gpio-key,wakeup with wakeup-source property
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- New board support: Logic PD i.MX6QD EVM, ZII SSMB DTU, Phytec
phyBOARD i.MX6UL Segin, Y Soft IOTA Draco, Hydra and Ursa boards.
- Add regulator control for various sensors on imx6qdl-sabresd board.
- Add DISPLAY power domain support for i.MX6SX SoC.
- Add stmpe-adc device node for Toradex iMX6 module.
- Switch to SPDX identifier for imx6q-tbs2910 board.
- Add proper ksz9031 clock skew values for imx6qdl-phytec-pfla02 board.
- Mark I2C recovery GPIOs as open drain and correct and WEIM range
configuration for apalis/colibri boards.
- Small and random updates to various devices.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJcYo+8AAoJEFBXWFqHsHzO+D0H/3RYArKxp1FJ2QVS2w4uE2O7
eWycgtie8d4x84/hdMG72sU/x0hZm0v1kXUGO9Yt17dgX3Dg1Sfv7bECqZAHvG11
6dMuG5u3lCLjQQLieAAUvxpWFCne3gSWVQnb0o/zWiHBeGNQJt42hacLNYaJSqTL
Vao3wiiGTZvVih6B+ueFi4Im/VChEn5rnKmjCqkFTAlUIpVvzLZqY8Jy+vjVC3aP
5tLq8WnStJqgFgxtRpVKDsdu2KjJKCozpw0KZyM3MYQ4blGCCbFpFfyGfBeNves5
xCWrx//rt//ol09X5UXtz4T+/QKC5390styCA9m+XgSFcFSYKgjps+9iD+5a1tk=
=OH8n
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX device tree changes for 5.1:
- New board support: Logic PD i.MX6QD EVM, ZII SSMB DTU, Phytec
phyBOARD i.MX6UL Segin, Y Soft IOTA Draco, Hydra and Ursa boards.
- Add regulator control for various sensors on imx6qdl-sabresd board.
- Add DISPLAY power domain support for i.MX6SX SoC.
- Add stmpe-adc device node for Toradex iMX6 module.
- Switch to SPDX identifier for imx6q-tbs2910 board.
- Add proper ksz9031 clock skew values for imx6qdl-phytec-pfla02 board.
- Mark I2C recovery GPIOs as open drain and correct and WEIM range
configuration for apalis/colibri boards.
- Small and random updates to various devices.
* tag 'imx-dt-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (31 commits)
ARM: dts: imx: Add support for Logic PD i.MX6QD EVM
ARM: dts: imx6qdl-sabresd: remove reg_sensors' regulator-always-on
ARM: dts: imx6qdl-sabresd: add regulators control for mma8451 sensor
ARM: dts: imx6qdl-sabresd: add regulators control for mag3110 sensor
ARM: dts: imx6qdl-sabresd: add regulator control for isl29023 sensor
ARM: dts: vf610: Add ZII SSMB DTU board
ARM: dts: pfla02: add ksz9031 clock skew values
ARM: dts: imx6qdl-phytec-pfla02: add missing interrupt-controller property
ARM: dts: Add stmpe-adc DT node to Toradex iMX6 modules
ARM: dts: Add devicetree compatibles for LS1021A based boards
ARM: dts: colibri: use valid range configuration for weim
ARM: dts: imx6: Add support for Phytec phyBOARD i.MX6UL Segin
ARM: dts: imx6*-apalis/-colibri: mark I2C recovery GPIOs as open drain
ARM: dts: vf610-zii-ssmb-spu3: Pass "no-sdio"/"no-sd" properties
ARM: dts: imx: Add Y Soft IOTA Draco, Hydra and Ursa boards
ARM: dts: imx7ulp: add sim node
ARM: dts: imx6ull: change to use new compatible "fsl,imx6ull-usdhc" for usdhc
ARM: dts: imx6ull: Fix i.MX6ULL/ULZ ocotp compatible
ARM: dts: imx6sx: Add DISPLAY power domain support
ARM: dts: i.MX51: digi-connectcore-som: Add support for I2C bus recovery
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- more features for Endless EC100 board
- chip temperature sensor support
- fix ethernet pins
- add Mali-450 GPU
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAlxh4LQACgkQWTcYmtP7
xmWu3w//bOc1aqMh325KmhP+WXUJEp0Z+7/r8TcqYYW2UMdjqGKvYNREaL+cDKu3
6DOaWvTKrRHOJr1L4uSdg1NBEhH6Nzmb7r9bRLkj2xT5vT66pZIiMa4OETfvdvP2
TQ86MPUY69M6IJ2JzeYA34stItYanExDhosbaHmPSJqwvDdh0V932eBg4OY/IpEn
j4Hygf9HYSA5cSx7J2Ah1gUXzI66FcPlRBWrl+jeTS7qqU9GxYo8/8Hrgn6hyCTQ
dpQHvgsCdeHvsf8fRpulxH/aUo5u2nuX1/R8UrOWUmCPd2r3RBu0U27Ja7FJiAeb
s6OwLveAVeMS7Urrh3ylaFstbjg3CMtGvh1hnbWozF08yNzd6ihD5vsUED7vpxNr
hT8m8oC8hujP1CiIxFqbkPZsz/hWoagPOG2AtRNMehs+gVxOfD+CTkw3Y+x3+NrA
DwU9YzrKqFn4StSHJ6ccBE857gSH5QgOq0rLYiH1AlktHvXKh/hL/H82pFDJHZcW
OFZ2nAI9VCPDlx8tCbuH16BIqD03piT5ew0wWozG5uc/JP26stmMXHQlQVDxRju4
NsJiqGzAtgIK+jf2COVZJeYtOO9IYjPwrC0wJe2vWW7MTUBv0LSQDuBV2pTT/N87
pSqeusg80DuPC3WZLGU3whitwO6yg3NiWeGB6cweu3gWeQsMSig=
=PNC5
-----END PGP SIGNATURE-----
Merge tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
ARM: dts: Amlogic updates for v5.1
- more features for Endless EC100 board
- chip temperature sensor support
- fix ethernet pins
- add Mali-450 GPU
* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8b: ec100: add the GPIO line names
ARM: dts: meson8b: ec100: improve the description of the regulators
ARM: dts: meson8b: ec100: enable the Ethernet PHY interrupt
ARM: dts: meson8m2: mxiii-plus: add iio-hwmon for the chip temperature
ARM: dts: meson8b: odroidc1: add iio-hwmon for the chip temperature
ARM: dts: meson8b: ec100: add iio-hwmon for the chip temperature
ARM: dts: meson8b: add the temperature calibration data for the SAR ADC
ARM: dts: meson8: add the temperature calibration data for the SAR ADC
ARM: dts: meson8m2: use the Meson8m2 specific SAR ADC compatible
ARM: dts: meson: switch the clock controller to the HHI register area
ARM: dts: meson8b: fix the Ethernet data line signals in eth_rgmii_pins
ARM: dts: meson8b: add the Mali-450 MP2 GPU
ARM: dts: meson8: add the Mali-450 MP6 GPU
dt-bindings: gpu: mali-utgard: add Amlogic Meson8 and Meson8b compatible
ARM: dts: meson8b: add the APB bus
ARM: dts: meson8: add the APB bus
ARM: dts: meson6: add the APB2 bus
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Contains a single patch that adds the "jedec,spi-nor" compatible string
where appropriate.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlxdmP0THHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoe4QD/4kFg14Rd4ERRZU31B5MNTmVETqEPx4
FGyR0FvMP0eNQCTJE/hrI9yiPVdB1ryE9YU//rsfIcezpTcsLbquEb2QqJqrP5y1
cdENJ7vi5kRV7xIh/UzkaYvg5qp2gYZVL7wMvPfuaSXqExcZqoyiNnHnGbP2oJzg
/GM1doEe8yck6WGLipJMyYtXkWAQydUwhNuWSAMXHKrgisIdB1/BSVXT3Ty9LpXC
doroWS/CeW3QN+VfqXPObXWM4f2EX7ApThblb7cvt55jbb8CenQXlszFGcPq4L29
ZV0s04mNBwXbJl4W0ilaXfCWceyjOx3EPeYJ/XA9khswyFVg7TVXV+AsevSbONya
bfm7c2x5Km35olPTlKo14qhcUw9ExfxyiC/rwi08/LI6wNZFSux9ZYNJL5EYPrxI
7F4ULcJaTG1K/LQy6xXrh98xRy0sSsSklFfGZ8DdOFuHEpHI+RQaWfOXYD4T+2QN
oZIA4x93zbRbvOQGkO7sMm1I9Oa3EI+PRG6QBHJyn/uMbaeA1gdtPr/gpwccTQo1
stgRLDwaxcUuvD0Byz2jAkgOoN2bPUdjqXWnKqHXFSiFoJj2IQOdJqNLw9NfB3j/
JrDOHHsJyHaAKovVAvaGi0zF83ZspVMyw4OnwyCCmeGqUX1BXwHCYzJWI7f+4WQS
R5wzq2pVU4+Opg==
=Cuag
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.1-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.1-rc1
Contains a single patch that adds the "jedec,spi-nor" compatible string
where appropriate.
* tag 'tegra-for-5.1-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: add "jedec,spi-nor" flash compatible binding
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* R-Car H2 (r8a7790) based Stout board
- Convert to new LVDS DT bindings
* R-Car H1 (r8a7779) and M1A (r8a7778) SoCs
- Describe HSCIF0/1 devices in DT
* RZ/G1M (r8a7743) SoC
- Correct sort order of the RWDT node
- Remove aliases: should be defined in board rather than SoC DT if needed
- Remove generic compatible string from iic3: it is not compatible
* RZ/G1N (r8a7744) SoC
- Describe LVDS and DU devices in DT
- Correct sort order of VSP and MSIOF noces
* RZ/G1C (r8a7747) based iWave SBC
- Enable RTC
* RZ/A2M (r7s9210) SoC and EVB
- Initial support
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlxdXz4ACgkQ189kaWo3
T75wbBAAqOyXvMCt7lGsov4i0e/lqSFl13uHv83Mk+PVvvT48H2g/ItitGDq4GYr
ItAYBRF66XcAKJbA30e4OvAk+yB0Y3iMT8KIR4Nca5ls9rn6NwbyBugZ65mizKEk
vIoA1sGpsWUrK0yxmGoIx9C6aX9qsh82ivdMpvwb1Kzy5oO59GCgJ9d/d+Q2KwvG
rycEPQwHLFIIijoNr0IH3ZiXhyfeEabGHg/EK/FVxJJNgQLjFW0ZogsZ/a49ptoZ
YZqEc2w13a+rWFTg7059UbzPNjJCq0/2lYRPthWTz9KzUyFgSZ+2GvawdoFSvBZ5
cf+6+qZkgkVvs00yajd6Q2t9IcyjeVmU+GBHFSO65wDRJknDN8sE1v/qHaAr0+Bm
My8Th55Tzak/d+6Zb6xP95kTiaUDpWQrjntMvg3AewiAcjDJasBSsU9EDBlEDh3W
VaQVkyyHtWwfiS0qFf4u0Rfgb2DIBYLvXzslipyZnsKih14+rC/S6N3j8rykrOoE
DTjh7Hi4k4xYwqwNFrg9lvGCoAG4aZddyat9SYfgTs65OmG7huyTH5vqtsmB3kN0
0a33nQ8xt24TH6wSHGB17GXeR9JEluqHC0Do9bbis1B6QiSBvcY+Ne1LtFN8O5sH
RNEcoqU1cCLVHvbRJL/3Y5bwYF22f0GvbMxO/vgdmcz2DSxbuL0=
=q0l0
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-dt-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into arm/dt
Renesas ARM Based SoC DT Updates for v5.1
* R-Car H2 (r8a7790) based Stout board
- Convert to new LVDS DT bindings
* R-Car H1 (r8a7779) and M1A (r8a7778) SoCs
- Describe HSCIF0/1 devices in DT
* RZ/G1M (r8a7743) SoC
- Correct sort order of the RWDT node
- Remove aliases: should be defined in board rather than SoC DT if needed
- Remove generic compatible string from iic3: it is not compatible
* RZ/G1N (r8a7744) SoC
- Describe LVDS and DU devices in DT
- Correct sort order of VSP and MSIOF noces
* RZ/G1C (r8a7747) based iWave SBC
- Enable RTC
* RZ/A2M (r7s9210) SoC and EVB
- Initial support
* tag 'renesas-arm-dt-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: dts: r8a7744: Add LVDS support
ARM: dts: r8a7744: Add DU support
ARM: dts: r7s9210-rza2mevb: Add support for RZ/A2M EVB
ARM: dts: r7s9210: Initial SoC device tree
ARM: dts: r8a7779: Add HSCIF0/1 device nodes
ARM: dts: r8a7778: Add HSCIF0/1 support
ARM: dts: r8a7743: Fix sorting of rwdt node
ARM: dts: r8a7743: Remove aliases from SoC dtsi
ARM: dts: r8a7743: Remove generic compatible string from iic3
ARM: dts: r8a7744: Fix sorting of vsp and msiof nodes
ARM: dts: iwg23s-sbc: Enable RTC
ARM: dts: stout: Convert to new LVDS DT bindings
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Our usual round of DT changes shared between arm and arm64.
We have a bunch of changes for board, improving the eMMC support on the H5
variant of the All-H3-CC, enabling HDMI and reworking the CSI driver.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXF1X8QAKCRDj7w1vZxhR
xX9ZAP9KwFKKehrS1QJjTHKeowUKEnRHuDj2MlwTZJgCw/AMMgEAzgRZwY/VH/Os
aQIhJho9hWmBE0dePIZuWzzCp1giNw8=
=7jQV
-----END PGP SIGNATURE-----
Merge tag 'sunxi-h3-h5-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Allwinner H3 and H5 changes for 5.1
Our usual round of DT changes shared between arm and arm64.
We have a bunch of changes for board, improving the eMMC support on the H5
variant of the All-H3-CC, enabling HDMI and reworking the CSI driver.
* tag 'sunxi-h3-h5-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: h5: libretech-all-h3-cc: Mark eMMC HS-DDR 3.3V capable
ARM: dts: sunxi: h3/h5: Drop A31 fallback compatible for CSI controller
ARM: dts: sun8i-h3: nanopi-m1-plus: enable HDMI
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add SMMU node for Stratix10
- Add vendor prefix fo Novtech
- Add a new 96Boards Chameleon96 board that uses a Cyclone5 SoCFPGA
- Add missing reset properties for all IP on Cyclone5 and Arria10
-----BEGIN PGP SIGNATURE-----
iQJIBAABCgAyFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAlxYYAAUHGRpbmd1eWVu
QGtlcm5lbC5vcmcACgkQGZQEC4GjKPSfPA//a013n1vCV9Wz6RsbXNRODXzhV6FN
9uPWAdbkuWrCvDFAH+9s/0nMwxAj8f1HCEK9J07CPRcjcLPO7iHfIUeJ4lbCNCXZ
1ZuLDdK0Y4GjziJ4xlUP0JvUpJXtRKo+XDXVC+jNAMQy6wQpsEYdEwpeTPo94jrv
X0Zait3PeaY6ai6ImzV4QOYYmZ9GhRHjNY/Hc8jSsZeMWk+sMWygExlUngXlpO8c
dvK1Z4dfhrRZyJ/ewjjb/D0eekq8XiIfGmI4A2Cox3A73XAmtPEL3MT57BbPnq7f
jmNmlh7yRrxZHVErSt0dJTOJ6dNx+McuuwSmDL1vR19M44JUbVOjLjDUEwA7tSmr
eQXVhGuYHfxgJT0CeEBIHJAxPZfTqy68IijZYXv4aWimFdsbeAtraY7PKeZ/TnOP
3Aa9GDSks5NsAGVR5AltiNRmZujyQktbcNU8TcNt8tc19Kub8Q9GVhsmPUIKEov8
oAeXq4xbvGe6Ike6cfR1H+P14mgpbxJSZwGQoqky1T3lWqFBhl/93/ixpzt5jMWX
96tHA7VuZ7+in3BoqzHNxZ2PWpHScd3UScLxzxFEotW2nCofXCLCVkW+Zl8xWLa9
eu5GXE0ZzA04Elaagj2MM/rTsIgWFWqROq4A3Za6k5AB7quThr1yMoL+5Q5keOlO
4xAhCKudZb74BS4=
=8OgV
-----END PGP SIGNATURE-----
Merge tag 'socfpga_dts_for_v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt
SoCFPGA DTS updates for v5.1
- Add SMMU node for Stratix10
- Add vendor prefix fo Novtech
- Add a new 96Boards Chameleon96 board that uses a Cyclone5 SoCFPGA
- Add missing reset properties for all IP on Cyclone5 and Arria10
* tag 'socfpga_dts_for_v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: update more missing reset properties
ARM: dts: socfpga: update missing reset property peripherals
ARM: dts: Add support for 96Boards Chameleon96 board
dt-bindings: vendor-prefixes: Add Novtech Vendor Prefix
arm64: dts: stratix10: Add Stratix10 SMMU support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Fixup GIC IRQ flags and GSBI state on MSM8660
* Add USB OTG, gpio ranges, and Wifi support on MSM8974 Hammerhead
* Remove skeleton.dtsi on IPQ4019
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJcV5CEAAoJEFKiBbHx2RXVXysQAK08L4mNPGVLt+NkHVr9kLcD
CUq5emEizYWs1wdA4H+2Zzf/EEMAoGHLI0uX3WnP55fPTbLhVBVVIlvv5+J9KF9T
Y37LF4mMho7JvmDUfq9t4brx9sosduEVpbLyQcmR+avWWbSVjmgajPCyBTOgR/0C
2wUnl0mKDSsZO8fqNiQd8AkeXfkBSDFCYOq6jn2MZ6Aop93Lg7GqZ4/hWp/WRA8Z
9AhgGLNF02O4mIyfZI8k9tf8CYjHNlm3ceIDj1uRBfMtyhLQZDoAWc+zVXQ2njbW
5lLMPdbqZzepNU9ou/4Z4DeVKwAt0EnaOcDiMi7JJ3o8rtQXI9UL0QnKJK1Rcj7K
82XKP+lbzB2/JI62PSk7kT+bQ1EmmJn19wRcjBtP4L+gCdH0kq2QopVEVkhUU7pg
y5cwHKLtKtYlXeXO27h0amYY+xy/MgMfgJMAhxsn2hj+U3N7DJKYSh5nfWpVU2BP
ztobWTvCvnxPTGFXI9Txl00KVgy5Og2pWaMzkge3yAbesqsPNjJamk+BGn8qL75X
ViBnHMmvH2RBgROLcHgJcjrkdeu5xNwps38xlb/5K9L4jT8wPAcal00y/qMv1saR
A56zL+wtuHEOCqyULvKAzNzduVdEoQechCYueZTm+5M/pXkrkddIDcs6xUGvxtPX
bw9AhstcXIl49QRKgeUg
=0M2a
-----END PGP SIGNATURE-----
Merge tag 'qcom-dts-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into arm/dt
Qualcomm Device Tree Changes for v5.1
* Fixup GIC IRQ flags and GSBI state on MSM8660
* Add USB OTG, gpio ranges, and Wifi support on MSM8974 Hammerhead
* Remove skeleton.dtsi on IPQ4019
* tag 'qcom-dts-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: dts: ipq4019: Remove skeleton.dtsi
ARM: dts: qcom: msm8974-hammerhead: add USB OTG support
ARM: dts: qcom: msm8974: add gpio-ranges
ARM: dts: qcom: msm8974-hammerhead: add WiFi support
ARM: dts: msm8660: Fix up GIC IRQ flags
ARM: dts: msm8660: Mark two GSBI blocks "disabled"
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Here are the changes for ARM NXP LPC32xx and ARM NXP LPC18xx/LPC43xx
devicetree files:
* added dts file for MYIR Tech MYD-LPC4357 development board,
* two missing properties are added to LPC32xx keypad controller device
tree node, this fixes a long-standing problem with its initialization,
* LPC32xx PL11x LCD controller device node got corrected properties,
which allows to use it with a new PL11x DRM driver,
* output voltage level on one of Phytec phyCORE-LPC3250 fixed regulators
is corrected, the fix is needed to remove duplicating platform data,
* Phytec phyCORE-LPC3250 board gets a description of a kit LCD panel,
this completes setup of CLCD device tree node for the board,
* added unit addresses to memory device nodes on EA and Phytec boards,
* fixes of ordinary warnings in dts formatting like leading zeroes,
unused address and size cell properties and so on.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEETKMJMWSwX7CFTVIOqj3i2jwlOWUFAlxXTzIACgkQqj3i2jwl
OWXBRA//RCAfC/GhIyZF1uHIhj/G85sAWuGSYQ90+fEVtyzb1Y+yeBRKkNH2Xi8C
LkSzD58z/1BTaYz68EaRENU3xCkBcBHH8ZymqJP8/pG+/AoLVIg7/wkeFj/BCC80
rESTV4IjTFdbAaqmM8Y/rcWuPTs5fgxZzFdCgqY0FuTee5hx5aLQkA39cIPWJLJz
Ox+e/Yhs00blWZUFyitP5sd/rnVeuNXWqY0VnN8hG4oH4+GJOA8QAIzzq1DTKaj0
43073ymRw4ZOry0qfsbRvjQZwvSAQD+kZx24DXwP+6YFdW8DqdAZPkuCYYMV10JO
tiOg6hHHjM1lKJWom/6N1Z9layMZeyPxBRYQ2Tpn3+5Or05iHgAhbYv5kRvIBZ8W
cL8hA9SNb/g4yRa67GBINdGHlf3nRBvqDgOR0OQEF3Q/JTFferJOb3MhGuIX1fS7
39JRIndLJD10SoK/Nezvc68myei8aQ+YTQBzaNkm3q4q4SuLF9nEb92s313yvzKv
vBwMuaGuTL+pBvDR3qGsFHxrExj1DIbecYqGdvGj0lmSZbNPWeR2ZSj6XGfT18x3
pCmr7C6brY6jWsp6p8nG7ovFkPqv3X3x/gBszLFGFaEedkssabfLesWdZooHIAgJ
Fa6Lc2M7AAwxHT1YDn6+ojrr/yhaQoaray/+aOT9WAwAhElpc24=
=J1uJ
-----END PGP SIGNATURE-----
Merge tag 'lpc32xx-dt-for-5.1' of https://github.com/vzapolskiy/linux-lpc32xx into arm/dt
ARM: lpc32xx: devicetree updates for v5.1
Here are the changes for ARM NXP LPC32xx and ARM NXP LPC18xx/LPC43xx
devicetree files:
* added dts file for MYIR Tech MYD-LPC4357 development board,
* two missing properties are added to LPC32xx keypad controller device
tree node, this fixes a long-standing problem with its initialization,
* LPC32xx PL11x LCD controller device node got corrected properties,
which allows to use it with a new PL11x DRM driver,
* output voltage level on one of Phytec phyCORE-LPC3250 fixed regulators
is corrected, the fix is needed to remove duplicating platform data,
* Phytec phyCORE-LPC3250 board gets a description of a kit LCD panel,
this completes setup of CLCD device tree node for the board,
* added unit addresses to memory device nodes on EA and Phytec boards,
* fixes of ordinary warnings in dts formatting like leading zeroes,
unused address and size cell properties and so on.
* tag 'lpc32xx-dt-for-5.1' of https://github.com/vzapolskiy/linux-lpc32xx:
ARM: dts: lpc32xx: ea3250: beautify gpio keys children nodes
ARM: dts: lpc32xx: ea3250: add unit address to memory device node
ARM: dts: lpc32xx: phy3250: add unit address to memory device node
ARM: dts: lpc32xx: phy3250: setup LCD controller to panel interface
ARM: dts: lpc32xx: phy3250: remove regulators umbrella device node
ARM: dts: lpc32xx: phy3250: fix SD card regulator voltage
ARM: dts: lpc32xx: fix ARM PrimeCell LCD controller clocks property
ARM: dts: lpc32xx: fix ARM PrimeCell LCD controller variant
ARM: dts: lpc32xx: reparent keypad controller to SIC1
ARM: dts: lpc32xx: add required clocks property to keypad device node
ARM: dts: Add DT for MYIR Tech MYD-LPC4357 Development Board
ARM: dts: lpc32xx: Remove leading 0x and 0s from bindings notation
ARM: dts: lpc435x: remove address and size cells from gpio-keys-polled nodes
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
for 5.1, please pull the following:
- Dan relicenses the Luxul DTS files to GPL 2.0+/MIT
- Hao adds support for the Phicomm K3 which is a BCM4709 SoC with dual
BCM4366 radio
- Stefan adds support for the Raspberry Pi A+: binding and DTS files. He
also provides a bunch of DTC warning fixes for the different RPi DTS(i)
files and adds support for missing GPIO lines on RPi 2/3
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAlxVz5oACgkQh9CWnEQH
BwSx3w/8Dtph3vW+OjerHao0vEXM85iYGUyydTvmOB+lM3Cq09vtqgXNX8xTnH8F
jFv5o//vdrLF1JFFthJeR06MGr8BOEncQJKKCEXnEGdkaL50CzvH5pD/q1iOm5ig
qrXiBy8hNd/gmkmj/BUUjKQLViUzelameGOezAI5RE+QzkraO3rIPFItT1R+X5uQ
pc6CPpEmRXWvcUn3QOimqaFW+mePqoez1xA12bBCw9DXAUKX/p3sglTC+kA7t0zC
DfgXYpGhvIk0e7inJIk+rLMJKbD2Pmvd3hS0XT6AnObRFApYwMiso3BVTvEbFvv8
ebt9j+QZmJFcVp68NDErrNjq4yjq+yUqhikd/G3KGfPzCWZHIC4LFQu3LEZjq61Q
NTRxNgRvUwdifRWEAGYWZJdjJSWtnrDdoR3h446bv5WELGF2WDHv5kRs+NEkxkwK
fTHPRFMLAuai6nFiIEnSHfBbcZEH7R0R8+FKmoPYFz6KbU54EzJYDhv+DTjG713K
xqdfNTwyZhC3E9fxXZGGV1Jc/u/HlCuCRiGXIaUAoOz6PTZ6mR/rd8KhlwrzHFfS
Gazr/mOviYAiHzjdFGij3GOL2rgO/izMOEorPtH2bJj01VmmAsJygbZn9oSoSAEn
VxIAiAnT2ShiVuXUVxAvKGtKhu3x3Da1VychBYVw30jzkkgzvHU=
=Ykbm
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.1/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree updates
for 5.1, please pull the following:
- Dan relicenses the Luxul DTS files to GPL 2.0+/MIT
- Hao adds support for the Phicomm K3 which is a BCM4709 SoC with dual
BCM4366 radio
- Stefan adds support for the Raspberry Pi A+: binding and DTS files. He
also provides a bunch of DTC warning fixes for the different RPi DTS(i)
files and adds support for missing GPIO lines on RPi 2/3
* tag 'arm-soc/for-5.1/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm2835-rpi-zero-w: Drop unnecessary pinctrl
ARM: dts: bcm283x: Add missing GPIO line names
ARM: dts: bcm2837-rpi-3-b-plus: Clarify label for STATUS_LED
ARM: dts: bcm2837-rpi-3-b: Use consistent label for HDMI hotplug
ARM: dts: bcm2835: Fix labels for GPIO 0,1
ARM: dts: bcm2835-rpi: Drop unnecessary #address-cells/#size-cells
ARM: dts: bcm283x: Fix DTC warning for memory node
ARM: dts: add Raspberry Pi 3 A+
dt-bindings: bcm: Add Raspberry Pi 3 A+
ARM: dts: BCM5301X: Add basic DT for Phicomm K3
ARM: dts: BCM53573: Relicense Luxul files to the GPL 2.0+ / MIT
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
1. Extend support for Aries family of mobile devices (e.g. Samsung
Galaxy S) based on S5Pv210 SoC: DRM Rotator, FIMD, PWM vibrator,
power off, touchscreen, Broadcom BCM4329 Bluetooth and cpufreq.
2. Remove hardcoded bootargs on Galaxy S family (proper support in
U-Boot).
3. Fix minor DTC warnings.
4. Fix Exynos4412 Odroid X2/U3 conflicting eMMC GPIO settings and regulator
properties.
5. Fix the eMMC RTSN pin breaking proper reboot on X2.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAlxUmBoQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD115MD/wLf75FsakZ21mCRPmQ2DNhRzlZezCi75YH
7a/AO9j9I2+gL5Bg9oIHS/5l3YnZSDqYfBj61fzHIEp5lzD1UwVBJLUsDS00NKHt
B58/dH2V9pFj9ZyUDJj7MdMCrt7dNznGDOeztG8XRWd7AeoENP3ysDnjvd6FmGLY
2AgoTrql0cGzTwIcL7dTgg1dEdwSTPyQ1rXovAnF6ylRwFnts9xWRgdIm2/IAzHz
/vgdXzApFykWaoEH+5NIskNQZuGgDKi5zAT4h1yMcOamG7FxBRGzaWJiG+YhQC/M
c6wMaOZxnTRDOhLpcVsNS3i1FCIN6TtbAq0kMDz99v7o2RJm3AdroM+Hm4bXc4sU
JKk8PVufQxk37JIygUCBESwVVNhnX4ZzIGQSxX74k9rvLEYjdnzEU0o5s/69h/q+
1kK8t0/2CPVXKRKkNV7X0wAyLYoNtNh84v45Xyp0EJLHgMA2E2L2zojFqKISlilG
4ctnWG9se7PCGBVLAHAX1z2htMPQ0rHdSYi7U5Z5rJoRdVy96CcYMPXCtKxTtqea
02tNyXxi+bgizsQBSTpwG2+66p5vAIwA/PYLM4b6ZcTILmS0jjCZCUS6wfxYYa22
5Y37sPNSxjAOireg0QQJiBiiiHn+0qYakdw/t11zJ8tc2JDhDVD5tYaahpS8IH5g
NDHCIjBDZQ==
=9+iJ
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.1
1. Extend support for Aries family of mobile devices (e.g. Samsung
Galaxy S) based on S5Pv210 SoC: DRM Rotator, FIMD, PWM vibrator,
power off, touchscreen, Broadcom BCM4329 Bluetooth and cpufreq.
2. Remove hardcoded bootargs on Galaxy S family (proper support in
U-Boot).
3. Fix minor DTC warnings.
4. Fix Exynos4412 Odroid X2/U3 conflicting eMMC GPIO settings and regulator
properties.
5. Fix the eMMC RTSN pin breaking proper reboot on X2.
* tag 'samsung-dt-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Fix pinctrl definition for eMMC RTSN line on Odroid X2/U3
ARM: dts: exynos: Fix eMMC regulator properties on Odroid U3 boards
ARM: dts: exynos: Fix conflicting fixed-regulator GPIO flags and properties
ARM: dts: s3c2416: Fix xti node's missing reg property warning
ARM: dts: s5pv210: Fix onenand's unit address format warning
ARM: dts: s5pv210: Add DMC nodes
ARM: dts: s5pv210: Add support for more devices present on Aries
ARM: dts: s5pv210: Add reserved memory for MFC on Aries
ARM: dts: s5pv210: Remove hardcoded bootargs on Galaxy S and Fascinate 4G
ARM: dts: s5pv210: Use correct fimd variant
ARM: dts: s5pv210: Add node for exynos-rotator
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
improvements for rv1108 as well. RK3066 got support for the core
display components and the Edison tablet got its touchscreen added.
Apart from that a wider fix to drop display-wp usage from places where
it shouldn't be used, a pin fix for Edison and a cleanup to prevent
rk3036 board from defining sound-dai-cells for core components in
each board separately.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlxTAPIQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgYbQCACiWIYVLrOwOPSgDo3xRFygo2Bmlo2EncEz
UZM0z3gQpzQ8go7Ms6eqL7qRoMI14Cc3XT6dNkzjRBIBaJAi3LXy1G4CLMzxuurD
qri6shmJv94TfBNISJ9FOQYqJRxSK1z4ncp6iXNeOgOa9NCkqSXkHTOve8oVAxfj
nBnMAA0kkX/haF4pNaLoDUv3ppMi7UHjAuoyJMNaTFqVG9qjR1DPNBnCGdYZGacU
Xkb/9n/QOLsJc/yoMcUno+Q5tUVkLsxQVhsApf9Tf7Hd76WV0dgIzi0hENvoKJjK
TwfHz26NyNzw9KbX5YJmNGUAbgesjVBx5AXJk+pBZvrBWGUDtixE
=VDwG
-----END PGP SIGNATURE-----
Merge tag 'v5.1-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
New board the Elgin-R1 based on the rv1108 soc and a number of small
improvements for rv1108 as well. RK3066 got support for the core
display components and the Edison tablet got its touchscreen added.
Apart from that a wider fix to drop display-wp usage from places where
it shouldn't be used, a pin fix for Edison and a cleanup to prevent
rk3036 board from defining sound-dai-cells for core components in
each board separately.
* tag 'v5.1-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: clean up the abuse of disable-wp
ARM: dts: rv1108: Add support for rv1108-elgin-r1 board
dt-bindings: Add vendor prefix for elgin
ARM: dts: rockchip: rv1108: Add spim0 and spim1 pinctrl groups
ARM: dts: rockchip: Add missing dma-names SPI support for rv1108
ARM: dts: rockchip: add rk3066 vop display nodes
ARM: dts: rockchip: add focaltech touchscreen to rk3188-bqedison2qc
ARM: dts: rockchip: fix cif1_pdn pin on rk3188-bqedison2qc
ARM: dts: rockchip: add HCLK_HDMI to rk3066 vio power-domain
ARM: dts: rockchip: move rk3036 i2s sound-dail-cells into soc dtsi
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
mic input on da850 LCDK board.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJcVAHxAAoJEGFBu2jqvgRNKDsQAIQxTufIRkRxbd+diYCcMlas
9HINvZklP/Utqg4oo5tEaAH8An1E7AR67UcOwvCzFU4tN6vBMsnZN+oaBJ9Tsfbi
0fB5lld/WYAN/+4wQpv6lOI1A2kNohi9nKZLiwDvEhFFTevoeciS8Ypepl9h7Zr4
PyQ7xthz29vsbE8TzpFIs4225VrqFCjXMa5hzrDmuaj4Fn6wMBwhgnLbfW8plg2j
FzxZj1t5ZoOUIOkokdGXwcPMkY86cVc0ntEQLWy8lRqnX3zzpYbJ4zk7Fg4XH2wE
DzJSXeJIPO8nqN3XXmDYEXSmO0X3KRHam5ggVKtaQVPEur04AsJTaJqhUlQGKDi+
LmGXi0d/SGg581VPbsgF6rk9Suxzq6EPHZ6zkx1AFLnHfXzTSFOoUdgkQ7pqarM/
529dYiVrWztk3NB0mYCI3q30l7SIuKh9R8WlAXhAnHCb8v2467VKBvIXcPI3UrSz
OESTln6gl9ZKkkp6ZlGFfIWWTzdoSg2blO3izIjVVzvPDFF7J4Sa2/fHORGAJBlt
slFUEjc5PicXj60rG+1jRunGu0YLUjqvJFSJzH8nGnUsBbHhnFhf0/eYzC+Li+2R
pUk6U+7UP9rSdqUYYTw+U+wHzWGYcDxcBMjUg+qt6djFm2uGGyLAHujDyXnFyP5z
42t2Zt3tnsjJh22J/uTH
=6oqi
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v5.1/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into arm/dt
DaVinci device-tree updates for v5.1 contains a patch to enable analog
mic input on da850 LCDK board.
* tag 'davinci-for-v5.1/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850-lcdk: Enable the analog mic input
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This series contains board specific dts updates and few minor
clean-up changes:
- add stdout-path for am335x-chiliboard
- add wlcore wakeirq for omap3-evm, pandaboard and omap4-droid4
- remove unnecessary address-cells and io-cells for am33xx
- replace deprecated linux,wakeup with wakeup-source property
- use spdx license for am335x-shc
- configure ethernet pins for omap4-sdp
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlxTIEkRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXM2BA//cCf3AQJ3NsQu0Ptg8gA9KE7QgJGNS2Om
kyBr8lI5VKOS7BTNTvocplOTIzaAPLGivmQVlmcOl5AIk4CcfCjzo0Z67Z/9QM4Z
JMmcrhLR+R5Ha6xpWMq0C9fYnV4gbPmZExr+MIg8vOx65ln6j4yYATFNX+2pc7SN
BAXmj5AHr06CTKS6gjPYJ4Mb/YNNcf2WB2fgSmXff8TQ5zO75GnJU/RY80kdQyB4
aHD4KKg9exuRRJxf/mDnQMos6hkanUlciZ0I+QgIizL3/+z8T0psRjNIet5zoi/n
8yqlXT60T+C8t3s9KoVt7Ls2sdW5tZUz28V6Us7sYuEPi2BKXhaU5tm1mjrdRfTx
Iny+d/otKgGMjiuX040GUezzJMdZUz5N5Ah/WaGCgCpyvGMuIosqprGxnBBOH+pp
2sN8Quaq80x6kKkVFwrU1fsU4QsBlc2vqEXMb/DSZRnT+aQn8Eek6DB++nl/bHuy
RxlXR5xg/nFGN4XeFIlIEJjSEBYb6V+6erln4XkPPhbSE9v/Dj6ycFIF5W0B/lDB
gtOHhTH0kn154A3Wtx6BB6sntjRQ+mr8LX2CcfR18VPg3Jh4L0rjpxJ4niIt5VG5
dPIkZPIPHE3fqJTLSpD1yFydIg3xsLv5MZ1i5Tz2B4cOMgwwNoR/kUN9xZATThA4
NE+4kOVt3rU=
=6JIq
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.1/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
dts updates for omap variants for v5.1 merge window
This series contains board specific dts updates and few minor
clean-up changes:
- add stdout-path for am335x-chiliboard
- add wlcore wakeirq for omap3-evm, pandaboard and omap4-droid4
- remove unnecessary address-cells and io-cells for am33xx
- replace deprecated linux,wakeup with wakeup-source property
- use spdx license for am335x-shc
- configure ethernet pins for omap4-sdp
* tag 'omap-for-v5.1/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap4-sdp: Make ethernet working even if booted with latest u-boot
ARM: dts: am335x-shc.dts: Switch to SPDX identifier
ARM: dts: am437x: replace linux,wakeup with wakeup-source property
ARM: dts: am33xx: Remove unnecessary properties
ARM: dts: omap4-droid4: Configure wlcore wakeirq
ARM: dts: Configure wlcore wakeirq for pandaboard
ARM: dts: Add wlcore wakeirq for omap3-evm
ARM: dts: am335x-chiliboard: Add stdout-path property
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Maxime Ripard