Commit graph

15 commits

Author SHA1 Message Date
Mike Frysinger 5d002cce4c spi/bfin_spi: drop bits_per_word from client data
No other SPI controller has this field, and SPI clients should be setting
this up in their own drivers.  So drop it from the Blackfin controller to
keep people from using it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
2012-03-21 11:00:07 +08:00
Mike Frysinger ff7cbc4b5c Blackfin: ppi/spi/twi headers: add missing __BFP undef
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-25 04:54:33 -04:00
Mike Frysinger b9ac41e314 Blackfin: bfin_spi.h: add MMR peripheral layout
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-22 16:30:03 -04:00
Mike Frysinger 5e8592dca3 spi/bfin_spi: combine duplicate SPI_CTL read/write logic
While combining things, also switch to the proper SPI bit define names.
This lets us punt the rarely used SPI defines.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:39 -04:00
Barry Song d3cc71f71a spi/bfin_spi: redo GPIO CS handling
The common SPI layers take care of detecting CS conflicts and preventing
two devices from claiming the same CS.  This causes problems for the GPIO
CS support we currently have as we are using CS0 to mean "GPIO CS".  But
if we have multiple devices using a GPIO CS, the common SPI layers see
multiple devices using the virtual "CS0" and reject any such attempts.

To make both work, we introduce an offset define.  This represents the
max number of hardware CS values that the SPI peripheral supports.  If
the CS is below this limit, we know we can use the hardware CS.  If it's
above, we treat it as a GPIO CS.  This keeps the CS unique as seen by
the common code and prevents conflicts.

Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:36 -04:00
Mike Frysinger 0d2c6de225 Blackfin: SPI: expand SPI bitmasks
Expand the BIT_CTL defines to use the naming convention of the hardware,
and expand the masks to cover all documented bits.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:35 -04:00
Mike Frysinger 201bbc6fd8 spi/bfin_spi: drop custom cs_change_per_word support
As David points out, the cs_change_per_word option isn't standard, nor is
anyone actually using it.  So punt all of the dead code considering it
makes up ~10% of the code size.

Reported-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 02:49:30 -04:00
Robin Getz 96f1050d3d Blackfin: mass clean up of copyright/licensing info
Bill Gatliff & David Brownell pointed out we were missing some
copyrights, and licensing terms in some of the files in
./arch/blackfin, so this fixes things, and cleans them up.

It also removes:
 - verbose GPL text(refer to the top level ./COPYING file)
 - file names (you are looking at the file)
 - bug url (it's in the ./MAINTAINERS file)
 - "or later" on GPL-2, when we did not have that right

It also allows some Blackfin-specific assembly files to be under a BSD
like license (for people to use them outside of Linux).

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-07 04:36:26 -04:00
Yi Li e68d1ebc30 Blackfin: bf537-stamp: declare SPI IRQ resources
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-09-16 21:28:24 -04:00
Wolfgang Muees 93b61bddc1 Blackfin SPI Driver: Make mmc_spi driver work on Blackfin
1. Rewrite of the non-dma data transfer functions to use only ONE mode
   of TIMOD (TIMOD=0x1).  With TIMOD=0, it was not possible to set the TX
   bit pattern.  So the TDBR = 0xFFFF inside the read calls won't work.

2. Clear SPI_RDBR before reading and before duplex transfer.
   Otherwise the garbage data in RDBR will get read.  Since mmc_spi uses a
   lot of duplex transfers, this is the main cause of mmc_spi failure.

3. Poll RXS for transfer completion.  Polling SPIF or TXS cannot
   guarantee transfer completion.  This may interrupt a transfer before it
   is finished.  Also this may leave garbage data in buffer and affect
   next transfer.

[Yi Li <yi.li@analog.com>: add a field "u16 idle_tx_val" in "struct
bfin5xx_spi_chip" to specify the value to transmit if no TX value
is supplied.]
Signed-off-by: Wolfgang Muees <wolfgang.mues@auerswald.de>
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:06 -07:00
Michael Hennerich 42c78b2bf5 Blackfin SPI Driver: Add GPIO controlled SPI Slave Select support
Add support for GPIO controlled SPI Chip Selects.  To make use of this
feature, set chip_select = 0 and add a proper cs_gpio to your
controller_data.

struct spi_board_info
        .chip_select = 0

struct bfin5xx_spi_chip
        .cs_gpio = GPIO_P###

There are various SPI devices that require SPI MODE_0, and need to have
the Chip Selects asserted during the entire transfer.  Consider using
SPI_MODE_3 (SPI_CPHA | SPI_CPOL) if your device allows it.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:06 -07:00
Michael Hennerich 7513e006c6 Blackfin SPI Driver: Fix erroneous SPI Clock divisor calculation
Fix erroneous SPI Clock divisor calculation.  Make sure SPI_BAUD is always
>= 2.  Writing a value of 0 or 1 to the SPI_BAUD register disables the
serial clock.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Acked-by: David Brownell <dbrownell@users.sourceforge.net>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07 08:31:04 -07:00
Cliff Cai 1eb19e30ad Blackfin arch: sport spi needs 6 gpio pins
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2009-03-28 23:31:43 +08:00
Mike Frysinger 16daaf59c9 Blackfin arch: cleanup the header file comments
use scm changelog rather than comment blocks in files

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2009-01-07 23:14:38 +08:00
Bryan Wu 639f657145 Blackfin arch: move include/asm-blackfin header files to arch/blackfin
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-08-27 10:51:02 +08:00
Renamed from include/asm-blackfin/bfin5xx_spi.h (Browse further)