Ilias Daradimos
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6b96ba272d
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Update antenna components
Fix CAN annotation
Add MCU telemetry GPIO
Add OpAmp activation input
Add optocoupled activation input
Signed-off-by: Ilias Daradimos <judgedrid@gmail.com>
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2022-07-12 17:07:59 +03:00 |
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Ilias Daradimos
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920c27ce8e
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Add isolated kill switch
Rename CS pins
Signed-off-by: Ilias Daradimos <judgedrid@gmail.com>
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2022-06-10 17:57:28 +03:00 |
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Ilias Daradimos
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4fa8a92018
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Update BQ24013 symbol
Change MCU TCXO
Signed-off-by: Ilias Daradimos <ilias@libre.space>
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2022-05-20 14:37:50 +03:00 |
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Ilias Daradimos
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5d976e15a8
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PG to RST
Charger always on
Add fuse RBF
Recalculate DCDC RC
Signed-off-by: Ilias Daradimos <ilias@libre.space>
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2022-05-19 15:55:04 +03:00 |
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Ilias Daradimos
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f05a79bfc6
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Fix HLabels direction
Add fuse RBF
closes #21
Signed-off-by: Ilias Daradimos <ilias@libre.space>
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2022-05-19 14:21:39 +03:00 |
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Ilias Daradimos
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0ba5d4e8ac
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Update part numbers
Signed-off-by: Ilias Daradimos <ilias@libre.space>
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2022-05-12 14:55:55 +03:00 |
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Ilias Daradimos
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427ce69151
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Update part numbers
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2022-04-11 17:03:21 +00:00 |
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Agis Zisimatos
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6dba8e700b
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Replace single resistors with resistor network
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2022-04-11 09:58:56 +00:00 |
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Ilias Daradimos
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8eca352efe
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Restore footprints
Add RBF diode
Signed-off-by: Ilias Daradimos <ilias@libre.space>
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2022-04-08 14:09:25 +03:00 |
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Agis Zisimatos
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62e9a7579b
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Add SERDES bank and connect supply voltaged to GND
* Add a fpga-power sheet
* Add auto updated kicad files
Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
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2022-04-08 11:28:44 +03:00 |
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Agis Zisimatos
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791fa839b6
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Remove unused test points
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2022-04-07 17:52:45 +00:00 |
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Ilias Daradimos
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d9640c0ea0
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Add RBF/Kill ports
Add can footprint
Signed-off-by: Ilias Daradimos <ilias@libre.space>
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2022-04-06 23:27:16 +03:00 |
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Agis Zisimatos
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5754075d13
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Add changes of auto updated KiCad files
Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
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2022-04-06 18:50:03 +03:00 |
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Ilias Daradimos
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80eade29ba
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Change battery footprint
Signed-off-by: Ilias Daradimos <ilias@libre.space>
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2022-04-05 16:00:20 +03:00 |
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Agis Zisimatos
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be0d0789f9
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Add FPGA_INIT to MCU, fixes #13
Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
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2022-04-05 11:27:50 +03:00 |
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Papadeas Pierros
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929c19d30a
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Fix PWR flag
Signed-off-by: Papadeas Pierros <pierros@papadeas.gr>
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2022-03-30 16:37:00 +03:00 |
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Agis Zisimatos
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f524588635
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Fix footprints that changed by previous commit
Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
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2022-03-30 11:38:37 +03:00 |
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Agis Zisimatos
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95c29a28e7
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Add current limit resistor value
Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
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2022-03-29 19:05:22 +03:00 |
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Papadeas Pierros
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8fbf9d13b1
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Assign footprints for power and mcu.
Signed-off-by: Papadeas Pierros <pierros@papadeas.gr>
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2022-03-29 16:55:13 +03:00 |
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Ilias Daradimos
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055c01d8fa
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Move GND power flag to top sheet
Update symbols
Signed-off-by: Ilias Daradimos <ilias@libre.space>
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2022-03-22 13:23:56 +02:00 |
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Ilias Daradimos
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b8ad60e557
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Reanotate sheets
Update symbol and port direction
Signed-off-by: Ilias Daradimos <ilias@libre.space>
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2022-03-22 12:29:50 +02:00 |
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Papadeas Pierros
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046229765a
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Add interfaces between modules (closes #1)
Signed-off-by: Papadeas Pierros <pierros@papadeas.gr>
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2022-03-16 20:03:26 +02:00 |