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  • 0b5a8b533e Merge branch 'fix-pn' into 'master' Agis Zisimatos 2022-07-29 13:22:33 +0000
  • 250e636a27 Fix PN in TRX spacecruft master Agis Zisimatos 2022-07-29 16:18:53 +0300
  • eb145c187c Merge branch 'master' into 'master' Vasilis Tsiligiannis 2022-07-27 10:55:36 +0000
  • d734fccc39 gitlab-ci: Make sure commits are signed-off before merge Vasilis Tsiligiannis 2022-07-27 13:54:18 +0300
  • 8c7928784c Merge branch 'fixes-net-names' into 'master' Agis Zisimatos 2022-07-19 11:55:37 +0000
  • 65e89930fc Merge branch 'Sync' into 'master' Ilias Daradimos 2022-07-19 11:53:14 +0000
  • bc2c925c7a Fixes in net names, PN, new hierirchical labels Agis Zisimatos 2022-07-19 14:47:11 +0300
  • 40de4742d5 Sync components Ilias Daradimos 2022-07-19 14:47:28 +0300
  • 656ce20ecb Merge branch 'trx-power-fixes' into 'master' Agis Zisimatos 2022-07-15 11:10:34 +0000
  • cb77450ceb Add RC to delay the enable of 2V5 LDO Agis Zisimatos 2022-07-15 13:41:11 +0300
  • 871bc8ed23 Replace load switches Agis Zisimatos 2022-07-13 17:48:41 +0300
  • c7089477b5 Merge branch 'AR6_modifications' into 'master' Ilias Daradimos 2022-07-12 14:11:57 +0000
  • 6b96ba272d Update antenna components Fix CAN annotation Add MCU telemetry GPIO Add OpAmp activation input Add optocoupled activation input Ilias Daradimos 2022-07-12 17:07:59 +0300
  • d6878d963f Merge branch 'isolate-kill' into 'master' Ilias Daradimos 2022-06-14 11:19:19 +0000
  • c06d90993a Reannotate Rename port pins Ilias Daradimos 2022-06-14 14:17:59 +0300
  • 920c27ce8e Add isolated kill switch Rename CS pins Ilias Daradimos 2022-06-10 17:57:28 +0300
  • 6f073c7afb Merge branch 'rbf-should-reset-the-latching-mechanism' into 'master' Ilias Daradimos 2022-06-03 09:22:12 +0000
  • 70bf9afa9e Redesign RBF Ilias Daradimos 2022-05-23 16:17:20 +0300
  • 72672524aa Merge branch 'corrections' into 'master' Ilias Daradimos 2022-05-20 12:21:52 +0000
  • 4fa8a92018 Update BQ24013 symbol Change MCU TCXO Ilias Daradimos 2022-05-20 14:37:50 +0300
  • 474bf76a6f Merge branch 'corrections' into 'master' Ilias Daradimos 2022-05-19 14:33:16 +0000
  • 0bc5d44dd0 Remove VSEL Ilias Daradimos 2022-05-19 17:16:49 +0300
  • 5d976e15a8 PG to RST Charger always on Add fuse RBF Recalculate DCDC RC Ilias Daradimos 2022-05-19 15:55:04 +0300
  • f05a79bfc6 Fix HLabels direction Add fuse RBF closes #21 Ilias Daradimos 2022-05-19 14:21:39 +0300
  • 16a433d4bf Merge branch 'part-numbers' into 'master' Ilias Daradimos 2022-05-12 13:49:43 +0000
  • 0ba5d4e8ac Update part numbers Ilias Daradimos 2022-05-12 14:55:55 +0300
  • 081ea2e201 Merge branch 'update-bom' into 'master' Agis Zisimatos 2022-05-02 11:24:15 +0000
  • efe1cafcf9 Update BOM and delete wrong part description Agis Zisimatos 2022-05-02 14:22:23 +0300
  • f6ffd0f256 Merge branch 'exclude-tp-from-bom' into 'master' Agis Zisimatos 2022-04-30 17:25:44 +0000
  • d2c2e2270d Exclude test points form BOM Agis Zisimatos 2022-04-30 20:24:41 +0300
  • ee12150866 Merge branch 'fpga-spi-series-reristors' into 'master' Agis Zisimatos 2022-04-30 11:22:28 +0000
  • 276cab3b18 Fix connections in RN601 that helps in routing Agis Zisimatos 2022-04-30 14:21:21 +0300
  • c4b101cd22 Merge branch 'fpga-spi-series-reristors' into 'master' Agis Zisimatos 2022-04-30 10:20:45 +0000
  • a8ec6c893f Add in series termination in FPGA SPI Agis Zisimatos 2022-04-30 13:18:47 +0300
  • f7c21e4413 Merge branch 'fix-fpga-clock-in-pins' into 'master' Agis Zisimatos 2022-04-30 08:45:43 +0000
  • b07c5fff98 Fix clock-in pins Agis Zisimatos 2022-04-30 11:28:11 +0300
  • 32db2b03d8 Merge branch 'various-fixes' into 'master' Agis Zisimatos 2022-04-26 11:02:41 +0000
  • 9d9a499b54 Add hierarchical label FPGA_3V3 to use it in JTAG Agis Zisimatos 2022-04-26 13:55:56 +0300
  • 5b0f13295b Add missing capacitor to VCCIO bank-3 Agis Zisimatos 2022-04-26 13:46:57 +0300
  • 05aedba620 Change SPI CLK pin to L18 from M20 Agis Zisimatos 2022-04-26 13:31:17 +0300
  • 64f6e326a8 Merge branch 'add-debug-fpga-led' into 'master' Agis Zisimatos 2022-04-19 16:49:29 +0000
  • 9b03d488d5 Add debug LED of FPGA Agis Zisimatos 2022-04-19 19:47:58 +0300
  • 23655a625f Merge branch 'fpga-changes-for-routing' into 'master' Agis Zisimatos 2022-04-19 11:59:27 +0000
  • 651edca938 Split RN in NOR flash to single R's Agis Zisimatos 2022-04-18 23:01:59 +0300
  • c8a1410dfc Swap pins in RN of JTAG Agis Zisimatos 2022-04-18 15:34:41 +0300
  • b143aba082 Add Bank-3 of FPGA for SPI Agis Zisimatos 2022-04-18 15:14:00 +0300
  • 427ce69151 Update part numbers Ilias Daradimos 2022-04-11 17:03:21 +0000
  • 5a30b46028 Merge branch 'part-numbers' into 'master' Ilias Daradimos 2022-04-11 17:02:46 +0000
  • 96aa4bfa00 Rebase fix Ilias Daradimos 2022-04-11 20:01:47 +0300
  • 361f90304d Excldue jumpers from BOM Ilias Daradimos 2022-04-11 19:43:40 +0300
  • edf14592c1 Remove deundant fields Ilias Daradimos 2022-04-11 19:13:35 +0300
  • c957ae278b Update part numbers Ilias Daradimos 2022-04-11 18:46:16 +0300
  • d9c7958004 Merge branch 'fix-erc' into 'master' Agis Zisimatos 2022-04-11 10:28:46 +0000
  • 892b8d7188 Fix ERC errors of high level schematic Agis Zisimatos 2022-04-11 13:27:38 +0300
  • 6dba8e700b Replace single resistors with resistor network Agis Zisimatos 2022-04-11 09:58:56 +0000
  • 916497c9d7 Merge branch 'add-rn' into 'master' Agis Zisimatos 2022-04-11 09:58:03 +0000
  • 19fe267170 Add auto updated files Agis Zisimatos 2022-04-11 12:53:40 +0300
  • fe7d70a941 Replace single resistors with resistor network Agis Zisimatos 2022-04-11 12:52:16 +0300
  • 3b932b97a6 Merge branch 'fix-fpga-annotation' into 'master' Agis Zisimatos 2022-04-08 15:12:49 +0000
  • 0ea9754b22 Fix FPGA symbol anotation and footprint Agis Zisimatos 2022-04-08 17:36:42 +0300
  • d075bfcd7e Merge branch 'dev-power' into 'master' Ilias Daradimos 2022-04-08 13:06:01 +0000
  • 8eca352efe Restore footprints Add RBF diode Ilias Daradimos 2022-04-08 14:09:25 +0300
  • 72e6b07943 Merge branch 'handle-unused-fpga-pins' into 'master' Agis Zisimatos 2022-04-08 08:30:32 +0000
  • 62e9a7579b Add SERDES bank and connect supply voltaged to GND Agis Zisimatos 2022-04-08 11:28:44 +0300
  • 791fa839b6 Remove unused test points Agis Zisimatos 2022-04-07 17:52:45 +0000
  • 13bb9da524 Merge branch 'remove-unused-tp' into 'master' Agis Zisimatos 2022-04-07 17:51:51 +0000
  • 504acedc82 Add auto update schematics Agis Zisimatos 2022-04-07 20:49:40 +0300
  • e23d13596f Remove unused test points Agis Zisimatos 2022-04-07 20:49:09 +0300
  • aadc9285d5 Merge branch 'diode-1' into 'master' Pierros Papadeas 2022-04-07 12:32:02 +0000
  • cb2ff9e057 Replace diode footprints and jumpers in CAN Papadeas Pierros 2022-04-07 15:30:01 +0300
  • 4b418ecbc0 Merge branch 'dev-power' into 'master' Ilias Daradimos 2022-04-07 08:25:15 +0000
  • 3ea2211549 Update footprints Ilias Daradimos 2022-04-07 11:21:18 +0300
  • 4e1e3e1a00 Merge branch 'dev-power' into 'master' Ilias Daradimos 2022-04-07 08:10:41 +0000
  • 17e77121dc Add latching mechanism Ilias Daradimos 2022-04-07 11:07:47 +0300
  • d9640c0ea0 Add RBF/Kill ports Add can footprint Ilias Daradimos 2022-04-06 23:27:16 +0300
  • bac5545195 Merge branch 'fpga-power-capacitors' into 'master' Agis Zisimatos 2022-04-06 16:21:19 +0000
  • 21e81aed53 Fix connection of INITN and DONE Agis Zisimatos 2022-04-06 19:10:52 +0300
  • 5754075d13 Add changes of auto updated KiCad files Agis Zisimatos 2022-04-06 18:45:01 +0300
  • 625d39c64e Add missing pull-up resistor Agis Zisimatos 2022-04-05 17:56:27 +0300
  • 94313541b0 Clean up the FPGA schematic from comments Agis Zisimatos 2022-04-05 17:29:00 +0300
  • bdd3c06adf Add decoupling capacitors in FPGA schematic Agis Zisimatos 2022-04-05 16:31:59 +0300
  • d5fdec65ab Merge branch 'power-update' into 'master' Ilias Daradimos 2022-04-05 13:15:46 +0000
  • 80eade29ba Change battery footprint Ilias Daradimos 2022-04-05 16:00:20 +0300
  • 4c8ca0a0ec Merge branch 'power-update' into 'master' Ilias Daradimos 2022-04-05 11:44:04 +0000
  • cf1e87d61d Assign footprints Ilias Daradimos 2022-04-05 14:39:51 +0300
  • a6599188ac Merge branch 'fpga-schematic' into 'master' Agis Zisimatos 2022-04-05 08:30:29 +0000
  • be0d0789f9 Add FPGA_INIT to MCU, fixes #13 Agis Zisimatos 2022-04-05 11:27:50 +0300
  • c3122ab59c Add oscillator in FPGA Agis Zisimatos 2022-04-04 19:22:44 +0300
  • fb9e050bc9 Add test points for GPIOs Agis Zisimatos 2022-04-04 17:55:38 +0300
  • 8b5c631826 Add MSPI as default boot mode and NOR flash Agis Zisimatos 2022-04-04 16:50:18 +0300
  • 0e86bb6f49 Add LED indicators for DONE and INITN Agis Zisimatos 2022-04-04 15:21:31 +0300
  • 84e1cc8608 Implement FPGA JTAG Agis Zisimatos 2022-04-04 14:01:09 +0300
  • e749327cc2 Place I/Q and SPI of FPGA Agis Zisimatos 2022-04-03 12:52:35 +0300
  • c279a5655f Merge branch 'antenna_deployment' into 'master' aris12 2022-04-04 14:56:57 +0000
  • 51240ee009 add antenna deployment aris12 2022-04-04 17:42:48 +0300
  • e76ce376e0 Add auto generated Kicad changes aris12 2022-04-04 17:52:47 +0300
  • bb12c5e8ad Merge branch 'expose_pv' into 'master' Pierros Papadeas 2022-04-01 07:47:54 +0000
  • bd4ef8fe52 Expose PV as top level sheet Papadeas Pierros 2022-04-01 10:46:44 +0300
  • 0cf330f834 Merge branch 'power_flag_fix' into 'master' Pierros Papadeas 2022-03-30 13:37:22 +0000
  • 929c19d30a Fix PWR flag Papadeas Pierros 2022-03-30 16:37:00 +0300