Agis Zisimatos
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c9c6807e57
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Fix interface with MCU breadboard
Fixes #19
Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
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2022-04-07 19:01:15 +03:00 |
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Agis Zisimatos
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b4a8816f07
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Add PQ9ish template
Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
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2022-04-07 13:42:06 +03:00 |
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Agis Zisimatos
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751f54fc0b
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Initialize schematics and define connectors
Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
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2022-04-06 21:10:42 +03:00 |
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Vasilis Tsiligiannis
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e14ddaa453
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Add LSF contribution guide
Signed-off-by: Vasilis Tsiligiannis <acinonyx@openwrt.gr>
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2022-03-28 10:28:46 +03:00 |
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Vasilis Tsiligiannis
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a097141eab
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Add SIDLOC schematic as a submodule
Signed-off-by: Vasilis Tsiligiannis <acinonyx@openwrt.gr>
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2022-03-15 18:37:42 +02:00 |
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Vasilis Tsiligiannis
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1f24b26fbe
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Initialize empty KiCad project
Signed-off-by: Vasilis Tsiligiannis <acinonyx@openwrt.gr>
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2022-03-15 18:35:16 +02:00 |
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Vasilis Tsiligiannis
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38b7e0ee2e
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Add license file
Signed-off-by: Vasilis Tsiligiannis <acinonyx@openwrt.gr>
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2022-03-15 18:30:30 +02:00 |