TEE Client API defines that from user space only information needed for
specified login operations is group identifier for group based logins.
REE kernel is expected to formulate trustworthy client UUID and pass that
to TEE environment. REE kernel is required to verify that provided group
identifier for group based logins matches calling processes group
memberships.
TEE specification only defines that the information passed from REE
environment to TEE environment is encoded into on UUID.
In order to guarantee trustworthiness of client UUID user space is not
allowed to freely pass client UUID.
UUIDv5 form is used encode variable amount of information needed for
different login types.
Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
(cherry picked from commit baa151f2924f09c8042ba627dc3b11bc0d6633b4)
TEE Client introduce a new capability "TEE_GEN_CAP_MEMREF_NULL"
to handle the support of the shared memory buffer with a NULL pointer.
This capability depends on TEE Capabilities and driver support.
Driver and TEE exchange capabilities at driver initialization.
Signed-off-by: Michael Whitfield <michael.whitfield@nxp.com>
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Tested-by: Joakim Bech <joakim.bech@linaro.org> (QEMU)
(cherry picked from commit 1149e7d06a009e5dacf6aaa29bd087da64bfbed2)
Fix a potention null-pointer dereference in nwl_dsi_probe, found by a
Coverity scan.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Reviewed-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Fix a possible overflow (at least a theoretical one, since a mode's
clock could never be near the MAX_INT in order to generate an overflow
when multiplied by 1000) in mxsfb_pipe_mode_valid function.
This overflow was discovered by Coverity scan.
Fixes: 7bfb905f8e ("Add max-memory-bandwidth property for MXSFB")
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Reviewed-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Fix a possible null-pointer dereference found in imx8mq_dsi_select_input
by Coverity scan.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Reviewed-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Coverity issue ID: 379372
As only one overlayer supported, the initialization for ol_param
need to be adjusted accordingly.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 13dcde085e1d017440e3f0bc829faac340a8674e)
Fixed the coverity issue ID 9536729
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
(cherry picked from commit 8367d7255888848d5fdd45b95bf2094152d06470)
It is useful to support UAS storage device, and both our USB3 controllers
could support it.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Indicate the controller has stream capability, it is useful for UAS
device.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Add support for USBH1 on imx8qm, USBH1 is a HSIC controller
Reviewed-by: Jun Li <jun.li@nxp.com>
CC: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Alifer Moraes <alifer.moraes@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
If SPI is probed before the GPIO driver, it may miss the cs-gpio
configuration in dtb.
Add defer probe handler to wait GPIO driver probe.
Signed-off-by: Fabrice Goucem <fabrice.goucem@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Calling the spi_register function prematurely will cause a warning
dump if the probe fails after calling the devm_spi_register_controller
function.
So put devm_spi_register_controller() at the end of probe function.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Add the missing calling of the pm_runtime_put_xxx() to ensure pm_runtime
functions use in pairs.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
shall trigger dummy draw when update gpu mmu setup,
the problem is caused by 8mp vip errata workaround.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Those files need have GPL license align with linux kernel. This is introduced by
VIP HW errata workaround.
Removed VSI private license and add GPL license.
Signed-off-by: Ella Feng <ella.feng@nxp.com>
there may be some redundant data before the encoded frame,
generally it won't bring any problem.
but on android, the redundant data may affect the mux,
can cause the mp4 can't be decoded.
so delete the redundant data in the driver.
Signed-off-by: Ming Qian <ming.qian@nxp.com>
Depending on sample rate the PDM must be clocked at either 24.576MHz or
22.5792MHz. CLK_DIV is later calculated as function of PDM root clock
frequency and FS. Setting PDM root clock = FS * 1024 is wrong because
for low sample rate such as 8000 the PDM root clock will be 8000 * 1024
= 8192000 Hz so PDM will be underclocked for this sample rate.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
In probe stage, setting "emvsim_dev.parent = &pdev->dev" after error
report which is unreasonable, this patch fixes this issue.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Add error check when enable clk and register misc device at the end of
probe stage. This patch just improve and clean up the code, no function
change.
Fixes: commit d494420149 ("MLK-23793-2 mxc: emvsim: add runtime pm support")
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
The commit f90580ca01 ("[media] videodev2: Set vb2_rect's width
and height as unsigned") changes the width and height fields of
struct v4l2_rect from type __s32 to type __u32, which makes Coverity
complain that it's unnecessary for the platform driver to check on
the fields to ensure they are not less than zero. This patch removes
the check to make Coverity happy.
This fixes Coverity issue: CID 9176743.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
- Verify the both internal PLL_SYS and external OSC reference clock
modes on iMX8MP EVK board, and pass the PCIe compliance tests.
- Remove the no-needed bypass setting.
- PHY configration should be completed before CMN_RSTN is set to 1b1
- To manually initiate the speed change to make sure GEN2 is linked up:
- Write to LINK_CONTROL2_LINK_STATUS2_REG.PCIE_CAP_TARGET_LINK_SPEED
in the local device
- De-assert GEN2_CTRL_OFF.DIRECT_SPEED_CHANGE in the local device
- Assert GEN2_CTRL_OFF.DIRECT_SPEED_CHANGE in the local device
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Verify the PCIe PLL_SYS reference clock source on EVK board.
The external OSC clock is used as PCIe REF clock source in default.
- sequence should be the following one.
phy configuration--> CMN_RSTN--> wait for pll lock
- add the calibrate callback to fit the correct init sequence of phy
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Update the clock modes of iMX8MP PCIe PHY in binding DOC.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Verify the PCIe PLL_SYS reference clock source on EVK board.
The external OSC clock is used as PCIe REF clock source in default.
NOTE: Change the ext_osc of pcie/pcie_phy to '0' when enable SYS_PLL
clock mode.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
81fb06cb6b ("remoteproc: Fall back to using parent memory pool if no dedicated available")
breaks i.MX7ULP SD Boot.
i.MX7ULP not use vdevbuffer for communication between Acore and Mcore.
However we still use memory-region for vring. Because we added
"shared-dma-pool" to the resered region, so when vdevbuffer not found,
the memory-region will be used for the virtio data buffer.
So to fix the issue, we could remove "shared-dma-buffer" to avoid
the area to be used to data buffer, then it will still use global
dma area for data buffer.
Tested-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Change configuration to "tristate", add module device table,
author, description and license to support building i.MX8DXL
pinctrl driver as module.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Change configuration to "tristate", add module device table,
author, description and license to support building i.MX8QM
pinctrl driver as module.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Change configuration to "tristate", add module device table,
author, description and license to support building i.MX8QXP
pinctrl driver as module.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Change configuration to "tristate", add module device table,
author, description and license to support building i.MX8MP
pinctrl driver as module.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Change configuration to "tristate", add module device table,
author, description and license to support building i.MX8MQ
pinctrl driver as module.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Change configuration to "tristate", add module device table,
author, description and license to support building i.MX8MN
pinctrl driver as module.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Change configuration to "tristate", add module device table,
author, description and license to support building i.MX8MM
pinctrl driver as module.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Export necessary APIs to support i.MX8 SoC pinctrl drivers built
as module.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Export APIs and add module author, description and license to
support module build.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Add module author, description and license to support module build.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Add module author, description and license to support module build.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Add module author, description and license to support module build.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Add module author, description and license to support module build.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Export APIs and add module license to support i.MX8 SoCs clock
driver to be built as module.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Vesa Jääskeläinen