Commit graph

718537 commits

Author SHA1 Message Date
Oliver Brown 14cf8bbc84 MLK-16524 drm/bridge: it6263: Fix incorrect colors
This addresses a problem with colors that are sometimes incorrect after
startup. Now the AVI packet is initialized with RGB color space rather
than relying on the default.

Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
2018-10-29 11:10:38 +08:00
Fancy Fang 22680b3e9f MLK-16375-3 video: fbdev: dcss: add '__maybe_unused' to 'fill_db'
The function 'fill_db()' is not used at this moment
which caused gcc compiler generate the build warning:

"‘fill_db’ defined but not used [-Wunused-function]"

So add attribute '__maybe_unused' to 'fill_db()' functon
definition to avoid this build warning.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
2018-10-29 11:10:38 +08:00
Fancy Fang f94ff062c5 MLK-16375-2 Revert "MLK-16349 video: fbdev: dcss: reset dcss domains before clock source config"
The reverted patch is to workaround a hang issue which is caused
by DCSS reset control bug in 'Block Control' submodule. But this
workaround may cause another issue on some boards. So revert it.

This reverts commit 2d22e932664dc0347dc279a5588834a29aec47ce.

(cherry picked from commit 6f1ae20eb4a12af5179d859890fa32d5042a17cd)
2018-10-29 11:10:38 +08:00
Fancy Fang b37b283b67 MLK-16375-1 Revert "MLK-16255-2 video: fbdev: dcss: use 'db' of ctxld to config DTG"
For A0 soc, on some boards, using double buffer to load
DTG configs may cause ctxld timeout. This may be an IC
bug, so revert this patch to avoid trigger this timeout
isssue.

This reverts commit b9ea3e85d40da5d260b7558a7d3df4ae24db4e8b.

(cherry picked from commit 800911f4befc1ce6bc92e01e2494e61ac69b46e5)
2018-10-29 11:10:38 +08:00
Anson Huang 4f85b4294a MLK-16526-2 thermal: qoriq: add buffer for passive cooling mechanism
On i.MX8MQ, When temperature exceeds passive point,
the cooling mechanism will be trigger and temperature
will begin to drop, to avoid back and forth surrounding
the passive point, here adds 10 C buffer for passive point,
that means when cooling mechanism is trigger, only after
the temperature drop to 10 C below the passive point,
the cooling mechanism will exit.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
2018-10-29 11:10:38 +08:00
Anson Huang 1c89dc608d MLK-16526-1 thermal: imx_sc: add buffer for passive cooling mechanism
On i.MX8QM/8QXP, When temperature exceeds passive point,
the cooling mechanism will be trigger and temperature
will begin to drop, to avoid back and forth surrounding
the passive point, here adds 10 C buffer for passive point,
that means when cooling mechanism is trigger, only after
the temperature drop to 10 C below the passive point,
the cooling mechanism will exit.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
2018-10-29 11:10:38 +08:00
Michał Mirosław 548a19445f mmc: block: fix lockdep splat when removing mmc_block module
Fix lockdep splat introduced in v4.13-rc4.

[  266.297226] ------------[ cut here ]------------
[  266.300078] WARNING: CPU: 2 PID: 176 at /mnt/src/jaja/git/tf300t/include/linux/blkdev.h:657 mmc_blk_remove_req+0xd0/0xe8 [mmc_block]
[  266.302937] Modules linked in: mmc_block(-) sdhci_tegra sdhci_pltfm sdhci pwrseq_simple pwrseq_emmc mmc_core
[  266.305941] CPU: 2 PID: 176 Comm: rmmod Tainted: G        W       4.13.0-rc4mq-00208-gb691e67724b8-dirty #694
[  266.308852] Hardware name: NVIDIA Tegra SoC (Flattened Device Tree)
[  266.311719] [<b011144c>] (unwind_backtrace) from [<b010ca54>] (show_stack+0x18/0x1c)
[  266.314664] [<b010ca54>] (show_stack) from [<b062e3f4>] (dump_stack+0x84/0x98)
[  266.317644] [<b062e3f4>] (dump_stack) from [<b01214f4>] (__warn+0xf4/0x10c)
[  266.320542] [<b01214f4>] (__warn) from [<b01215d4>] (warn_slowpath_null+0x28/0x30)
[  266.323534] [<b01215d4>] (warn_slowpath_null) from [<af067858>] (mmc_blk_remove_req+0xd0/0xe8 [mmc_block])
[  266.326568] [<af067858>] (mmc_blk_remove_req [mmc_block]) from [<af068f40>] (mmc_blk_remove_parts.constprop.6+0x50/0x64 [mmc_block])
[  266.329678] [<af068f40>] (mmc_blk_remove_parts.constprop.6 [mmc_block]) from [<af0693b8>] (mmc_blk_remove+0x24/0x140 [mmc_block])
[  266.332894] [<af0693b8>] (mmc_blk_remove [mmc_block]) from [<af0052ec>] (mmc_bus_remove+0x20/0x28 [mmc_core])
[  266.336198] [<af0052ec>] (mmc_bus_remove [mmc_core]) from [<b046aa64>] (device_release_driver_internal+0x164/0x200)
[  266.339367] [<b046aa64>] (device_release_driver_internal) from [<b046ab54>] (driver_detach+0x40/0x74)
[  266.342537] [<b046ab54>] (driver_detach) from [<b046982c>] (bus_remove_driver+0x68/0xdc)
[  266.345660] [<b046982c>] (bus_remove_driver) from [<af06ad40>] (mmc_blk_exit+0xc/0x2cc [mmc_block])
[  266.348875] [<af06ad40>] (mmc_blk_exit [mmc_block]) from [<b01aee30>] (SyS_delete_module+0x1c4/0x254)
[  266.352068] [<b01aee30>] (SyS_delete_module) from [<b0108480>] (ret_fast_syscall+0x0/0x34)
[  266.355308] ---[ end trace f68728a0d3053b72 ]---

Fixes: 7c84b8b43d ("mmc: block: bypass the queue even if usage is present for hotplug")
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 3f8b23a09a)
2018-10-29 11:10:38 +08:00
Anson Huang d7cc6f0085 MLK-16495 ARM64: dts: freescale: imx8qm: add mek board support
Add i.MX8QM MEK board support.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
2018-10-29 11:10:38 +08:00
Zhengyu Shen cc929c3a5f MLK-16359-3: Added i.MX8 CAST IP JPEG Encoder/Decoder Linux V4L2 driver v2
mxc-jpeg driver creates two v4l2 file handles in /dev/ which allows them to be used
by v4l2 programs. Supports encode and decode of various formats.

Note: Output data is not correct but matches validation result because IP Bug
TKT340836

v2: Split patches, added copyright

Signed-off-by: Zhengyu Shen <zhengyu.shen_1@nxp.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
2018-10-29 11:10:38 +08:00
Zhengyu Shen f661ae56df MLK-16359-2: Change clock power domain for JPEG Encoder/Decoder to match DTS
Clocks use power domains from DTS.

Signed-off-by: Zhengyu Shen <zhengyu.shen_1@nxp.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
2018-10-29 11:10:38 +08:00
Zhengyu Shen 930d84608c MLK-16359-1: Added i.MX8 CAST IP JPEG Encoder/Decoder Linux to DTS
Adds device tree files for JPEG decoder and encoder to device tree.

Signed-off-by: Zhengyu Shen <zhengyu.shen_1@nxp.com>
Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
2018-10-29 11:10:38 +08:00
Peter Chen 9e71ef5fb2 MLK-16285-6 usb: cdns3: add more operatons at cdns3_remove
Add PHY shutdown and clock disable operations at cdns3_remove.

Signed-off-by: Peter Chen <peter.chen@nxp.com>
Acked-by: Li Jun <jun.li@nxp.com>
2018-10-29 11:10:38 +08:00
Peter Chen af73fc0bc7 MLK-16285-4 usb: cdns3: change controller role state machine
Since the USB Type-C port only has two data roles, host and device,
the controller driver can only receive above two events, it can't
remain 'disconnection' state alone at controller driver due to there
is no such event from Type-C.

Due to above, we delete the controller state "CDNS3_ROLE_END" which
stands for 'disconnection' state before. Instead, when we use
"CDNS3_ROLE_GADGET" stands for it, and this state is the default
state for controller.

Signed-off-by: Peter Chen <peter.chen@nxp.com>
Acked-by: Li Jun <jun.li@nxp.com>
2018-10-29 11:10:38 +08:00
Peter Chen 75f6c64125 MLK-16285-3 usb: cdns3: core: move INIT_WORK before cdns3_register_extcon
At the extcon notifier, it will queue a work item, so we need to
make sure the work is initialized before it is used.

Signed-off-by: Peter Chen <peter.chen@nxp.com>
Acked-by: Li Jun <jun.li@nxp.com>
2018-10-29 11:10:38 +08:00
Peter Chen dbb7fba24e MLK-16285-2 staging: typec: tcpci: add optional reset pin support
Some USB3 differential channel switch chips need to do reset before
functional, we add this support here.

Signed-off-by: Peter Chen <peter.chen@nxp.com>
Acked-by: Li Jun <jun.li@nxp.com>
2018-10-29 11:10:38 +08:00
Peter Chen 82d23ff109 MLK-16285-1 staging: typec: tcpci: move request interrupt to the end of probe
The tcpci_irq may visit tcpci->port if unexpected interrupt occurs
(eg, board design issue causes GPIO status is incorrect) and cause
NULL pointer dereference issue.

Besides, delete clear TCPC_ALERT and TCPC_ALERT_MASK code which are
already done at tcpci_init.

Signed-off-by: Peter Chen <peter.chen@nxp.com>
Acked-by: Li Jun <jun.li@nxp.com>
2018-10-29 11:10:38 +08:00
Robin Gong 0e73380335 MLK-16482: dma: fsl-edma-v3: Fix RCU issue while playing Audio
That's caused by commit 593034f1b908 ("MLK-16437: dma: fsl-edma-v3:
fix kernel crash while edma interrupt trigger after channel disabled").
Because fsl_chan->vchan.lock will be hold always and trigger RCU report
as below:

1571.3  Playing WAVE '/mnt/nfs/vte_mx82/../test_stream/esai_stream/48k16bit-six.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Channels 6
1571.5  [ 4642.698771] INFO: rcu_preempt detected stalls on CPUs/tasks:
1571.6  [ 4642.704443] 0-...: (1 GPs behind) idle=2c5/140000000000000/0 softirq=155373/155374 fqs=2541
1571.7  [ 4642.712967] (detected by 2, t=5252 jiffies, g=104259, c=104258, q=22)
1571.8  [ 4642.719501] Task dump for CPU 0:
1571.9  [ 4642.722724] aplay R running task 0 15723 15721 0x00000202
1571.10  [ 4642.729786] Call trace:
1571.11  [ 4642.732239] [<ffff0000080855e4>] __switch_to+0x8c/0xa0
1571.12  [ 4642.737379] [<ffff0000084e3a48>] dma_chan_put+0x70/0xa0
1571.13  [ 4642.742603] [<ffff0000084e3aac>] dma_release_channel+0x34/0xa0
1571.14  [ 4642.748435] [<ffff000008972240>] fsl_asrc_dma_hw_free+0x38/0x50
1571.15  [ 4642.754358] [<ffff000008960568>] soc_pcm_hw_free+0x110/0x1a8
1571.16  [ 4642.760013] [<ffff000008963bcc>] dpcm_fe_dai_hw_free+0x6c/0xe0
1571.17  [ 4642.765844] [<ffff000008948ae8>] snd_pcm_common_ioctl1+0xb40/0xce0
1571.18  [ 4642.772028] [<ffff000008948e64>] snd_pcm_playback_ioctl1+0x1dc/0x310
1571.19  [ 4642.778378] [<ffff000008948fc0>] snd_pcm_playback_ioctl+0x28/0x40
1571.20  [ 4642.784470] [<ffff0000081ee0a4>] do_vfs_ioctl+0xa4/0x748
1571.21  [ 4642.789784] [<ffff0000081ee7d4>] SyS_ioctl+0x8c/0xa0
1571.22  [ 4642.794745] [<ffff000008082f4c>] __sys_trace_return+0x0/0x4
1571.23  [ 4705.718740] INFO: rcu_preempt detected stalls on CPUs/tasks:
1571.24  [ 4705.724420] 0-...: (1 GPs behind) idle=2c5/140000000000000/0 softirq=155373/155374 fqs=10407
1571.25  [ 4705.733030] (detected by 1, t=21010 jiffies, g=104259, c=104258, q=119)

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reported-by: Jason Liu <jason.hui.liu@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Fixes: 593034f1b908 ("MLK-16437: dma: fsl-edma-v3: fix kernel crash
while edma interrupt trigger after channel disabled").
2018-10-29 11:10:38 +08:00
Fugang Duan 7874721968 MLK-16484 dts: imx8qxp: add pcie disable pin
Since i.MX8QXP MEK board PCIe has disable pin that is reseverd for future
use, we should add the disable pin.

(BuildInfo: SCFW 3e70523d, IMX-MKIMAGE 0, ATF 0)

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
2018-10-29 11:10:38 +08:00
Fugang Duan db40e0aac6 MLK-16485 PCI: imx6: Defer probing if .of_get_named_gpio() returns -EPROBE_DEFER
Driver should do defer probing if .of_get_named_gpio() returns -EPROBE_DEFER.
And moving epdev_on regulator to be common for all platforms.

(BuildInfo: SCFW 3e70523d, IMX-MKIMAGE 0, ATF 0)

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
2018-10-29 11:10:38 +08:00
Tiberiu Breana 19d8c6fe50 MLK-15141-1: PCI: imx: Add epdev_on regulator for 8QM WiFi
Add the epdev_on regulator to power up the WiFi module
on the iMX8QM board.
This regulator needs to be powered up before the pcie
link, in order for the WiFi module to work.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Tiberiu Breana <andrei-tiberiu.breana@nxp.com>
2018-10-29 11:10:38 +08:00
Fugang Duan 66b5e6ae8b MLK-16483 ARM64: dts: imx8mq-evk-pcie1-m2: add pcie1 M.2 interface support
Add pcie1 M.2 interface support.

Tested with Murata 1CQ bt-wifi old EVB card, we still don't get
new EVB card. To disable usdhc2 port that old MEK board use SD2_nRST
as wifi wlreg_on.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
2018-10-29 11:10:38 +08:00
Fugang Duan c06e5ad805 MLK-16475-02 arm64: dts: imx8qm/qxp: pull up uart pins in default
Pull up uart pins in default.

(BuildInfo: SCFW 3e70523d, IMX-MKIMAGE 0, ATF 0)

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
2018-10-29 11:10:38 +08:00
Fugang Duan 354cf91d36 MLK-16475-01 ARM64: dts: imx8mq-evk: pull up uart pins in default
Pull up uart pins in default.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
2018-10-29 11:10:38 +08:00
Fugang Duan 2bce357b26 MLK-16474 net: fec: fixup: remove the unnecessary variable
Remove the unnecessary variable.

(BuildInfo: SCFW 3e70523d, IMX-MKIMAGE 0, ATF 0)

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
2018-10-29 11:10:38 +08:00
Seb Laveze f64d93fbce MLK-16473 irqchip: imx-irqsteer: change irqsteer type to level
Irqsteer block only supports level interrupts.

(BuildInfo: SCFW 3e70523d, IMX-MKIMAGE 0, ATF 0)

Signed-off-by: Seb Laveze <sebastien.laveze@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
2018-10-29 11:10:38 +08:00
Fugang Duan f891408007 MLK-16472-02: ARM64: defconfig: add ath10k wireless driver support
Add ath10k wireless driver support.

(BuildInfo: SCFW 3e70523d, IMX-MKIMAGE 0, ATF 0)

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
2018-10-29 11:10:38 +08:00
Fugang Duan 5b87793d5e MLK-16472-01 arm64: dts: imx8qxp: enable Murata 1CQ wifi for MEK board
Add Murata 1CQ wifi enable for MEK board.

(BuildInfo: SCFW 3e70523d, IMX-MKIMAGE 0, ATF 0)

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
2018-10-29 11:10:38 +08:00
Fugang Duan 7fb81ccda0 MLK-16471-02 arm64: dts: imx8qm/imx8qxp: remove ptp clock from assigned-clocks
Since IMX8QXP_ENET0_ROOT_DIV clock is included in assigned-clocks list,
and who is the parent of IMX8QXP_ENET0_PTP_CLK (ptp clock), so remove
ptp clock from assigned-clocks list.

(BuildInfo: SCFW 3e70523d, IMX-MKIMAGE 0, ATF 0)

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
2018-10-29 11:10:38 +08:00
Fugang Duan 564ca4b00a MLK-16471-01 clk: imx8qm/imx8qxp: fix ptp clock parent
Connectivity sbsystem ADD documention Figure 7-2 clock connection
of ENET-AVB has wrong clock connection for ipg_clk_time:
ENETn_CLK_ROOT -> LPCG -> CLKDIV -> ipg_clk_time

Confirm with IC and integration owner, in fact the timer clock path is:
ENETn_CLK_ROOT -> LPCG -> ipg_clk_time

(BuildInfo: SCFW 3e70523d, IMX-MKIMAGE 0, ATF 0)

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
2018-10-29 11:10:38 +08:00
Weiguang Kong e93bcafbe0 MLK-16468-2: ASoC: fsl_hifi4: add multi-codec support for hifi4
The previous hifi4 driver and framework code can't support
multi-codec decoding or encoding together, so change the driver
code to support this feature.
Currently, the hifi4 driver and framework can support at most
5 codec working together.

Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
Reviewed-by: Mihai Serban <mihai.serban@nxp.com>
2018-10-29 11:10:38 +08:00
Weiguang Kong 006c237759 MLK-16468-1: include: uapi: add multi-codec support for hifi4
update the mxc_hifi4.h header file to support multi-codec
decoding or encoding together for hifi4 dsp.

Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
Reviewed-by: Mihai Serban <mihai.serban@nxp.com>
2018-10-29 11:10:38 +08:00
Anson Huang 13f2a09502 MLK-16477 cpufreq: imx8: switch cpufreq governor to schedutil for multi-cluster
For multi-cluster platforms like i.MX8QM, the best cpufreq
governor is schedutil, as common cpufreq framework decides
default cpufreq governor in static compile, so this patch
adds dynamic switch of cpufreq governor according to cluster
number, changing it via sysfs interface, although it is
ugly, but it realizes dynamic cpufreq governor select for
users.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-10-29 11:10:38 +08:00
Haibo Chen 0e8ac60237 MLK-16461-2 ARM64: dts: fsl-imx8mq.dtsi: set property fsl,strobe-dll-delay-target
On some i.MX8MQ-EVK A0/A1 board, we may meet eMMC read data CRC error in
HS400 mode. This is because the delay cell set for the strobe pad
is not correct. Before this patch, usdhc driver default set this delay
cell to value 7, but for some board, only value 3~6 can pass read
operation in HS400 mode, some board, the pass value is 2~10, and
some board, the pass value is 3~8. So the default value 7 can't
make sure all the board can pass eMMC read in HS400.

This patch set the value 5 to fsl,strobe-dll-delay-target, make sure
all the board can work stable in HS400 mode.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
2018-10-29 11:10:38 +08:00
Haibo Chen 3dfc1e9647 MLK-16461-1 mmc: sdhci-esdhc-imx: add strobe-dll-delay-target support
strobe-dll-delay-target is the delay cell add on the strobe line.
Strobe line the the uSDHC loopback read clock which is use in HS400
mode. Different strobe-dll-delay-target may need to set for different
board/SoC. If this delay cell is not set to an appropriate value,
we may see some read operation meet CRC error after HS400 mode select
which already pass the tuning.

This patch add the strobe-dll-delay-target setting in driver, so that
user can easily config this delay cell in dts file.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
2018-10-29 11:10:38 +08:00
Bai Ping 8886632b28 MLK-14409-02 ARM: dts: imx: Add 900MHz setpoint on i.mx6ull
Add 900MHz/1.25V setpoint according the latest datasheet(Rev.1,2/2017),
we add a 25mV voltage margin to cover the IR frop and board tolerance.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-10-29 11:10:38 +08:00
Bai Ping 13cbb53f06 MLK-14409-01 ARM: imx: Add speed grading fuse check for 900MHz on i.mx6ull
According to the latest datasheet(Rev.1,02/2017), when the internal LDO
is enabled, the ARM core can run at 900MHz. We need to check the
speed grading fuse to determine the max ARM core frequency.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-10-29 11:10:38 +08:00
Bai Ping f6ed36d922 MLK-14747 driver: cpufreq: Correct dc regulator voltage on imx6ull
On i.MX6ULL EVK board, when the overdrive mode(900MHz/800MHz) is
enable, the DC regulator voltage should not be changed. Keep the
DC regulator to default 1.4V.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-10-29 11:10:38 +08:00
Dong Aisheng 65e673b650 MLK-16470 thermal: imx_thermal: fix wrong thermal grade register read for MX7D
From MX7D Fuse Map v2.9, the thermal grade register is 0x440[7:6],
not 0x480[7:6] as before.

Fixes: 2045abb439 ("MLK-11518-01 thermal: imx: add thermal support for imx7")
Reviewed-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2018-10-29 11:10:38 +08:00
Robin Gong 34b8196453 MLK-16437: dma: fsl-edma-v3: fix kernel crash while edma interrupt trigger after channel disabled
edma interrupt may come after channel terminated, so should ignore
interrupts, else kernel crash as below since fsl_chan->edesc set
to NULL when terminate.

 606.837306] Unable to handle kernel NULL pointer dereference at virtual address 00000060
[  606.845411] pgd = ffff000009295000
[  606.848814] [00000060] *pgd=00000008bfffe003[  606.852906] , *pud=00000008bfffd003
 , *pmd=0000000000000000[  606.858395]
[  606.859885] Internal error: Oops: 96000006 1 PREEMPT SMP
[  606.865460] Modules linked in:
[  606.868522] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.9.11-03371-g9904ea0 #42
[  606.875832] Hardware name: Freescale i.MX8QXP LPDDR4 ARM2 (DT)
[  606.881662] task: ffff000009120680 task.stack: ffff000009110000
[  606.887588] PC is at fsl_edma3_tx_handler+0x50/0x150

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Tested-by: Daniel Baluta <daniel.baluta@nxp.com>
2018-10-29 11:10:38 +08:00
Weiguang Kong 80894c6200 MLK-16450-2: ASoC: fsl_hifi4: free unused memory when closing device
free unused memory which is allocated in fsl_hifi4_open() function
when closing the hifi4 device.

Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
2018-10-29 11:10:38 +08:00
Weiguang Kong 2f54ca1931 MLK-16450-1: ASoC: fsl_hifi4: fix crash issue caused by memcpy()
When loop testing the hifi4 dirver, a random crash issue always
occur when doing memcpy() in decode function.
Have found that memcpy() is not suited to transfer data between
kernel space and user space, so use copy_from_user() and copy_
to_user() function to replace memcpy() to fix this issue.

Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
2018-10-29 11:10:38 +08:00
Peng Fan 362f91fa9e MLK-16218 tty: serial: fsl_lpuart: use the sg count from dma_map_sg
The dmaengine_prep_slave_sg needs to use sg count returned
by dma_map_sg, not use sport->dma_tx_nents, because the return
value of dma_map_sg is not always same with "nents".

When enabling iommu for lpuart + edma, iommu framework may concatenate
two sgs into one.

Fixes: 6250cc30c4 ("tty: serial: fsl_lpuart: Use scatter/gather DMA for Tx")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-10-29 11:10:38 +08:00
Viorel Suman 135806cc0a MLK-16416-2 soc:imx Add support to save/restore clock parents
In iMX8QM/iMX8QXP the clock parent set in HW is lost when devices are
powered up/down as part of runtime-pm or suspend/resume.
Add support to the power domain driver to save/restore clock parents
associated with devices as part of power up/down.

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
2018-10-29 11:10:38 +08:00
Viorel Suman 80e809014c MLK-16416-1 clk: imx: scu mux: refactor set/get_parent method
The current clk_mux_set_parent_scu() implementation returns error
if device power domain is not enabled. As consequence of this the
existing "assigned-clock-parents" DTS functionality cannot be used for
clk_mux. In order to avoid returning error in "set_parent" the code is
refactored as follows:

a) On "set_parent" the "mux->reg" value is prepared and stored in
   "mux->val" field. The "mux->reg" is updated if power domain is enabled,
   or triggered for update on "prepare" subsequent call otherwise.

b) On "prepare" the power domain status check is performed and "mux->val"
   is stored in "mux->reg" if triggered for update.

c) On "get_parent" the "mux->reg" is not read anymore and "mux->val" is
   used to get the "get_parent" output.

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
2018-10-29 11:10:38 +08:00
Zhou Peng-B04994 cfc159cbe0 MLK-16430 : [i.MX8MQ/Hantro]: Add support to handle interrupt timeout
Add support to handle interrupt timeout.
decoder won't be blocked and will report timeout event to application
when no any interrupts are triggered.

Signed-off-by: Zhou Peng-B04994 <eagle.zhou@nxp.com>
2018-10-29 11:10:38 +08:00
Richard Zhu 2e0540391e MLK-16371-2 rpmsg: imx: add the rpmsg for imx8qxp
Add rpmsg support for imx8qxp.
The pingpong demo had been verified on 8qxp platforms.
Use memset_io replace memset, because that
the memory type of rpvq->addr is strong order type.
There would be kernel dump when memset is used
on imx8qxp.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2018-10-29 11:10:38 +08:00
Richard Zhu 6e8d04b953 MLK-16371-1 arm64: dts: imx8qxp: add the rpmsg support
add the rpmsg support for imx8qxp.
Based on intmux, the int31 of mu0_a0 of m4 side is
used by rpmsg.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2018-10-29 11:10:38 +08:00
Anson Huang 775ccd86b1 MLK-16415 thermal: imx_sc: add device cooling for all thermal zones
For system controller thermal devices, add device
cooling for all thermal zones, when temperature
exceeds passive trip point, thermal driver will
send out notification, all devices that register
device cooling notification can take actions to
cooling down the chip, such as for GPU, below message
will be printed out:

[  581.284453] System is too hot. GPU3D will work at 1/64 clock.

And when temperature drops to below passive trip
point, GPU cooling action will be cancelled:

[  578.300532] Hot alarm is canceled. GPU3D clock will return to 64/64

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-10-29 11:10:38 +08:00
Frank Li 8a5d930070 MLK-16358-2: ARM: imx8mq: enable ddr perf monitor
Enable DDR perf monitor support

Signed-off-by: Frank Li <Frank.Li@nxp.com>
2018-10-29 11:10:38 +08:00
Frank Li 7505ab89c0 MLK-16358-1: ARM: FSL: DTS: enable arm pmu for A53
Enable A53 PMU for imx8

Signed-off-by: Frank Li <Frank.Li@nxp.com>
2018-10-29 11:10:38 +08:00