For imx8mq-evk board, B4 board change touch/mipi-hdmi connected i2c bus from i2c1 to i2c3.
So this patch make the touch and mipi-hdmi work for both B4 and B3 board.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
As the typec2(usbotg2) is always with charger on, which makes the usbotg2
can't enter runtime suspend, thus high bus can't be released, disable it
for now and will improve high bus only for data communication.
Signed-off-by: Li Jun <jun.li@nxp.com>
(cherry picked from commit 5b4290c370064cf9aa3a5e5c0cd12194f42aea7a)
note for the rework:
eMMC on EVK board has pad conflict with NAND and Micro-SD.
NAND on EVK board has pin conflict with QSPI and SD2(eMMC).
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
The i.MX6ULZ is sw compatible with i.MX6ULL, and the EVK board has
no big difference, so include i.mx6ull evk dts file do reduce code
redundancy.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
The i.MX6ULZ is new SOC of the i.MX6 series. it
is SW compatile with i.MX6ULL, so most of the code
can be reuse from i.MX6ULL. To maximum the SW reuse,
i.MX6ULZ don't have an independent SOC id in anamix.
so a dummy ID is used to identify it.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Add the missing vdev-nums updates for cm41 on imx8qm
mek board.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Acked-by: Jason Liu <Jason.hui.liu@nxp.com>
Add new DTS file for iMX8MM DDR4 EVK board, which disables the busfreq,
flexspi, eMMC and add NAND support.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
Enable LPA in default.
Change the module name, for alsactl can restore the default
setting by name
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 6827c27c07e5563a11d0b77456672d05ed5db650)
The transceiver of FLEXCAN is regulated by i2c I/O Expander which
interrupt-parent is intmux, so we must set i2c I/O Expander power domain
as the sub power domain of the intmux.
In principle, the device tree describes the hardware, so the device tree
topology should follow the hardware structure. Here move the definition of
FLEXCAN to more suitable location.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Add "spi-slave" attribute for recognizing slave mode.
If it is not in slave mode, please delete this attribute.
Usage can be found at spi-fsl-lpspi.txt.
Modify "Makefile" to build "imx7ulp-evk-spi-slave.dtb".
Signed-off-by: Xiaoning Wang <xiaoning.wang@nxp.com>
Enable CONFIG_CRYPTO_TEST=m needed by Test / Validation Team, and then
other needed modules used by tcrypt are enbled.
Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
(cherry picked from commit dcae3b446bdb542122eca2debc974e6528ff137b)
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
add new dts for m4 audio playback, which support cs42888 through
rpmsg
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit f19da36b937cec95a6bd271d6160dbb718e658fa)
Android will check /dev/input, so enable sc_pwrkey.
Correct dev_emmc path, because the address has changed use the physical
address.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
According to the latest datasheet(Rev,1.3 08/2018). the VDD_SOC voltage
need to be updated to 1.225V when cpu running at 900MHz. we need to add
25mV margin to cover the board tolerance and IR drop. so the voltage
need to be updated to 1.25V.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
Add dmas and dma-names for ecspi1~4 to fix boot error:
"spi_imx 30840000.ecspi: dma setup error -19, use pio".
Signed-off-by: Xiaoning Wang <xiaoning.wang@nxp.com>
During boot time, the interrupt latency can reach 20ms due to UART
holding the interrupts disabled. If, during this time, VBLANK (LINE_0)
and CTXLD_KICK (LINE_1) are triggered, the handlers will be called in
the order of the irq_steer lines (vblank handler first and ctxld_kick
second). This may lead to "vblank wait timed out" warning messages from
DRM core, because the 50ms wait time is exceeded. Especially when
display is lower than 30fps.
Swapping the interrupt lines will have the ctxld_kick interrupt handler
always be called first, kicking the context loader ON before VBLANK
notification is sent to userspace.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Use GPR node to simplify codes for MIPI CSI phy reset
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 0f576c50e71cadf43755d44d102beb813595d007)
Make sure the time between power off and power on sd card meet the
sd SPEC, otherwise after suspend and resume, SD3.0 card will no longer
be recognized as SD3.0, but SD2.0
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 1ee3ea929e89fc1c8eeab129d8e64179d3dd4afa)
Make sure the time between power off and power on sd card meet the
sd SPEC, otherwise after suspend and resume, SD3.0 card will no longer
be recognized as SD3.0, but SD2.0
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
When early_power_on is present in power domain dtb node, it
will be powered on during resume regardless of whether the
related module is enabled or NOT, this will cause cm4_intmux
always power ON after first time resume when cm4_intmux is
NOT enabled.
So move this early_power_on property to board level dtb, ONLY
when cm4_intmux is enabled, then this property is added.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
When early_power_on is present in power domain dtb node, it
will be powered on during resume regardless of whether the
related module is enabled or NOT, this will cause cm4_intmux
always power ON after first time resume when cm4_intmux is
NOT enabled.
So move this early_power_on property to board level dtb, ONLY
when cm4_intmux is enabled, then this property is added.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
1. Dom0 dts include fsl-imx8qm-mek.dtsi
2. Add /memreserve/ according to reserved-memory no-map node, then
xen will not use these memory. The memory region are used by
vpu/dsp/rpmsg, so xen should not touch them.
3. correct dom0 cma area, CM4 has limitation that the max access address
is 0xE0000000, so the alloc-ranges should consider the limitation,
otherwise rpmsg dma allocation will alloc memory higher than
0xE0000000 and M4 will crash.
4. Hook CM41 with SMMU, added the addresses the CM41 will access, then
after SMMU enabled, CM41 could access the address. To support
Rear-View Camera, CM41 is kicked off by SCU at very early stage,
DomU memory almost has no chance to have machine address 0x90000000
included which is the vring desc buffer. So we have to enable SMMU
to let CM41 access the memory.
5. Since DomU Guest RAM0 base is moved to 0x80000000, Let's change DomU
ip address space to their machine address, since there is no conflict
now.
6. Add reserved-memory in DomU dts, we enabled xen xl to copy that
to DomU dtb.
7. Mark PCI/VPU as xen,passthrough, but not supported in DomU now.
8. Add Pixel_combiner2 passthrough to make dpu2 display work.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Anson Huang <Anson.Huang@nxp.com>
Rename fsl-imx8qm-mek.dts to fsl-imx8qm-mek.dtsi and keep /dts-v1/ in
fsl-imx8qm-mek.dts, then let fsl-imx8qm-mek.dts include
fsl-imx8qm-mek.dtsi.
This is to prepare adding /memreserve/ for mek dom0 dts.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Anson Huang <Anson.Huang@nxp.com>
Adjust passive trip point temperature to be 20 degree C
below than the critical trip point temperature on i.MX8X
platforms.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit cefa63c1b9873e5e60f4db1e77bfecfaf18ff799)
For mfgtool (UUU) requirement, it needs to build in IPv6 for nfs
rootfs mount.
Generated with the following commands:
make defconfig
make savedefconfig
cp defconfig arch/arm64/configs/defconfig
Reviewed-by: Frank Li <frank.li@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Use MQ specific ak5558 sound card compatible string in order to
handle properly 1:2 bclk:mclk SAI ratio.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 20d6d65c330a1560407bc99e0a7f90225ceaf7d8)
This patch adds pixel combiner node support for i.MX8dx DT
file and hooks the pixel combiner node to the DPU node.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds pixel combiner nodes support for i.MX8qm DT
file and hooks the pixel combiner nodes to the DPU nodes.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
With these two properties enabled, the dwc3 driver at 850D can ACk
LPM packet from host, and the later suspend/resume signals are correct.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
When system enter suspend, the system counter timer will stop counting.
So need to add "arm,no-tick-in-suspend" flag. Otherwise, the system
timekeeping will be wrong.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit 1e15dda8c50a474891ccd1cb7fa7b41a8abbadc2)
According to IC reply, 8QXP B0 still has some issue on its DPLL.
Though we still not find any issue when usdhc use PLL0(DPLL), but better
to change back to PLL1(APLL) just in case any problem. So this patch change
back the usdhc clock parent to PLL1.
To track the history, refer to commit 7834eee6dfa8 ("MLK-17188-2
ARM64: dts: imx8qxp: assign usdhc clock parent") and commit 0611d9138e6e
("MLK-18003 ARM64: dts: imx8qxp: change back usdhc clock parent to PLL0").
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Since the rev. B4 of the 8MQ EVK board, the i2c of the DSI was moved
from i2c1 to i2c3. Since ADV7535 needs these i2c lines, it was the only
one affected by this change.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Haibo Chen