Moved IP and there files

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gaurav 2022-07-11 20:58:41 +02:00

parent 969b98679d

commit de5fcf284f

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FPGA_Firmware/Source/src/csi_dphy.cfg → FPGA_Firmware/Source/src/Lattice_specfic/csi_dphy.cfg

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FPGA_Firmware/Source/src/csi_dphy.v → FPGA_Firmware/Source/src/Lattice_specfic/csi_dphy.v

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FPGA_Firmware/Source/src/dphy_dummy.cfg → FPGA_Firmware/Source/src/Lattice_specfic/dphy_dummy.cfg

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FPGA_Firmware/Source/src/dphy_dummy.v → FPGA_Firmware/Source/src/Lattice_specfic/dphy_dummy.v

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FPGA_Firmware/Source/src/int_osc.v → FPGA_Firmware/Source/src/Lattice_specfic/int_osc.v

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FPGA_Firmware/Source/src/line_ram_dp.cfg → FPGA_Firmware/Source/src/Lattice_specfic/line_ram_dp.cfg

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FPGA_Firmware/Source/src/line_ram_dp.v → FPGA_Firmware/Source/src/Lattice_specfic/line_ram_dp.v

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FPGA_Firmware/Source/src/out_line_ram_dp.cfg → FPGA_Firmware/Source/src/Lattice_specfic/out_line_ram_dp.cfg

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FPGA_Firmware/Source/src/out_line_ram_dp.v → FPGA_Firmware/Source/src/Lattice_specfic/out_line_ram_dp.v

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FPGA_Firmware/Source/src/rom_first.cfg → FPGA_Firmware/Source/src/Lattice_specfic/rom_first.cfg

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FPGA_Firmware/Source/src/rom_first.v → FPGA_Firmware/Source/src/Lattice_specfic/rom_first.v

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FPGA_Firmware/Source/src/rom_sec.cfg → FPGA_Firmware/Source/src/Lattice_specfic/rom_sec.cfg

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FPGA_Firmware/Source/src/rom_sec.v → FPGA_Firmware/Source/src/Lattice_specfic/rom_sec.v

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