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16892 Commits (6602ffb84949779fd5d27399ca5f608a409a2a83)

Author SHA1 Message Date
Ben Skeggs d9b5f261db drm/nouveau/bios: parse freq ranges and timing id into ramcfg struct
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:08 +10:00
Ben Skeggs 595d373f1e drm/nouveau/bios: memset dcb struct to zero before parsing
Fixes type/mask calculation being based on uninitialised data for VGA
outputs.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:08 +10:00
Ben Skeggs 6b07c6cfd1 drm/gk104/fb/ram: make use of training data provided by vbios
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:07 +10:00
Ben Skeggs 43b6b2029e drm/nouveau/bios: add support for parsing table at BIT 'M' v2 + 0x09
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:07 +10:00
Ben Skeggs 7500bb7eb4 drm/nouveau/bios: add support for parsing table at BIT 'M' v2 + 0x05
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:06 +10:00
Ben Skeggs 299dea4e0e drm/gk104/fb/ram: fix register for second set of training data
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:06 +10:00
Ben Skeggs a6a4df9610 drm/gk104/fb/ram: more random magic in fb init
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:06 +10:00
Ben Skeggs 4cc6c3fe39 drm/gk104/fb/ram: skip table entry for mode we're already in
NVIDIA binary driver appears to, not sure if it's for a good reason, but
grasping at straws for some GDDR5 reclocking issues here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:05 +10:00
Roy Spliet 50c4088313 drm/nouveau/fb/sddr2: Generate MR values
V2: Always disable DLL reset

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:05 +10:00
Roy Spliet 9c870007e9 drm/nouveau/fb/sddr3: Expand MR generation
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:04 +10:00
Roy Spliet 941844327c drm/nva3/pwr/memx: Match blob's fb access behaviour
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:04 +10:00
Roy Spliet 6778911b20 drm/nouveau/pwr/memx: Return debugging information
Time measured from disabling FB to re-enabling, PPWR_IN reveals status of
heads at the end of script. Helps debug various issues (like flicker).

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:04 +10:00
Roy Spliet d93e996aed drm/nouveau/pwr/memx: Make FB disable and enable explicit
Needs to be done after wait-for-VBLANK, and NVA3 requires register writes
in between.

Rather than hard-coding register writes, just split out fb_disable and
fb_enable.

v2. Squashed "fb/ramnve0: disable fb before reclocking"

Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:03 +10:00
Roy Spliet e1a6f7da9a drm/nva3/pwr/memx: Implement "wait for VBLANK"
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:03 +10:00
Martin Peres 3a405258b2 drm/nouveau/therm/nv84+: do not expose non-calibrated internal temp sensor
Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:02 +10:00
Martin Peres c5b4865e20 drm/nouveau/therm: make sure the temperature settings are sane on nv84+
One of my nv92 has a calibrated internal sensor but it displays 0°C
as the default values use sw calibration values to force the temperature
to 0.

Since we cannot read the temperature from the adt7473 present on this board,
let's re-enable the internal reading!

Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:02 +10:00
Martin Peres 3ca6cd435e drm/nouveau/subdev: add a pfuse subdev v2
We will use this subdev to disable temperature reading on cards that did not
get a sensor calibration in the factory.

v2:
- rename "nouveau_fuse_rd32" to "gxXXX_fuse_rd32" as adviced by Christian Costa
- fold the code a little as adviced by Emil Velikov

Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:01 +10:00
Roy Spliet 3d40a7176d drm/nva3/clk: Set intermediate core clock on reclocking
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:01 +10:00
Roy Spliet a749a1fb55 drm/nva3/clk: For PLL clocks always make sure the PLL is not in use
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:01 +10:00
Roy Spliet 275dd6f48f drm/nva3/clk: Abort when PLL doesn't lock
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:00 +10:00
Roy Spliet 70c7995d12 drm/nva3/clk: HOST clock
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:25:00 +10:00
Roy Spliet 6a4a47cfd1 drm/nva3/clk: Set PLL refclk
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:59 +10:00
Roy Spliet 3d896d349e drm/nva3/clk: Parse clock control registers more accurately
Signed-off-by: Roy Spliet <rspliet@eclipso.eu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:59 +10:00
Pierre Moreau 17eac85a8c drm/nouveau: Fix duplicate definition of NV04_PFB_BOOT_0_*
Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:58 +10:00
Pierre Moreau 703fa264b1 drm/nouveau: Display Nouveau boot options at launch
It can help to remove any ambiguity about which options were passed to Nouveau,
especially in case the user had some options set in /etc/modprobe.d/*.conf that
he forgot about, as they won't appear in a dmesg.

Signed-off-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:58 +10:00
Ben Skeggs a2410f5a0f drm/nouveau/pwr: wait for scrubbers to finish before uploading new ucode
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:58 +10:00
Martin Peres 4417be553c drm/nouveau/pwr/fuc: make $r1-$r10 registers callee-saved in kernel.fuc
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:57 +10:00
Martin Peres b9fcf971bf drm/nouveau/pwr/fuc: add ld/st macros
Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:57 +10:00
Martin Peres d5837df18c drm/nouveau/pwr: add helpers for delay-to-ticks and ticks-to-delay
Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:56 +10:00
Martin Peres 2befd17de2 drm/nouveau/pwr: add some arith functions (mul32_32_64, subu64 and addu64)
Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:56 +10:00
Martin Peres 9db66fceac drm/nouveau/pwr: fix the timers implementation with concurent processes
The problem with the current implementation is that adding a timer improperly
checked which process would time up first by not taking into account how much
time elapsed since their timer got scheduled. Rework the re-scheduling
decision t fix this.

The catch with this fix is that we are limited to scheduling timers of up to
2^31 ticks to avoid any potential overflow. Since we are unlikely to need to
wait for more than a second, this won't be a problem :)

Another possible fix would be to decrement the timeouts of all processes but
it would duplicate a lot of code and dealing with edge cases wasn't pretty
last time I checked.

Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:56 +10:00
Martin Peres 2a5e5fa734 drm/nouveau/ppwr: enable ppwr on gm107
For some reason, it is now required to wait a 20 µs after the 0x200 reset of
the engine.

Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:55 +10:00
Martin Peres 808a188a33 drm/gm107/therm: add PWM fan support v2
v2: change the copyright ownership from "Nouveau Community" to myself, as per
Illia's recommendation.

Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:24:50 +10:00
Martin Peres 90a2c1aaa2 drm/nouveau/therm/fan: do not use the pwm mode when the vbios tells us to use toggle
Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:14 +10:00
Martin Peres 288c17bd9e drm/nouveau/bios/fan: add support for maxwell's fan management table v2
Re-use the therm-exported fan structure with only two minor modifications:
- pwm_freq: u16 -> u32;
- add fan_type (toggle or PWM)

v2:
- Do not memset the table to 0 as it erases the pre-set default values

Signed-off-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:13 +10:00
Ben Skeggs e0ae679823 drm/nouveau/ltc: allocate tagram from memory that spans all partitions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:13 +10:00
Ben Skeggs 65270a6569 drm/nouveau/core/mm: allow allocation to be confined to a specific slice of heap
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:13 +10:00
Ben Skeggs 13dfe1286d drm/nouveau/core/mm: fill in holes with "allocated" nodes
The allocation algorithm doesn't expect there to be holes in the mm, which
causes its alignment/cutoff calculations to choke (and go negative) when
encountering the last chunk of a block before a hole.

The least expensive solution is to simply fill in any holes with nodes
that are pre-marked as being allocated.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:13 +10:00
Ben Skeggs d7bda18c91 drm/nouveau/core/mm: dump mm when trying to tear one down that still has allocations
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:13 +10:00
Ben Skeggs d979ab975e drm/nouveau/core/mm: modify test for if building a mm with holes in it
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:13 +10:00
Ben Skeggs 79456e1a10 drm/nouveau/core/mm: make it clearer what (type == 0) means
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:13 +10:00
Ben Skeggs a1fc50b4a5 drm/gf100/ltc: translate interrupt status into more meaningful names
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:12 +10:00
Ben Skeggs 9ea97ff827 drm/nouveau/ltc: drop workaround for an interrupt storm that no longer happens
This is really the wrong thing to do, but at the time it was our only
option to prevent worse issues.

We no longer cause quite so much anger from LTC, so it's not needed.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:12 +10:00
Ben Skeggs b38a2322df drm/nv50-/disp: add support for completion events
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:12 +10:00
Ben Skeggs 996f5a0823 drm/nouveau/core: pass related object into notify constructor
The event source types/index might need to be derived from it.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:12 +10:00
Ben Skeggs e94654e21d drm/nouveau/bar: ioremap only the areas that we're actually using
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2014-09-15 22:22:12 +10:00
Dave Airlie 19524f7c59 Merge tag 'topic/core-stuff-2014-09-15' of git://anongit.freedesktop.org/drm-intel into drm-next
Here's the updated topic/core-stuff pull request with the two patches
already merged into drm-fixes dropped.

* tag 'topic/core-stuff-2014-09-15' of git://anongit.freedesktop.org/drm-intel:
  drm: Drop modeset locking from crtc init function
  drm/i915/hdmi: Enable pipe pixel replication for SD interlaced modes
  drm/edid: Reduce horizontal timings for pixel replicated modes
  drm: Include task->name and master status in debugfs clients info
  drm/gem: Fix kerneldoc typo
  drm: use c99 initializers in structures
  drm: fix drm_modeset_lock.h kernel-doc notation
2014-09-15 19:55:55 +10:00
Laurent Pinchart 96c0269118 drm/rcar-du: Add OF support
Implement support for the R-Car DU DT bindings in the rcar-du DRM
driver.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2014-09-15 11:55:47 +03:00
Laurent Pinchart 1d46fea7d0 drm/rcar-du: Use struct videomode in platform data
In preparation for DT support where panel timings will be described by a
DRM-agnostic video mode, replace the struct drm_mode_modeinfo instance
in the panel platform data with a struct videomode.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2014-09-15 11:55:47 +03:00
Laurent Pinchart 9588b82601 drm/shmob: Update copyright notice
The "Renesas Corporation" listed in the copyright notice doesn't exist.
Replace it with "Renesas Electronics Corporation" and update the
copyright years.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2014-09-15 11:34:07 +03:00
Laurent Pinchart 36d50464e0 drm/rcar-du: Update copyright notice
The "Renesas Corporation" listed in the copyright notice doesn't exist.
Replace it with "Renesas Electronics Corporation" and update the
copyright years.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2014-09-15 11:34:06 +03:00
Daniel Vetter d0fa1af40e drm: Drop modeset locking from crtc init function
At driver init no one can access modeset objects and we're
single-threaded. So locking is just cargo-culting here. Worse, with
the new ww mutexes and ww mutex slowpath debugging the mutex_lock
might actually fail, and we don't have the full-blown ww recovery
dance.

Which then leads to fireworks when we try to unlock the not-locked
crtc lock.

An audit of all the functions called from here shows that none of them
contain locking checks, so there's also no reason to keep the locking
around just for consistency of caller contexts. Besides that I have
the rule (at least in i915) that such places where we take locks just
to simplify locking checks and not for correctness always require a
comment.

This regression was introduced in

commit 51fd371bba
Author: Rob Clark <robdclark@gmail.com>
Date:   Tue Nov 19 12:10:12 2013 -0500

    drm: convert crtc and connection_mutex to ww_mutex (v5)

v2: Don't drop the lock_init call, spotted by the 0day builder.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=83341
Cc: Rob Clark <robdclark@gmail.com>
Cc: thellstrom@vmware.com
Cc: maarten.lankhorst@canonical.com
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2014-09-15 08:56:30 +02:00
Clint Taylor 697c4078c7 drm/i915/hdmi: Enable pipe pixel replication for SD interlaced modes
Enable 2x pixel replication for modes the mode flag DBLCLK to double
horizontal timings and pixel clock across TMDS.

Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-15 08:56:30 +02:00
Clint Taylor fb01d28070 drm/edid: Reduce horizontal timings for pixel replicated modes
Pixel replicated modes should be non-2x horizontal timings and pixel
replicated by the HW across the HDMI cable at 2X pixel clock. Current
horizontal resolution of 1440 does not allow pixel duplication to
occur and scaling artifacts occur on the TV. HDMI certification
7-26 currently fails for all pixel replicated modes. This change will
allow HDMI certification with 480i/576i modes once pixel replication
is turned on.

Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-15 08:56:29 +02:00
Chris Wilson 50d47cb318 drm: Include task->name and master status in debugfs clients info
Showing who is the current master is useful for trying to decypher
errors when trying to acquire master (e.g. a race with X taking over
from plymouth). By including the process name as well as the pid
simplifies the task of grabbing enough information remotely at the point
of error.

v2: Add the command column header and flesh out a couple of comments.
(David Herrmann)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: David Herrmann <dh.herrmann@gmail.com>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-15 08:56:29 +02:00
Laurent Pinchart 2a5706a36d drm/gem: Fix kerneldoc typo
The drm_gem_private_object_init function is called drm_gem_object_init
in its kerneldoc. Fix it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-15 08:56:28 +02:00
Benjamin Herrenschmidt 37b9b81f30 drm/ast: Cleanup analog init code path
Move the MMIO mangling to a separate routine and actually
disable the DVO output when using pure analog.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-15 11:37:46 +10:00
Benjamin Herrenschmidt 42fb142744 drm/ast: Don't assume DVO enabled means SIL164 on uninitialized chips
It looks like the AST2400 comes up with the DVO enable bit set,
which causes us to incorrectly assume we have a SIL164 regardless
of the value of the scratch registers setup by the BMC firmware.

So let's limit that test to the case where the chip has already
been setup by a BIOS.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-15 11:37:45 +10:00
Benjamin Herrenschmidt 261a3ad426 drm/ast: Properly initialize P2A base before using it in ast_init_3rdtx()
If the P2A has been used to target other SOC registers before that
call, we're going to hit the wrong place so make sure we set the
base address up properly before using it.

(P2A stands for PCIe to AHB bridge and is the bride that allows
accessing the AST's internal AHB bus using a relocatable 64k
window in the second half of the PCIe MMIO BAR)

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-15 11:37:45 +10:00
Benjamin Herrenschmidt d1b985572a drm/ast: POST chip at probe time if VGA not enabled
We need to do it on machines without a BIOS such as POWER8. Also
for detection to work without triggering PCIe errors, we need
to enable VGA early on, inside ast_detect_chip().

While touching those files, replace a few hard coded register
numbers with the corresponding symbolic constant.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-15 11:37:44 +10:00
Benjamin Herrenschmidt 0dd68309b9 drm/ast: Try to use MMIO registers when PIO isn't supported
If the PIO resources haven't been assigned, then we have no choice
but try to use the MMIO version. This is the case for example on
POWER8 which doesn't support PIO at all.

Chips rev 0x20 or later have MMIO decoding enabled by default.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-15 11:37:43 +10:00
Julia Lawall d456ea2edc drm: use c99 initializers in structures
Use c99 initializers for structures.

Drop 0 initializers in drivers/gpu/drm/sti/sti_vtac.c.  A 0x0 initializer
is left in vtac_mode_aux in drivers/gpu/drm/sti/sti_vtac.c to highlight the
relation to vtac_mode_main.

A simplified version of the semantic match that finds the first problem is
as follows: (http://coccinelle.lip6.fr/)

// <smpl>
@decl@
identifier i1,fld;
type T;
field list[n] fs;
@@

struct i1 {
 fs
 T fld;
 ...};

@bad@
identifier decl.i1,i2;
expression e;
initializer list[decl.n] is;
@@

struct i1 i2 = { is,
+ .fld = e
- e
 ,...};
// </smpl>

v2: Drop 0 initializers and add trailing commas at the suggestions of Josh
Triplett.

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-12 16:49:34 +02:00
Daniel Vetter 6865b20ad3 drm: Move DRM_MAGIC_HASH_ORDER into drm_drv.c
Only used in one place ever, so put it right next to that.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-12 15:28:14 +02:00
Daniel Vetter 00285be8ff drm: Move drm_class to drm_internal.h
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-12 15:28:14 +02:00
Daniel Vetter ba8286fab5 drm: Move legacy buffer structures to <drm/drm_legacy.h>
A few odd cases:
- mgag200 someho had a totally unused drm_dma_handle_t. Remove it.
- i915 still uses the legacy pci dma alloc api, so grows an include.

Everything else fairly standard.

v2: Include "drm_legacy.h" in drm.ko source files for consistency.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-12 15:28:12 +02:00
Daniel Vetter 86c1fbd55c drm: Move drm_memory.c map support declarations to <drm/drm_legacy.h>
And replace the drm_core_ prefix with drm_legacy_ since really, this
isn't core stuff.

Also drop drm_core_dropmap since it's unused.

v2: Fix up i810.ko fully which somehow slipped through.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-12 15:28:12 +02:00
Daniel Vetter 78238757eb drm: Purge ioctl forward declarations from drmP.h
If we push down the ioctl table in drm_ioctl.c all the forward
declarations in drmP.h are not required any more.

v2: Fold in fixup from Fenugguang Wu to declare functions as static.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-12 15:27:47 +02:00
Daniel Vetter 44af3f5c6a drm: unexport drm_global_mutex
Drivers really, really have no business even looking at this lock. And
thankfully they don't.

So unexport it and move the declaration to drm_internal.h.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-12 11:19:47 +02:00
Daniel Vetter 67d0ec4e88 drm: Move piles of functions from drmP.h to drm_internal.h
This way drivers can't grow crazy ideas any more, and it also
helps a bit in reviewing EXPORT_SYMBOLS.

v2: Even more stuff. Unfortunately we can't move drm_vm_open_locked
because exynos does some horrible stuff with it.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-12 11:16:29 +02:00
Daniel Vetter 1888299571 drm: Move vblank related module options into drm_irq.c
This allows us to drop 2 header declarations from drmP.h. The 3rd one
is also used in drm_ioctl.c, so for that create a new drm_internal.h
header for non-legacy non-kms (since we have internal headers for
those parts already) declarations private to drm.ko.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-12 11:14:56 +02:00
Daniel Vetter 1c96e84ee4 drm: Move __drm_pci_free to drm_legacy.h
Also sprinkle the customary legacy_ prefix.

Unfortunately we can't move the other functions since i915 is still
using them. Shame on me for that one :(

v2: Fix patch subject as spotted by David Herrmann.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-12 11:08:56 +02:00
Daniel Vetter 4f03b1fc1e drm: Create drm legacy driver header
And move a few legayc functions to start things over there.

It compiles ...

Inspired by a patch from Dave Airlie, but with a split between drm.ko
private legacy functions and stuff used by drivers.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-12 11:08:55 +02:00
Daniel Vetter a677f4cc88 drm: Move drm_legacy_vma_flush into drm_legacy.h
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2014-09-12 11:08:54 +02:00
Daniel Vetter 9ec4e2ff3e drm: Move sg functions into drm_legacy.h
Also sprinkle the drm_legacy_ prefix where missing.

v2: Drop extern from function declarations and include "drm_legacy.h"
in drm_scatter.c, spotted by David.

Cc: David Herrmann <dh.herrmann@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-12 11:08:54 +02:00
Daniel Vetter a266162aef drm: Move dma functions into drm_legacy.h
Also drop the unneeded EXPORT_SYMBOL and sprinkle drm_legacy_ prefixes
where missing.

v2: Drop the confusing _core_ and drop extern, both suggested by
David.

Cc: David Herrmann <dh.herrmann@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-12 11:08:53 +02:00
Dave Airlie edbaae5a5c Merge tag 'topic/vblank-rework-2014-09-12' of git://anongit.freedesktop.org/drm-intel into drm-next
So updated vblank-rework pull request, now with the polish that Mario
requested applied (and reviewed by him). Also with backmerge like you've
requested for easier merging.

The neat thing this finally allows is to immediately disable the vblank
interrupt on the last drm_vblank_put if the hardware has perfectly
accurate vblank counter and timestamp readout support. On i915 that
required piles of small adjustements from Ville since depending upon the
platform and port the vblank happens at different scanout lines.

Of course this is fully opt-in and per-device (we need that since gen2
doesn't have a hw vblank counter).

* tag 'topic/vblank-rework-2014-09-12' of git://anongit.freedesktop.org/drm-intel: (22 commits)
  drm: Clarify vblank ts/scanoutpos sampling #defines
  drm: Simplify return value of drm_get_last_vbltimestamp
  drm: Only update final vblank count when precise ts is available
  drm: Really never disable vblank irqs for offdelay==0
  drm: Use vblank_disable_and_save in drm_vblank_cleanup()
  drm: Remove drm_vblank_cleanup from drm_vblank_init error path.
  drm: Store the vblank timestamp when adjusting the counter during disable
  drm: Fix confusing debug message in drm_update_vblank_count()
  drm/i915: Update scanline_offset only for active crtcs
  drm: Kick start vblank interrupts at drm_vblank_on()
  drm/i915: Opt out of vblank disable timer on >gen2
  drm: Add dev->vblank_disable_immediate flag
  drm: Disable vblank interrupt immediately when drm_vblank_offdelay<0
  drm: Fix race between drm_vblank_off() and drm_queue_vblank_event()
  drm: Fix deadlock between event_lock and vbl_lock/vblank_time_lock
  drm: Reduce the amount of dev->vblank[crtc] in the code
  drm: Avoid random vblank counter jumps if the hardware counter has been reset
  drm: Have the vblank counter account for the time between vblank irq disable and drm_vblank_off()
  drm: Move drm_update_vblank_count()
  drm: Don't clear vblank timestamps when vblank interrupt is disabled
  ...
2014-09-12 19:04:53 +10:00
Dave Airlie a9d6dd2554 drm/ast: switch to using CACHED by default for sysram
This fixes problems on ppc64 platforms, where we could end up using
a WC mapping for migrating BOs with memcpy, when really we want to
use cached memory.

Tested-by: Ben Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-12 17:32:12 +10:00
Dave Airlie fd7e0d7192 drm: split ati_pcigart.h out of drmP.h
Just move this into a separate header file, and make the
two users use it.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-12 14:11:14 +10:00
Y.C. Chen 83502a5d34 drm/ast: AST2000 cannot be detected correctly
Type error and cause AST2000 cannot be detected correctly

Signed-off-by: Y.C. Chen <yc_chen@aspeedtech.com>
Reviewed-by: Egbert Eich <eich@suse.de>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-12 13:41:39 +10:00
Y.C. Chen 8f372e250a drm/ast: open key before detect chips
Some config settings like 3rd TX chips will not get correctly
if the extended reg is protected

Signed-off-by: Y.C. Chen <yc_chen@aspeedtech.com>
Reviewed-by: Egbert Eich <eich@suse.de>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-09-12 13:41:27 +10:00
Christian König 298593b609 drm/radeon: allow concurrent buffer reads
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-09-11 10:46:02 -04:00
Christian König 57d20a43c9 drm/radeon: add the infrastructure for concurrent buffer access
This allows us to specify if we want to sync to
the shared fences of a reservation object or not.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-09-11 10:46:01 -04:00
Christian König ae9c0af2c0 drm/ttm: allow fence to be added as shared
This patch adds a new flag to the ttm_validate_buffer list to
add the fence as shared to the reservation object.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-09-11 10:46:00 -04:00
Daniel Vetter 336879b1da Merge remote-tracking branch 'airlied/drm-next' into topic/vblank-rework
Dave asked me to do the backmerge before sending him the revised pull
request, so here we go. Nothing fancy in the conflicts, just a few
things changed right next to each another.

Conflicts:
	drivers/gpu/drm/drm_irq.c

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2014-09-11 14:46:53 +02:00
Daniel Vetter 3d3cbd8430 drm: Clarify vblank ts/scanoutpos sampling #defines
I've read INVBL as "invalid backlight" and got mightly confused.
The #defines are already fairly long and we can afford to extend
them a bit more without resulting in ugly code all over.

I'm not sure how useful the complicated bitmask return value of these
functions really are since no one checks them. But for now let's keep
things as is.

Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-09-11 13:40:33 +02:00
Daniel Vetter fb446a1acd drm: Simplify return value of drm_get_last_vbltimestamp
Imo u32 hints at a register value, but in reality all callers only
care whether the sampled timestamp is precise or not. So give them
just a bool.

Also move the declaration out of drmP.h, it's only used in drm_irq.c.

v2: Also drop the EXPORT_SYMBOL, spotted by Mario.

Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2014-09-11 13:38:48 +02:00
Daniel Vetter 855d30b402 drm: Only update final vblank count when precise ts is available
Drivers without a hardware vblank counter simply can't account for the
vblanks that happened while the vblank interrupt was off. To check
this grab a vblank timestamp and if the result is dubious follow the
normal save-and-disable logic.

Drivers should prevent this by setting vblank_disable_allowed = false,
but since running vblank interrupts constantly is not good for power
consumption most drivers lie. Testing for precise vblank timestamps is
the next best thing we can check for.

Suggested-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2014-09-11 13:32:05 +02:00
Daniel Vetter ab8905f1c6 drm: Really never disable vblank irqs for offdelay==0
With the new support for immediate vblank disabling we always disabled
the vblank interrupt right away, irrespective of the vblank offdelay
setting.

But being able to let vblanks run forever is fairly useful for
debugging, so restore that behaviour.

Suggested-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2014-09-11 13:31:57 +02:00
Dave Airlie c4d922b145 Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm-next
1) add LVDS support for mdp4 (tested with auo B101XTN01.0 panel)
 2) add B101XTN01.0 panel
 3) bit of gpu refactoring to prepare for addition of addition gpu
generations beyond just a3xx

* 'msm-next' of git://people.freedesktop.org/~robclark/linux:
  drm/msm/adreno: push dump/show stuff to base class
  drm/msm/adreno: bit of init refactoring
  drm/msm/adreno: move decision about what gpu to to load
  drm/msm/adreno: split adreno device out into it's own file
  drm/panel/simple: add optronics B101XTN01.0 (v3)
  drm/msm/mdp4: add LVDS panel support
  drm/msm/mdp4: fix blend setup with multiple crtcs
  drm/msm: update generated headers
2014-09-11 20:53:57 +10:00
Rob Clark 3a10ba8c6b drm/msm: don't crash if no msm.vram param
If VRAM carveout is used, due to no IOMMU, we should have a default
value for msm.vram so that we don't simply crash.

Reported-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-11 06:49:21 -04:00
Rob Clark 28a38b6562 drm/msm/hdmi: fix build break on non-CCF platforms
Reported-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-11 06:49:20 -04:00
Mark Charlebois fc886107c5 drm/msm: Change nested function to static function
There is currently a nested function in Russel King's tree
for the msm HDMI driver.

The last nested function was removed from the Linux kernel
when the Thinkpad driver was fixed.

I believe nested functions are not desired upstream, and it
also breaks compilation with clang so here is a patch to
change the nested function into static function. The patch
works with both clang and gcc.

Signed-off-by: Mark Charlebois <charlebm@gmail.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-11 06:49:20 -04:00
Dave Airlie 3afdd8a0e2 Merge tag 'drm-intel-fixes-2014-09-10' of git://anongit.freedesktop.org/drm-intel into drm-fixes
more fixes for 3.17, almost all Cc: stable material.

* tag 'drm-intel-fixes-2014-09-10' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: Wait for vblank before enabling the TV encoder
  drm/i915: Evict CS TLBs between batches
  drm/i915: Fix irq enable tracking in driver load
  drm/i915: Fix EIO/wedged handling in gem fault handler
  drm/i915: Prevent recursive deadlock on releasing a busy userptr
2014-09-11 20:17:10 +10:00
Alex Deucher f266f04d33 drm/radeon: add RADEON_GEM_NO_CPU_ACCESS BO creation flag (v4)
Allows pinning of buffers in the non-CPU visible portion of
vram.

v2: incorporate Michel's comments.
v3: rebase on Michel's patch
v4: rebase on Michel's v2 patch

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2014-09-10 11:29:46 -04:00
Michel Dänzer b76ee67a23 drm/radeon: Clean up assignment of TTM placement lpfn member for pinning
This sets the lpfn member to 0 instead of the full domain size. TTM uses
the full domain size when lpfn is 0.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-09-10 11:29:46 -04:00
Michel Dänzer c858403943 drm/radeon: Add RADEON_GEM_CPU_ACCESS BO creation flag
This flag is a hint that userspace expects the BO to be accessed by the
CPU. We can use that hint to prevent such BOs from ever being stored in
the CPU inaccessible part of VRAM.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-09-10 11:29:45 -04:00
Rob Clark 3bcefb0497 drm/msm/adreno: push dump/show stuff to base class
Add ptr to list of interesting registers to 'struct adreno_gpu' and use
that to move most of the debugfs show and register dump bits down into
adreno_gpu.  This will avoid duplication as support for additional
adreno generations is added.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-10 11:19:09 -04:00
Rob Clark 3526e9fb4f drm/msm/adreno: bit of init refactoring
Push a few bits down into adreno_gpu so they won't have to be duplicated
as support for additional adreno generations is added.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-10 11:19:09 -04:00
Rob Clark e2550b7a7d drm/msm/adreno: move decision about what gpu to to load
Move this into into adreno_device, and decide based on gpu revision
rather than just assuming a3xx.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-10 11:19:08 -04:00
Rob Clark bfd28b1362 drm/msm/adreno: split adreno device out into it's own file
We'd rather not duplicate these parts as support for additional gpu
generations is added.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-10 11:19:08 -04:00