This patch adds SC_C_SYNC_CTRL into enum sc_ctrl_e to sync with SCU
firmware commit <1db854d7d521> (SCF-151: Added new SC_C_SYNC_CTRL to
control both control signals at the same time.).
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit 9e4a5892dad642f76e3bb0d46c77c4a59bbcae3d)
Add PAD wakeup support for i.MX8 platforms with system
controller present, with PAD wakeup feature enabled,
the corresponding resource's power is no need to be
kept enabled when linux suspend, thus save a sub-system's
power consumption.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit 3b5d781273b22461de9aaea337f9da9b2fdb643e)
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 8bc09ad559237c136f88d93bd696fe10dc4658db)
Remove unused ROMCP clks and related as LPCG
no longer exists
Signed-off-by: Teo Hall <teo.hall@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit 1c15332dffe7e41f0b9d367b96dd426798ec8b06)
Add LCDIF PLL resource and clocks, and power domain for it.
Add Pixel link clocks and set it from bypass path.
Muxes were added so that the slices can choose the bypass input
(lcd_pxl_bypass_div and elcdif_pll_div).
clk summary example:
lcd_pxl_bypass_div 2 2 24000000
lcd_pxl_sel 1 1 24000000
lcd_pxl_div 1 1 24000000
lcd_pxl_clk 1 1 24000000
elcdif_pll_div 1 1 792000000
elcdif_pll 2 2 792000000
lcd_sel 1 1 792000000
lcd_div 1 1 79200000
lcd_clk 1 1 79200000
Signed-off-by: Adriana Reus <adriana.reus@nxp.com>
In order to replace the M4_MU# by the LSIO MU in the
RPMSG usage.
Define the PD and LPCG address of the LSIO MU for iMX8.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
- Sync with scu firmware commit 576011819ce3 (SCF-81: Added API to
control MIPI CSI calibration.) and commit 095a0d7dbc0b (SCF-85: Add
direct control of ENET IPG stop control)
- Add ipg stop misc controls for CONN ENET.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
In order to avoid the name problem going forward with
integration with Qcom, Qcom has their own dsp and hifi
is competitor, so the hifi name should not be used in
our code.
So use the name of dsp instead of hifi to fix this
problem.
Signed-off-by: Weiguang Kong <weiguang.kong@nxp.com>
"
commit cfdb9821531da523fd1f01536eb67c8b8451477f
Author: Oliver Brown <oliver.brown@nxp.com>
Date: Tue Jan 2 07:46:06 2018 -0600
dc: Add controls for display controller resets.
"
Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
Support M4/A53 work together
1. add imx_src_is_m4_enabled
2. introduce a new dts dedicated for m4
3. add more pwm nodes
4. Since clk initialization is at very early stage, add m4 enabled check
in the beginning of clk code.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
This patch is to refine the imx8 soc revision support. The imx8qm and
imx8qxp will go through the SCU API to get the silicon ID and REVISION.
imx8mq will go through the anatop interface to get the ID/REV.
Since the silicon ID/REV need be set as early as possible, thus refine it
by using the early_initcall for the early initialization. For the SCU API
interface, this need be called after the MU interface initialized.
Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
Add i.MX8 SCFW API support.
Based on below commit:
(fcd0efb5f2550712bd7d27f1279e51f7f687f71d)
Fix MX8 MU driver to follow Linux coding conventions.
Remove unused functions.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Added to drivers/soc/imx instead of drivers/soc/imx8
Skipped imx8 imx_rpmsg code
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Ranjani Vaidyanathan