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37299 Commits (zero-gravitas)

Author SHA1 Message Date
Martin T. H. Sandsmark 60e1615193 Add support for checking gpio keys for magic keypress as well 2016-12-04 19:31:21 +01:00
Martin T. H. Sandsmark b8a611f4aa add pin definitions for EPDC 2016-12-02 11:29:15 +01:00
Martin T. H. Sandsmark ee5aa5e375 fix battery checking, only print out status for now 2016-12-02 11:28:22 +01:00
Martin T. H. Sandsmark cd0e6f0b2f improve readability of DCD by using defines and comments 2016-12-02 11:23:40 +01:00
Martin T. H. Sandsmark 231ed29fcb Enable reading of serial tag from OCOTP 2016-12-02 11:18:33 +01:00
Martin T. H. Sandsmark c1794c409e Start on battery checking during boot 2016-12-02 11:14:47 +01:00
Martin T. H. Sandsmark ec02022b87 Don't try to switch mmc device before attempting to boot from RAM 2016-10-19 10:37:13 +02:00
Martin T. H. Sandsmark b9ce469ea9 Fix booting from initramfs from mem, which doesn't use ssystemd 2016-10-19 10:36:24 +02:00
Martin T. H. Sandsmark e7ffea40ea Verify PMIC version before trying to interact with it 2016-10-19 10:35:19 +02:00
Martin T. H. Sandsmark be004af0e7 Move pf100 debug output into separate function, dump SW4 and OTP register values 2016-10-19 10:34:59 +02:00
Martin T. H. Sandsmark afaeaaec02 Remove FEC support, do our own bringup of the pf100, try to set the SW4
voltage of the PF100.
2016-10-11 10:08:31 +02:00
Martin T. H. Sandsmark 06abb466fe Add support for reading PARTITION_CONFIG from console 2016-10-11 10:08:31 +02:00
Martin T. H. Sandsmark 6330a3ee65 Update default boot environment 2016-10-10 14:17:36 +02:00
Martin T. H. Sandsmark 47a01543d2 Print the contents of the INSTAT registers on boot 2016-09-28 11:58:45 +02:00
Martin T. H. Sandsmark 32b32132d2 Add hack to launch USB serial download mode on magic key press 2016-09-27 18:42:02 +02:00
Martin T. H. Sandsmark 57496e7eed Add some missing registers definitions for pf100 2016-09-27 18:38:29 +02:00
Martin T. H. Sandsmark 7ca7798f40 Add definitions for the key pins we use 2016-09-27 18:19:08 +02:00
Martin T. H. Sandsmark 2a7419c1d8 Fix MAINTAINERS 2016-09-07 09:31:21 +02:00
Martin T. H. Sandsmark e0be6171bb Document the clocks in DCD 2016-08-23 12:12:28 +02:00
Martin T. H. Sandsmark 5fee53e5d1 Add RST pin to USDHC2 2016-08-23 10:37:29 +02:00
Martin T. H. Sandsmark 3d874ddfd3 Bring up clocks in DCD 2016-08-23 10:34:44 +02:00
Martin T. H. Sandsmark b04283e042 Disable CD pins for usdhc2 and usdhc3 2016-08-23 10:30:30 +02:00
Martin T. H. Sandsmark 3588b75eb3 Adjust for mmc changes 2016-08-16 20:28:06 +02:00
Martin T. H. Sandsmark 060ded3a14 Make default boot script load device tree 2016-08-15 20:27:19 +02:00
Martin T. H. Sandsmark d267d3330a Update our device tree filename 2016-08-15 20:26:51 +02:00
Martin T. H. Sandsmark 9fed9e35b4 Manually enable UART clock, this might be done in the DCD instead 2016-08-15 19:10:05 +02:00
Martin T. H. Sandsmark 1b6b5ca20b attempt to fix boot 2016-08-12 21:40:15 +02:00
Martin T. H. Sandsmark a0e20c0ab6 Fix size of RAM 2016-08-12 21:28:04 +02:00
Martin T. H. Sandsmark 4e37642b7c fix format of dcd data 2016-08-11 17:56:25 +02:00
Martin T. H. Sandsmark 3816c1aeaf Yank out DCD from old Freescale example for imx6sl + ddr3 2016-08-04 17:05:00 +02:00
Martin T. H. Sandsmark db2fdc22f6 Revert "Replace DCD with one from Kaifa"
This was still non-bootable for Kaifa.

This reverts commit 30648ce8d2867915c80c4e22646ab815151f044f.
2016-08-04 13:13:17 +02:00
Martin T. H. Sandsmark 98363af830 Try to update the SPL DDR init code, based on the sabresd code using DDR3 2016-08-04 13:12:50 +02:00
Martin T. H. Sandsmark f6eaee96b1 Replace DCD with one from Kaifa 2016-08-04 11:59:40 +02:00
Martin T. H. Sandsmark f3695d5c01 fix build 2016-07-29 15:20:04 +02:00
Martin T. H. Sandsmark e37df70399 Update position of our configs 2016-07-29 15:07:43 +02:00
Martin T. H. Sandsmark 4ab62e4e46 Update our defconfig 2016-07-29 14:58:18 +02:00
Martin T. H. Sandsmark 46d2a55285 Add our target to the config system 2016-07-29 14:58:10 +02:00
Martin T. H. Sandsmark f7bfa2a059 update our defconfig 2016-07-29 14:37:49 +02:00
Martin T. H. Sandsmark d45d9c0452 Update naming and metadata for our device 2016-07-29 14:35:59 +02:00
Martin T. H. Sandsmark 40e3de4f82 Add a board config header 2016-07-29 14:35:42 +02:00
Martin T. H. Sandsmark 4ed481c16a Update DCD based on calculations in DDR calculation spreadsheet 2016-07-29 14:09:32 +02:00
Martin T. H. Sandsmark 87e4148ec8 Start creating our own board config based on imx6slevk 2016-07-29 12:40:01 +02:00
Fabio Estevam 3106462698 mx7dsabresd: Fix the boot of a NXP kernel
Booting a NXP kernel with mainline U-boot leads to the following kernel
crash:

caam: probe of 30900000.caam failed with error -11
Unable to handle kernel NULL pointer dereference at virtual address 00000004
pgd = 80004000
[00000004] *pgd=00000000
Internal error: Oops: 805 [#1] PREEMPT SMP ARM

This happens because NXP kernel expects MX7 to boot in secure mode,
so introduce mx7dsabresd_secure_defconfig that selects CONFIG_MX7_SEC
and allows booting a NXP provided kernel successfully.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-06-30 13:18:38 -03:00
Fabio Estevam 401468c7ca mx7: Place MX7_SEC option in Kconfig
MX7_SEC is an existing configuration option that allows booting the
kernel in secure mode.

Place this option in Kconfig, so that boards can select this option
in their defconfig files.

Selecting this option is necessary when booting a kernel provided by
NXP, such as 3.14_GA and 4.1.15_GA.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Michael Trimarchi <michael@amarulasolutions.com>
2016-06-30 13:18:25 -03:00
Fabio Estevam 6e4d8c5bdc pico-imx6ul: Select CONFIG_HUSH_PARSER option
Select CONFIG_HUSH_PARSER option in order to fix the following
problem:

Unknown command 'if' - try 'help'
Unknown command 'then' - try 'help'
Unknown command 'else' - try 'help'
Unknown command 'fi' - try 'help'

Reported-by: Daiane Angolini <daiane.angolini@nxp.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2016-05-17 10:47:14 -03:00
Otavio Salvador 158a5196a5 Prepare v2016.05
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Merge tag 'v2016.05' into 2016.05+fslc

Prepare v2016.05

* tag 'v2016.05': (65 commits)
  Prepare v2016.05
  sunxi: Enable USB host in CHIP defconfig
  test, tools: update tbot documentation
  tests: py: fix NameError exception if bdi cmd is not supported
  arm/arm64: Move barrier instructions into separate header
  arm: socfpga: Update iomux and pll for c5 socdk RevE
  warp7: Fix boot by selecting CONFIG_OF_LIBFDT
  usb: gadget: dfu: discard dead code
  dfu: avoid memory leak
  usb: dwc2: Add delay to fix the USB detection problem on SoCFPGA
  usb: hub: Don't continue on get_port_status failure
  usb: Assure Get Descriptor request is in separate microframe
  usb: Wait after sending Set Configuration request
  socfpga: fix broken build if CONFIG_ETH_DESIGNWARE disabled
  mtd: cqspi: Simplify indirect read code
  mtd: cqspi: Simplify indirect write code
  arm: socfpga: socrates: Add 'time' command
  ARM: socfpga: Disable USB OC protection on SoCrates
  usb: Don't init pointer to zero, but NULL
  usb: ehci-mx6: allow board_ehci_hcd_init to fail
  ...

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2016-05-16 17:19:56 -03:00
Tom Rini aeaec0e682 Prepare v2016.05
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-05-16 10:40:32 -04:00
Hans de Goede f0a711ec40 sunxi: Enable USB host in CHIP defconfig
Reported-and-tested-by: Dennis Gilmore <dennis@ausil.us>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2016-05-15 11:04:29 +02:00
Heiko Schocher 4cf4600f25 test, tools: update tbot documentation
update tbot documentation in U-Boot, as I just
merged the event system into tbots master
branch.

Signed-off-by: Heiko Schocher <hs@denx.de>
2016-05-13 11:25:59 -04:00
Heiko Schocher b8218a9146 tests: py: fix NameError exception if bdi cmd is not supported
test/py raises an error, if a board has not enabled bdi command

>           pytest.skip('bdinfo command not supported')
E           NameError: global name 'pytest' is not defined

import pytest in test/py/u_boot_utils.py fixes this.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2016-05-13 09:17:33 -04:00