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4367 Commits (192a3697600382c5606fc1b2c946e737c5450f88)

Author SHA1 Message Date
Madhuparna Bhowmik de76c0d4a0 dmaengine: pch_dma.c: Avoid data race between probe and irq handler
[ Upstream commit 2e45676a4d ]

pd->dma.dev is read in irq handler pd_irq().
However, it is set to pdev->dev after request_irq().
Therefore, set pd->dma.dev to pdev->dev before request_irq() to
avoid data race between pch_dma_probe() and pd_irq().

Found by Linux Driver Verification project (linuxtesting.org).

Signed-off-by: Madhuparna Bhowmik <madhuparnabhowmik10@gmail.com>
Link: https://lore.kernel.org/r/20200416062335.29223-1-madhuparnabhowmik10@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-05-20 08:20:13 +02:00
Robin Gong b97783e4c8 MLK-23869-3: dmaengine: imx-sdma: add sdma_get_firmware_wait
Add sdma_get_firmware_wait() since sdma firmware have to be ready after
runtime resume. That could be done for runtime feature on i.mx8mp since
the only sdma client audio driver request sdma channel after rootfs
mounted which means no any block in sdma_get_firmware_wait() as
sdma_get_firmware().

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
2020-05-07 15:19:02 +08:00
Robin Gong 65e87c257b MLK-23869-2 dmaengine: imx-sdma: add runtime suspend/resume
Add runtime suspend/resume support on i.mx8mp. So sdma will be initialized
and firmware will be loaded at first channel requested, sdma will be off
once no any channel is running.For the legacy chips just keep sdma on
always as before.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
2020-05-07 15:19:02 +08:00
Robin Gong 4da4ba1aed MLK-23869-1 dmaengine: imx-sdma: split sdma init hw and sw
Split sdma_init_sw and sdma_init_hw from sdma_init, so that sdma_init_hw
could be delayed in channel allocate phase and it's easier for implementing
runtime suspend/resume in the next.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
2020-05-07 15:19:02 +08:00
Andy Shevchenko 73162ca815 dmaengine: dmatest: Fix process hang when reading 'wait' parameter
commit aa72f1d20e upstream.

If we do

  % echo 1 > /sys/module/dmatest/parameters/run
  [  115.851124] dmatest: Could not start test, no channels configured

  % echo dma8chan7 > /sys/module/dmatest/parameters/channel
  [  127.563872] dmatest: Added 1 threads using dma8chan7

  % cat /sys/module/dmatest/parameters/wait
  ... !!! HANG !!! ...

The culprit is the commit 6138f967bc

  ("dmaengine: dmatest: Use fixed point div to calculate iops")

which makes threads not to run, but pending and being kicked off by writing
to the 'run' node. However, it forgot to consider 'wait' routine to avoid
above mentioned case.

In order to fix this, check for really running threads, i.e. with pending
and done flags unset.

It's pity the culprit commit hadn't updated documentation and tested all
possible scenarios.

Fixes: 6138f967bc ("dmaengine: dmatest: Use fixed point div to calculate iops")
Cc: Seraj Alijan <seraj.alijan@sondrel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200428113518.70620-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-05-06 08:15:16 +02:00
Andy Shevchenko c753a12c88 dmaengine: dmatest: Fix iteration non-stop logic
commit b9f9602012 upstream.

Under some circumstances, i.e. when test is still running and about to
time out and user runs, for example,

	grep -H . /sys/module/dmatest/parameters/*

the iterations parameter is not respected and test is going on and on until
user gives

	echo 0 > /sys/module/dmatest/parameters/run

This is not what expected.

The history of this bug is interesting. I though that the commit
  2d88ce76eb ("dmatest: add a 'wait' parameter")
is a culprit, but looking closer to the code I think it simple revealed the
broken logic from the day one, i.e. in the commit
  0a2ff57d6f ("dmaengine: dmatest: add a maximum number of test iterations")
which adds iterations parameter.

So, to the point, the conditional of checking the thread to be stopped being
first part of conjunction logic prevents to check iterations. Thus, we have to
always check both conditions to be able to stop after given iterations.

Since it wasn't visible before second commit appeared, I add a respective
Fixes tag.

Fixes: 2d88ce76eb ("dmatest: add a 'wait' parameter")
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20200424161147.16895-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-05-06 08:15:16 +02:00
Robin Gong 6446b3a523 MLK-23652-2: dmagengine: fsl-edma-v3: fix race condition
Add spinlock for 'tcd_pool', otherwise, in some race condition,
'tcd_pool = NULL' cause ISR never clear edma channel INT anymore which
cause interrupt storm. Besides, clear interrupt directly before poweroff
for safe.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit 37149f29a631f074ac65889375cd1b077284edf8)
2020-04-28 22:23:41 +08:00
Robin Gong 2191fda25c MLK-23652-1: dmaengine: fsl-edma-v3: only clear own INT
For rx/tx channel for audio share the same interrupt, should check INT
before clearing it directly, otherwise, audio rx may clear wrongly audio tx
channe meaningful interrupt instead of meaningless on audio rx before power
up rx edma channel.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit 1afea8def323ae2fadafb50264e52483b855f4bd)
2020-04-28 22:23:41 +08:00
Robin Gong 9f014e919b MLK-20598 dmaengine: imx-sdma: fix potential system hang
In multi audio play/stop case,sdma_alloc_chan_resources/
sdma_free_chan_resources will be called quickly, especially,dma done
interrupt comes after sdma_free_chan_resources, thus, system will be
hang in interrupt since it'll check sdma register but clocks have
already been disabled in sdma_free_chan_resources. To avoid it, enable
clock in isr.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit 80b0e31cdd38d77ea5b0a116fe9f2b2dec23dd2b)
2020-04-10 01:03:26 +08:00
Iuliana Prodan 9d481aee74 MLK-23620-2 dma: caam - update the check for the return code of caam_jr_enqueue function
In commit 4d370a1036 ("crypto: caam - change return code in caam_jr_enqueue function"),
the return code of caam_jr_enqueue function was changed
from 0 to -EINPROGRESS, in case of success, -ENOSPC in case
the CAAM is busy (has no space left in job ring queue),
-EIO if it cannot map the caller's descriptor.

Update the case for break from the loop of caam_dma_prep_memcpy
based on the new return code from caam_jr_enqueue function.

Fixes: 4d370a1036 ("crypto: caam - change return code in caam_jr_enqueue function")
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
2020-03-19 11:07:32 +02:00
Dan Carpenter 5293e17978 dmaengine: coh901318: Fix a double lock bug in dma_tc_handle()
commit 36d5d22090 upstream.

The caller is already holding the lock so this will deadlock.

Fixes: 0b58828c92 ("DMAENGINE: COH 901 318 remove irq counting")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/20200217144050.3i4ymbytogod4ijn@kili.mountain
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-12 13:00:30 +01:00
Dmitry Osipenko ac5e2d2d5f dmaengine: tegra-apb: Prevent race conditions of tasklet vs free list
commit c33ee1301c upstream.

The interrupt handler puts a half-completed DMA descriptor on a free list
and then schedules tasklet to process bottom half of the descriptor that
executes client's callback, this creates possibility to pick up the busy
descriptor from the free list. Thus, let's disallow descriptor's re-use
until it is fully processed.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200209163356.6439-3-digetx@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-12 13:00:23 +01:00
Dmitry Osipenko 454ee4a820 dmaengine: tegra-apb: Fix use-after-free
commit 94788af4ed upstream.

I was doing some experiments with I2C and noticed that Tegra APB DMA
driver crashes sometime after I2C DMA transfer termination. The crash
happens because tegra_dma_terminate_all() bails out immediately if pending
list is empty, and thus, it doesn't release the half-completed descriptors
which are getting re-used before ISR tasklet kicks-in.

 tegra-i2c 7000c400.i2c: DMA transfer timeout
 elants_i2c 0-0010: elants_i2c_irq: failed to read data: -110
 ------------[ cut here ]------------
 WARNING: CPU: 0 PID: 142 at lib/list_debug.c:45 __list_del_entry_valid+0x45/0xac
 list_del corruption, ddbaac44->next is LIST_POISON1 (00000100)
 Modules linked in:
 CPU: 0 PID: 142 Comm: kworker/0:2 Not tainted 5.5.0-rc2-next-20191220-00175-gc3605715758d-dirty #538
 Hardware name: NVIDIA Tegra SoC (Flattened Device Tree)
 Workqueue: events_freezable_power_ thermal_zone_device_check
 [<c010e5c5>] (unwind_backtrace) from [<c010a1c5>] (show_stack+0x11/0x14)
 [<c010a1c5>] (show_stack) from [<c0973925>] (dump_stack+0x85/0x94)
 [<c0973925>] (dump_stack) from [<c011f529>] (__warn+0xc1/0xc4)
 [<c011f529>] (__warn) from [<c011f7e9>] (warn_slowpath_fmt+0x61/0x78)
 [<c011f7e9>] (warn_slowpath_fmt) from [<c042497d>] (__list_del_entry_valid+0x45/0xac)
 [<c042497d>] (__list_del_entry_valid) from [<c047a87f>] (tegra_dma_tasklet+0x5b/0x154)
 [<c047a87f>] (tegra_dma_tasklet) from [<c0124799>] (tasklet_action_common.constprop.0+0x41/0x7c)
 [<c0124799>] (tasklet_action_common.constprop.0) from [<c01022ab>] (__do_softirq+0xd3/0x2a8)
 [<c01022ab>] (__do_softirq) from [<c0124683>] (irq_exit+0x7b/0x98)
 [<c0124683>] (irq_exit) from [<c0168c19>] (__handle_domain_irq+0x45/0x80)
 [<c0168c19>] (__handle_domain_irq) from [<c043e429>] (gic_handle_irq+0x45/0x7c)
 [<c043e429>] (gic_handle_irq) from [<c0101aa5>] (__irq_svc+0x65/0x94)
 Exception stack(0xde2ebb90 to 0xde2ebbd8)

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20200209163356.6439-2-digetx@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-12 13:00:23 +01:00
Frieder Schrempf 1cdb964611 dmaengine: imx-sdma: Fix the event id check to include RX event for UART6
commit 25962e1a7f upstream.

On i.MX6UL/ULL and i.MX6SX the DMA event id for the RX channel of
UART6 is '0'. To fix the broken DMA support for UART6, we change
the check for event_id0 to include '0' as a valid id.

Fixes: 1ec1e82f25 ("dmaengine: Add Freescale i.MX SDMA support")
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200225082139.7646-1-frieder.schrempf@kontron.de
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-12 13:00:23 +01:00
Martin Fuzzey 772e5f29c9 dmaengine: imx-sdma: fix context cache
commit d288bddd83 upstream.

There is a DMA problem with the serial ports on i.MX6.

When the following sequence is performed:

1) Open a port
2) Write some data
3) Close the port
4) Open a *different* port
5) Write some data
6) Close the port

The second write sends nothing and the second close hangs.
If the first close() is omitted it works.

Adding logs to the the UART driver shows that the DMA is being setup but
the callback is never invoked for the second write.

This used to work in 4.19.

Git bisect leads to:
	ad0d92d: "dmaengine: imx-sdma: refine to load context only once"

This commit adds a "context_loaded" flag used to avoid unnecessary context
setups.
However the flag is only reset in sdma_channel_terminate_work(),
which is only invoked in a worker triggered by sdma_terminate_all() IF
there is an active descriptor.

So, if no active descriptor remains when the channel is terminated, the
flag is not reset and, when the channel is later reused the old context
is used.

Fix the problem by always resetting the flag in sdma_free_chan_resources().

Cc: stable@vger.kernel.org
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Fixes: ad0d92d7ba ("dmaengine: imx-sdma: refine to load context only once")
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Link: https://lore.kernel.org/r/1580305274-27274-1-git-send-email-martin.fuzzey@flowbird.group
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-12 13:00:23 +01:00
Jason Liu 335d2828a9 This is the 5.4.24 stable release
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Merge tag 'v5.4.24' into imx_5.4.y

Merge Linux stable release v5.4.24 into imx_5.4.y

* tag 'v5.4.24': (3306 commits)
  Linux 5.4.24
  blktrace: Protect q->blk_trace with RCU
  kvm: nVMX: VMWRITE checks unsupported field before read-only field
  ...

Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>

 Conflicts:
	arch/arm/boot/dts/imx6sll-evk.dts
	arch/arm/boot/dts/imx7ulp.dtsi
	arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
	drivers/clk/imx/clk-composite-8m.c
	drivers/gpio/gpio-mxc.c
	drivers/irqchip/Kconfig
	drivers/mmc/host/sdhci-of-esdhc.c
	drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
	drivers/net/can/flexcan.c
	drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
	drivers/net/ethernet/mscc/ocelot.c
	drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
	drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
	drivers/net/phy/realtek.c
	drivers/pci/controller/mobiveil/pcie-mobiveil-host.c
	drivers/perf/fsl_imx8_ddr_perf.c
	drivers/tee/optee/shm_pool.c
	drivers/usb/cdns3/gadget.c
	kernel/sched/cpufreq.c
	net/core/xdp.c
	sound/soc/fsl/fsl_esai.c
	sound/soc/fsl/fsl_sai.c
	sound/soc/sof/core.c
	sound/soc/sof/imx/Kconfig
	sound/soc/sof/loader.c
2020-03-08 18:57:18 +08:00
Greg Kroah-Hartman 341c8e03a9 Revert "dmaengine: imx-sdma: Fix memory leak"
This reverts commit 8a7aa4feea which is
commit 02939cd167 upstream.

Andreas writes:
	This patch breaks our imx6 board with the attached trace.
	Reverting the patch makes it boot again.

Reported-by: Andreas Tobler <andreas.tobler@onway.ch>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Robin Gong <yibin.gong@nxp.com>
Cc: Vinod Koul <vkoul@kernel.org>
Cc: Sasha Levin <sashal@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-02-28 17:22:24 +01:00
Robin Gong c2c7f599ab MLK-23400-1: dmaengine: imx-sdma: add sdma restore back for i.mx8mp
Add sdma restore back for i.mx8mp since its power resource audioimx will
be off after suspend.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
2020-02-28 19:10:32 +08:00
Peng Ma 8e59880124 dmaengine: fsl-edma: Add eDMA support for QorIQ LS1028A platform
Our platforms(such as LS1021A, LS1012A, LS1043A, LS1046A, LS1028A) with
below registers(CHCFG0 - CHCFG15) of eDMA as follows:
*-----------------------------------------------------------*
|     Offset   |	OTHERS			|		LS1028A			|
|--------------|--------------------|-----------------------|
|     0x0      |        CHCFG0      |           CHCFG3      |
|--------------|--------------------|-----------------------|
|     0x1      |        CHCFG1      |           CHCFG2      |
|--------------|--------------------|-----------------------|
|     0x2      |        CHCFG2      |           CHCFG1      |
|--------------|--------------------|-----------------------|
|     0x3      |        CHCFG3      |           CHCFG0      |
|--------------|--------------------|-----------------------|
|     ...      |        ......      |           ......      |
|--------------|--------------------|-----------------------|
|     0xC      |        CHCFG12     |           CHCFG15     |
|--------------|--------------------|-----------------------|
|     0xD      |        CHCFG13     |           CHCFG14     |
|--------------|--------------------|-----------------------|
|     0xE      |        CHCFG14     |           CHCFG13     |
|--------------|--------------------|-----------------------|
|     0xF      |        CHCFG15     |           CHCFG12     |
*-----------------------------------------------------------*

This patch is to improve edma driver to fit LS1028A platform.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Link: https://lore.kernel.org/r/20191212033714.4090-1-peng.ma@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
(cherry picked from commit e961f8b923ecb0875178fde884f277837b08fd4f)
2020-02-26 04:17:30 +08:00
Sascha Hauer 8a7aa4feea dmaengine: imx-sdma: Fix memory leak
[ Upstream commit 02939cd167 ]

The current descriptor is not on any list of the virtual DMA channel.
Once sdma_terminate_all() is called when a descriptor is currently
in flight then this one is forgotten to be freed. We have to call
vchan_terminate_vdesc() on this descriptor to re-add it to the lists.
Now that we also free the currently running descriptor we can (and
actually have to) remove the current descriptor from its list also
for the cyclic case.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Tested-by: Robin Gong <yibin.gong@nxp.com>
Link: https://lore.kernel.org/r/20191216105328.15198-10-s.hauer@pengutronix.de
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-02-24 08:36:40 +01:00
Logan Gunthorpe f99958a96c dmaengine: Store module owner in dma_device struct
[ Upstream commit dae7a589c1 ]

dma_chan_to_owner() dereferences the driver from the struct device to
obtain the owner and call module_[get|put](). However, if the backing
device is unbound before the dma_device is unregistered, the driver
will be cleared and this will cause a NULL pointer dereference.

Instead, store a pointer to the owner module in the dma_device struct
so the module reference can be properly put when the channel is put, even
if the backing device was destroyed first.

This change helps to support a safer unbind of DMA engines.
If the dma_device is unregistered in the driver's remove function,
there's no guarantee that there are no existing clients and a users
action may trigger the WARN_ONCE in dma_async_device_unregister()
which is unlikely to leave the system in a consistent state.
Instead, a better approach is to allow the backing driver to go away
and fail any subsequent requests to it.

Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
Link: https://lore.kernel.org/r/20191216190120.21374-2-logang@deltatee.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-02-24 08:36:40 +01:00
Chen Zhou 77b131f652 dmaengine: fsl-qdma: fix duplicated argument to &&
[ Upstream commit 4b04817885 ]

There is duplicated argument to && in function fsl_qdma_free_chan_resources,
which looks like a typo, pointer fsl_queue->desc_pool also needs NULL check,
fix it.
Detected with coccinelle.

Fixes: b092529e0a ("dmaengine: fsl-qdma: Add qDMA controller driver for Layerscape SoCs")
Signed-off-by: Chen Zhou <chenzhou10@huawei.com>
Reviewed-by: Peng Ma <peng.ma@nxp.com>
Tested-by: Peng Ma <peng.ma@nxp.com>
Link: https://lore.kernel.org/r/20200120125843.34398-1-chenzhou10@huawei.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-02-24 08:36:29 +01:00
Chuhong Yuan 2cf2b620af dmaengine: axi-dmac: add a check for devm_regmap_init_mmio
commit a5b982af95 upstream.

The driver misses checking the result of devm_regmap_init_mmio().
Add a check to fix it.

Fixes: fc15be39a8 ("dmaengine: axi-dmac: add regmap support")
Signed-off-by: Chuhong Yuan <hslester96@gmail.com>
Reviewed-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Link: https://lore.kernel.org/r/20191209085711.16001-1-hslester96@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-02-14 16:34:19 -05:00
Chuhong Yuan ca4c17f210 dmaengine: ti: edma: fix missed failure handling
[ Upstream commit 340049d453 ]

When devm_kcalloc fails, it forgets to call edma_free_slot.
Replace direct return with failure handler to fix it.

Fixes: 1be5336bc7 ("dmaengine: edma: New device tree binding")
Signed-off-by: Chuhong Yuan <hslester96@gmail.com>
Link: https://lore.kernel.org/r/20191118073802.28424-1-hslester96@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-01-26 10:01:08 +01:00
Alexander.Barabash@dell.com 93ed80d6f1 ioat: ioat_alloc_ring() failure handling.
[ Upstream commit b0b5ce1010 ]

If dma_alloc_coherent() returns NULL in ioat_alloc_ring(), ring
allocation must not proceed.

Until now, if the first call to dma_alloc_coherent() in
ioat_alloc_ring() returned NULL, the processing could proceed, failing
with NULL-pointer dereferencing further down the line.

Signed-off-by: Alexander Barabash <alexander.barabash@dell.com>
Acked-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/75e9c0e84c3345d693c606c64f8b9ab5@x13pwhopdag1307.AMER.DELL.COM
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-01-17 19:49:06 +01:00
John Stultz be5fa7e252 dmaengine: k3dma: Avoid null pointer traversal
[ Upstream commit 2f42e05b94 ]

In some cases we seem to submit two transactions in a row, which
causes us to lose track of the first. If we then cancel the
request, we may still get an interrupt, which traverses a null
ds_run value.

So try to avoid starting a new transaction if the ds_run value
is set.

While this patch avoids the null pointer crash, I've had some
reports of the k3dma driver still getting confused, which
suggests the ds_run/ds_done value handling still isn't quite
right. However, I've not run into an issue recently with it
so I think this patch is worth pushing upstream to avoid the
crash.

Signed-off-by: John Stultz <john.stultz@linaro.org>
[add ss tag]
Link: https://lore.kernel.org/r/20191218190906.6641-1-john.stultz@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-01-17 19:49:06 +01:00
Andy Shevchenko 8fa2c2ca23 dmaengine: dw: platform: Mark 'hclk' clock optional
commit f27c22736d upstream.

On some platforms the clock can be fixed rate, always running one and
there is no need to do anything with it.

In order to support those platforms, switch to use optional clock.

Fixes: f8d9ddbc28 ("dmaengine: dw: platform: Enable iDMA 32-bit on Intel Elkhart Lake")
Depends-on: 60b8f0ddf1 ("clk: Add (devm_)clk_get_optional() functions")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://lore.kernel.org/r/20190924085116.83683-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-01-17 19:48:49 +01:00
Peter Ujfalusi fdfd8f9ef2 dmaengine: virt-dma: Fix access after free in vchan_complete()
commit 24461d9792 upstream.

vchan_vdesc_fini() is freeing up 'vd' so the access to vd->tx_result is
via already freed up memory.

Move the vchan_vdesc_fini() after invoking the callback to avoid this.

Fixes: 09d5b702b0 ("dmaengine: virt-dma: store result on dma descriptor")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Link: https://lore.kernel.org/r/20191220131100.21804-1-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-01-09 10:20:00 +01:00
Paul Cercueil 61dc7d025d dmaengine: dma-jz4780: Also break descriptor chains on JZ4725B
commit a40c94be23 upstream.

It turns out that the JZ4725B displays the same buggy behaviour as the
JZ4740 that was described in commit f4c255f1a7 ("dmaengine: dma-jz4780:
Break descriptor chains on JZ4740").

Work around it by using the same workaround previously used for the
JZ4740.

Fixes commit f4c255f1a7 ("dmaengine: dma-jz4780: Break descriptor
chains on JZ4740")

Cc: <stable@vger.kernel.org>
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20191210165545.59690-1-paul@crapouillou.net
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-01-09 10:19:58 +01:00
Krzysztof Kozlowski 37958001e1 dmaengine: fsl-qdma: Handle invalid qdma-queue0 IRQ
[ Upstream commit 41814c4ead ]

platform_get_irq_byname() might return -errno which later would be cast
to an unsigned int and used in IRQ handling code leading to usage of
wrong ID and errors about wrong irq_base.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Peng Ma <peng.ma@nxp.com>
Tested-by: Peng Ma <peng.ma@nxp.com>
Link: https://lore.kernel.org/r/20191004150826.6656-1-krzk@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-01-04 19:17:01 +01:00
Nicholas Graumann 2456880b7a dmaengine: xilinx_dma: Clear desc_pendingcount in xilinx_dma_reset
[ Upstream commit 8a631a5a0f ]

Whenever we reset the channel, we need to clear desc_pendingcount
along with desc_submitcount. Otherwise when a new transaction is
submitted, the irq coalesce level could be programmed to an incorrect
value in the axidma case.

This behavior can be observed when terminating pending transactions
with xilinx_dma_terminate_all() and then submitting new transactions
without releasing and requesting the channel.

Signed-off-by: Nicholas Graumann <nick.graumann@gmail.com>
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Link: https://lore.kernel.org/r/1571150904-3988-8-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-01-04 19:16:41 +01:00
Han Xu 509289ed60 LF-251-2: dma: mxs-dma: switch from dma_coherent to dma_pool
create one dma_pool dedicate for all following dma_alloc and avoid
keeping allocate available memories.

Signed-off-by: Han Xu <han.xu@nxp.com>
2019-12-04 23:54:06 -06:00
Han Xu 49fc3313af LF-251-1: dma: mxs-dma: enable runtime PM for mxs-dma
enable runtime PM for mxs-dma

Signed-off-by: Han Xu <han.xu@nxp.com>
2019-12-04 23:54:06 -06:00
Robby Cai 4cfc9a7d83 LF-105-1 dmaengine: pxp: fix build warning of fall through
Fix the following build warning:
../drivers/dma/pxp/pxp_dma_v3.c: In function 'pxp_store_shift_ctrl_config':
../drivers/dma/pxp/pxp_dma_v3.c:1700:17: warning: this statement may fall through [-Wimplicit-fallthrough=]
    shift_bypass = 1;
    ~~~~~~~~~~~~~^~~
../drivers/dma/pxp/pxp_dma_v3.c:1701:3: note: here
   case PXP_PIX_FMT_YVYU:
   ^~~~
../drivers/dma/pxp/pxp_dma_v3.c:1705:17: warning: this statement may fall through [-Wimplicit-fallthrough=]
    shift_bypass = 1;
    ~~~~~~~~~~~~~^~~
../drivers/dma/pxp/pxp_dma_v3.c:1706:3: note: here
   case PXP_PIX_FMT_NV61:
   ^~~~

Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit c1ca344b32c914c89cbcf307a2e1313ad82a0b71)
2019-12-03 18:09:26 +08:00
Dong Aisheng 2c04041962 Merge branch 'pxp/next' into next
* pxp/next:
  media: pxp device: fix kernel dump when run pxp_test
  media: v4l2: add pxp_v4l2 driver
  dma: pxp: porting pxp dma driver from imx_4.19.y
2019-12-02 18:05:22 +08:00
Dong Aisheng 52e3d2b6ed Merge remote-tracking branch 'origin/dma/sdma' into dma/next
* origin/dma/sdma: (23 commits)
  LF-301: dmaengine: imx-sdma: Add once more loading firmware
  LF-246: dmaengine: imx-sdma: correct is_ram_script checking
  MLK-23005: dmaengine: imx-sdma: correct data size of channel context
  MLK-22972 dmaengine: imx-sdma: correct the script number for v3
  dma: imx-sdma: Add pm_ops to support suspend & resume
  ...
2019-12-02 18:01:15 +08:00
Robin Gong 5ebe728cc7 LF-301: dmaengine: imx-sdma: Add once more loading firmware
In case 60 seconds maybe not enough for Yocto loading sdma firmware on
some poor performance chips such as i.mx6sll in nfs case, add another
round to load firmware.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
2019-12-03 02:06:10 +08:00
Dong Aisheng 11adda239a Merge remote-tracking branch 'origin/dma/qdma' into dma/next
* origin/dma/qdma:
  dmaengine: fsl-dpaa2-qdma: Add NXP dpaa2 qDMA controller driver for Layerscape SoCs
  dmaengine: fsl-dpaa2-qdma: Add the DPDMAI(Data Path DMA Interface) support
2019-12-02 18:01:15 +08:00
Dong Aisheng 484805c54b Merge remote-tracking branch 'origin/dma/mxsdma' into dma/next
* origin/dma/mxsdma:
  dma: mxs-dma: change the way to register the probe function
  MLK-19897: dma: mxs-dma: filter out the unrelated dma channels
2019-12-02 18:01:14 +08:00
Dong Aisheng c0280c514d Merge remote-tracking branch 'origin/dma/edma' into dma/next
* origin/dma/edma: (23 commits)
  MLK-22909 dmaengine: fsl-edma-v3: clear interrupt coming after channel terminated
  MLK-22302-2: dmaengine: fsl-edma-v3: fix build warning with CONFIG_PM_SLEEP=n
  MLK-22284-2 dmaengine: fsl-edma-v3: check dma description before register touch
  MLK-22284-1 dmaengine: fsl-edma-v3: add power domains for each channel
  MLK-21443: dmaengine: fsl-edma-v3: clear pending irq before request irq
  ...
2019-12-02 18:01:14 +08:00
Robin Gong 122200c5fa LF-246: dmaengine: imx-sdma: correct is_ram_script checking
Correct is_ram_script checking in case sdma firmware not loaded as
expected, otherwise all scripts are considered as rom script without
correct "sdma firmware not ready!" since sdma->ram_code_start is 0.

Note: only add the doubtless is_ram_script for sdma-imx6q.bin/sdma-imx7d.
bin , and leave the legacy i.mx5x/i.mx3x/i.mx2x firmware alone since not
sure which of the remain scripts should be in ram.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
2019-11-29 20:54:39 +08:00
Horia Geantă 5393bb7ad5 dma: caam: fix compilation error
Fix compilation error, introduced by incorrect rebase of the
commit 9c51c141264c ("dma: caam: add dma memcpy driver"
on top of upstream
commit 1bcdf5a00f41 ("crypto: caam - make CAAM_PTR_SZ dynamic")

Fixes: 9c51c141264c ("dma: caam: add dma memcpy driver")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2019-11-25 16:03:30 +08:00
Peng Ma 99b7650327 dma: caam: add dma memcpy driver
This module introduces a memcpy DMA driver based on the DMA capabilities
of the CAAM hardware block. CAAM DMA is a platform driver that is only
probed if the device is defined in the device tree. The driver creates
a DMA channel for each JR of the CAAM. This introduces a dependency on
the JR driver. Therefore a defering mechanism was used to ensure that
the CAAM DMA driver is probed only after the JR driver.

Signed-off-by: Radu Alexe <radu.alexe@nxp.com>
Signed-off-by: Tudor Ambarus <tudor-dan.ambarus@nxp.com>
Signed-off-by: Rajiv Vishwakarma <rajiv.vishwakarma@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
2019-11-25 16:03:29 +08:00
Peng Ma 1154aa773a dmaengine: fsl-dpaa2-qdma: Add NXP dpaa2 qDMA controller driver for Layerscape SoCs
DPPA2(Data Path Acceleration Architecture 2) qDMA supports
virtualized channel by allowing DMA jobs to be enqueued into
different work queues. Core can initiate a DMA transaction by
preparing a frame descriptor(FD) for each DMA job and enqueuing
this job through a hardware portal. DPAA2 components can also
prepare a FD and enqueue a DMA job through a hardware portal.
The qDMA prefetches DMA jobs through DPAA2 hardware portal. It
then schedules and dispatches to internal DMA hardware engines,
which generate read and write requests. Both qDMA source data and
destination data can be either contiguous or non-contiguous using
one or more scatter/gather tables.
The qDMA supports global bandwidth flow control where all DMA
transactions are stalled if the bandwidth threshold has been reached.
Also supported are transaction based read throttling.

Add NXP dppa2 qDMA to support some of Layerscape SoCs.
such as: LS1088A, LS208xA, LX2, etc.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
2019-11-25 16:03:26 +08:00
Peng Ma 1e9b1c9bd7 dmaengine: fsl-dpaa2-qdma: Add the DPDMAI(Data Path DMA Interface) support
The MC(Management Complex) exports the DPDMAI(Data Path DMA Interface)
object as an interface to operate the DPAA2(Data Path Acceleration
Architecture 2) qDMA Engine. The DPDMAI enables sending frame-based
requests to qDMA and receiving back confirmation response on transaction
completion, utilizing the DPAA2 QBMan(Queue Manager and Buffer Manager
hardware) infrastructure. DPDMAI object provides up to two priorities for
processing qDMA requests.
The following list summarizes the DPDMAI main features and capabilities:
	1. Supports up to two scheduling priorities for processing
	service requests.
	- Each DPDMAI transmit queue is mapped to one of two service
	priorities, allowing further prioritization in hardware between
	requests from different DPDMAI objects.
	2. Supports up to two receive queues for incoming transaction
	completion confirmations.
	- Each DPDMAI receive queue is mapped to one of two receive
	priorities, allowing further prioritization between other
	interfaces when associating the DPDMAI receive queues to DPIO
	or DPCON(Data Path Concentrator) objects.
	3. Supports different scheduling options for processing received
	packets:
	- Queues can be configured either in 'parked' mode (default),
	or attached to a DPIO object, or attached to DPCON object.
	4. Allows interaction with one or more DPIO objects for
	dequeueing/enqueueing frame descriptors(FD) and for
	acquiring/releasing buffers.
	5. Supports enable, disable, and reset operations.

Add dpdmai to support some platforms with dpaa2 qdma engine.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
2019-11-25 16:03:25 +08:00
Robin Gong 5882a6f8ef MLK-22909 dmaengine: fsl-edma-v3: clear interrupt coming after channel terminated
Clear EDMA_CH_INT in case dma done interrupt comes after channel terminated
instead of channel free-ed, otherwise, RCU maybe caught because it's
ignored without interrupt status cleared as Android team report in Monkey
test.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit ef91ff6ed465cebe2fe6483a480351abba36e237)
(cherry picked from commit 56ee55c71c5f3ef254acb4dee581e68f79ef13a5)
2019-11-25 16:03:23 +08:00
Robin Gong 3f8b89fadd MLK-22302-2: dmaengine: fsl-edma-v3: fix build warning with CONFIG_PM_SLEEP=n
Fix build waring with CONFIG_PM_SLEEP=n.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Andy Duan <fugang.duan@nxp.com>
(cherry picked from commit dfe2a755209615f9592ed937957b2efdc3b6d6c0)
2019-11-25 16:03:23 +08:00
Robin Gong 7d7fb3da1c MLK-22284-2 dmaengine: fsl-edma-v3: check dma description before register touch
Check dma desscription firstly to ignore any unexpected interrupt
after channel terminate, otherwise, still have chance to touch channel
register whose power has been already off.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: S.j. Wang <shengjiu.wang@nxp.com>
(cherry picked from commit fd073e017e317006a4c254ca5ae3ea17b6f32502)
2019-11-25 16:03:23 +08:00
Robin Gong cfe6412faa MLK-22284-1 dmaengine: fsl-edma-v3: add power domains for each channel
Add power domains for each dma channel so that edma channel could
know the power state of every dma channel anytime and clear easily
unexpected interrupt which triggered before the last partition reset.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: S.j. Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 0b6da46b7bdb2284e24757d48466268b9feb5b7c)
2019-11-25 16:03:22 +08:00
Robin Gong e8e9c9bc99 MLK-21443: dmaengine: fsl-edma-v3: clear pending irq before request irq
edma interrupt maybe happened during reboot or watchdog reset, meanwhile
gic never power down on i.mx8QM/QXP, thus the unexpect irq will come in
once edma driver request irq at probe phase. Unfortunately, at that time
that edma channel's power domain which power-up by customer driver such
as audio/uart driver may not be ready, so kernel panic triggered once
touch such edma registers which still not power up in interrupt handler.
Move request irq from probe to alloc dma channel so that edma channel's
power domain has already been powered, besides, clear meaningless
interrupt before request irq.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit 0a0d8f8b944094342fda18f23f3ac13b8a73871d)
2019-11-25 16:03:21 +08:00
Robin Gong f55fd6f075 MLK-22798-1: dmaengine: fsl-edma-v3: do not enable interrupt in dev_2_dev
Do not enable interrupt in dev_2_dev with cyclic case, since in such
case no any interrupt needed. Otherwise many interrupt will come in
every 64 words transfered in ASRC case, which cause heavy system
loading.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit f0a3172e1ceb04c46377160486ad7dc6ee022850)
2019-11-25 16:03:20 +08:00
Fugang Duan 5b2c91a75e dmaengine: fsl-edma: calculate the real count for slave sg
Calculate the rela count for current slave sg after eDMA stop.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2019-11-25 16:03:19 +08:00
Robin Gong 1432768dff MLK-20205-1: dmaengine: fsl-edma-v3: fix NULL pointer dereference
Fix 'null pointer dereferences issue' reported by coverity(CID-1477441).

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit 5343c0018af0af2eb3bb90c5a75e765b851a2c12)
2019-11-25 16:03:19 +08:00
Robin Gong 9ff1f271a0 MLK-19931-1: dmaengine: fsl-edma-v3: fix potential kernel crash in cyclic
There is one potential race condition in virt-dma framework as below:
terminate dma channel after the last dma done interrupt, but before
vchan_complete tasklet scheduled, thus the free-ed 'vd' (free in
fsl_edma3_terminate_all) maybe still be touched in vchan_complete()
which cause NULL pointer crash.
  Kernel community noticed this issue and fix it at virt-dma level:
https://patchwork.kernel.org/patch/10057791/. To avoid backport too
much patches, set 'vc->cyclic = NULL' in terminate dma channel
interfaces to fix such issue easily.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit 18c9083826400a2ef731496391a0b5e71d461a5f)
2019-11-25 16:03:18 +08:00
Robin Gong 0b02c5f7d5 MLK-19022-2: dmaengine: fsl-edma-v3: add device_synchronize
Add device_synchronize for edma driver, since some driver such as
Audio need it to make sure dma done callback never come out after
resource related with dma channel free-ed by Audio driver. Android
team report such issue on MA-12087.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit 483519c063b08fc1ce0dd297b6c186799cf639d6)
(cherry picked from commit 29ab274aca01ef8f5fc70e8c0a6d43a5bdb3c689)
2019-11-25 16:03:17 +08:00
Robin Gong 9dc7c227d4 MLK-18248: dma: fsl-edma-v3: avoid touch unused edma channel
Avoid touch unused edma channel register in susped/resume, otherwise,
kernel crash if XRDC enabled in scfw.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit aa221c4aba34c6ce1ce5f561fa073bb8297cc0ff)
2019-11-25 16:03:17 +08:00
Robin Gong e3890608e2 MLK-17782 dma: fsl-edma-v3: fix issue reported by Coverity
Fix below issue reported by Coverity, actually, don't need this
condition check here, remove it.

CID undefined (#1 of 1): Wrong operator used (CONSTANT_EXPRESSION_RESULT)operator_confusion:
(16UL /* 1UL << 4 */) | (__u16)(__le16)tcd->csr is always 1/true regardless of the values of its operand.
This occurs as the logical first operand of "&&".

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit ab942110975cadcde57ab1110df03f526bd3fec5)
2019-11-25 16:03:16 +08:00
Robin Gong e2c4230707 MLK-17094 dma: fsl-edma-v3: add suspend/resume to restore back channel registers
Add suspend to save channel registers and resume to restore them back since
edmav3 may powered off in suspend.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit 7eda1ae538ec7e7c0f993b3ea91805459f3dedd3)
2019-11-25 16:03:15 +08:00
Robin Gong f8e9e04f6d MLK-16482: dma: fsl-edma-v3: Fix RCU issue while playing Audio
That's caused by commit 593034f1b908 ("MLK-16437: dma: fsl-edma-v3:
fix kernel crash while edma interrupt trigger after channel disabled").
Because fsl_chan->vchan.lock will be hold always and trigger RCU report
as below:

1571.3  Playing WAVE '/mnt/nfs/vte_mx82/../test_stream/esai_stream/48k16bit-six.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Channels 6
1571.5  [ 4642.698771] INFO: rcu_preempt detected stalls on CPUs/tasks:
1571.6  [ 4642.704443] 0-...: (1 GPs behind) idle=2c5/140000000000000/0 softirq=155373/155374 fqs=2541
1571.7  [ 4642.712967] (detected by 2, t=5252 jiffies, g=104259, c=104258, q=22)
1571.8  [ 4642.719501] Task dump for CPU 0:
1571.9  [ 4642.722724] aplay R running task 0 15723 15721 0x00000202
1571.10  [ 4642.729786] Call trace:
1571.11  [ 4642.732239] [<ffff0000080855e4>] __switch_to+0x8c/0xa0
1571.12  [ 4642.737379] [<ffff0000084e3a48>] dma_chan_put+0x70/0xa0
1571.13  [ 4642.742603] [<ffff0000084e3aac>] dma_release_channel+0x34/0xa0
1571.14  [ 4642.748435] [<ffff000008972240>] fsl_asrc_dma_hw_free+0x38/0x50
1571.15  [ 4642.754358] [<ffff000008960568>] soc_pcm_hw_free+0x110/0x1a8
1571.16  [ 4642.760013] [<ffff000008963bcc>] dpcm_fe_dai_hw_free+0x6c/0xe0
1571.17  [ 4642.765844] [<ffff000008948ae8>] snd_pcm_common_ioctl1+0xb40/0xce0
1571.18  [ 4642.772028] [<ffff000008948e64>] snd_pcm_playback_ioctl1+0x1dc/0x310
1571.19  [ 4642.778378] [<ffff000008948fc0>] snd_pcm_playback_ioctl+0x28/0x40
1571.20  [ 4642.784470] [<ffff0000081ee0a4>] do_vfs_ioctl+0xa4/0x748
1571.21  [ 4642.789784] [<ffff0000081ee7d4>] SyS_ioctl+0x8c/0xa0
1571.22  [ 4642.794745] [<ffff000008082f4c>] __sys_trace_return+0x0/0x4
1571.23  [ 4705.718740] INFO: rcu_preempt detected stalls on CPUs/tasks:
1571.24  [ 4705.724420] 0-...: (1 GPs behind) idle=2c5/140000000000000/0 softirq=155373/155374 fqs=10407
1571.25  [ 4705.733030] (detected by 1, t=21010 jiffies, g=104259, c=104258, q=119)

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reported-by: Jason Liu <jason.hui.liu@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Fixes: 593034f1b908 ("MLK-16437: dma: fsl-edma-v3: fix kernel crash
while edma interrupt trigger after channel disabled").

(cherry picked from commit e62e8707154f47e168fcfd148e97be4e2f991898)
2019-11-25 16:03:14 +08:00
Robin Gong fe8cf28f2b MLK-16437: dma: fsl-edma-v3: fix kernel crash while edma interrupt trigger after channel disabled
edma interrupt may come after channel terminated, so should ignore
interrupts, else kernel crash as below since fsl_chan->edesc set
to NULL when terminate.

 606.837306] Unable to handle kernel NULL pointer dereference at virtual address 00000060
[  606.845411] pgd = ffff000009295000
[  606.848814] [00000060] *pgd=00000008bfffe003[  606.852906] , *pud=00000008bfffd003
 , *pmd=0000000000000000[  606.858395]
[  606.859885] Internal error: Oops: 96000006 1 PREEMPT SMP
[  606.865460] Modules linked in:
[  606.868522] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.9.11-03371-g9904ea0 #42
[  606.875832] Hardware name: Freescale i.MX8QXP LPDDR4 ARM2 (DT)
[  606.881662] task: ffff000009120680 task.stack: ffff000009110000
[  606.887588] PC is at fsl_edma3_tx_handler+0x50/0x150

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Tested-by: Daniel Baluta <daniel.baluta@nxp.com>
(cherry picked from commit 625afad5a0900bc3e3288510f61647b1d891a5a4)
2019-11-25 16:03:14 +08:00
Robin Gong 9d36acb860 MLK-16327-1: dma: fsl-edma-v3: make exclusive channel name for all edma channels
Since there are multi edmav3 instances on i.mx8, every edma channel name
is better unique.But so far, all edma channel name is 'edma-channel(id)-
tx',thus some edma channels which share the same channel id but different
edma instance will show the same channel name in kernel and this is not
friendly to debug in kernel.
  Now the edma channel name(interrupt-names property) is define in dts
as below:
        "edmaX-chanX-Xx"
             |     | |---> receive/transmit, r or t
             |     |---> channel id, the max number is 32
             |---> edma controller instance, 0, 1, 2,..etc
and get below correct name with 'cat /proc/interrupts':
 43:          0          0          0          0     GICv3 466 Level     edma0-chan8-rx
 44:          0          0          0          0     GICv3 467 Level     edma0-chan9-tx
 45:         79          0          0          0     GICv3 468 Level     edma0-chan10-rx
 46:        311          0          0          0     GICv3 469 Level     edma0-chan11-tx
 47:          0          0          0          0     GICv3 470 Level     edma0-chan12-rx
 48:          0          0          0          0     GICv3 471 Level     edma0-chan13-tx
 49:          0          0          0          0     GICv3 472 Level     edma0-chan14-rx
 50:          0          0          0          0     GICv3 473 Level     edma0-chan15-tx
 51:          0          0          0          0     GICv3 406 Level     edma2-chan0-tx
 52:          0          0          0          0     GICv3 407 Level     edma2-chan1-tx
 53:          0          0          0          0     GICv3 408 Level     edma2-chan2-tx
 54:          0          0          0          0     GICv3 409 Level     edma2-chan3-tx
 55:          0          0          0          0     GICv3 410 Level     edma2-chan4-tx
 56:          0          0          0          0     GICv3 411 Level     edma2-chan5-tx
 57:          0          0          0          0     GICv3 442 Level     edma2-chan6-rx, edma2-chan7-tx

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit af8e197a92c9c024ec4fbfcf543d744e81748773)
2019-11-25 16:03:13 +08:00
Robin Gong ec32139328 MLK-15330-3 dma: fsl-edma-v3: add dual fifo support
There is Audio dual fifo cause that fill fifo one by one and
loop back after every minor loop:
  -- fill the first 32bit width fifo
  -- fill the next 32bit width fifo
  -- +MLOFF signed offset after the above two FIFOs filled
  -- loop back to the first step to handle the next minor loop.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit 5aa5e9663bb3a834444b75ea086bef8c37ecb636)
2019-11-25 16:03:13 +08:00
Robin Gong 4688ef9be7 MLK-15330-1: dma: fsl-edma-v3: combine two cells into one
For dual fifo case, fsl-edma-v3 need add another cell. It's not friendly
for user and it's possible other cells maybe added to other use cases,
so combine two cells into one now, and for some special use cases such as
dual fifo property can directly be passed by one bit of cell3 rather than
another cell.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit 3ecd1b3382e2c746728842fb2c084fbb030eb5de)
2019-11-25 16:03:12 +08:00
Robin Gong b1b8c0ae94 MLK-15014 dma: fsl-edma-v3: clear DONE before E_SG enabled
Below described in RM, otherwise, channel error status(CHa_ES)
may be triggered:
The user must clear the CHa_CSR[DONE] bit before writing the
TCDa_CSR[MAJORELINK] or TCDa_CSR[ESG] bits.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit c4164d0a15306174056c6ff423ba2408dd901fcf)
2019-11-25 16:03:12 +08:00
Shengjiu Wang f61b296ab2 MLK-15003-1: DMA: fsl-edma-v3: add one more parameter for xlate
The parameter is "is_remote", which is to use remote access for
edma, the default access is local access.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit eee976b30b0523680f30e762742984f5b5a01b97)
2019-11-25 16:03:10 +08:00
Robin Gong 2f9e74892d MLK-14610 DMA: fsl-edma-v3: add fsl-edma-v3 support
Add edma-v3 driver on i.mx8qm.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit d0ac0971c2e637ebddc853f12f71d130f5df4f91)
2019-11-25 16:03:10 +08:00
Robin Gong 58d26348b1 MLK-23005: dmaengine: imx-sdma: correct data size of channel context
Correct data size of channel context which would be save and restore back
during suspend/resume. Otherwise, potential memory break may come as
USB met.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Reported-by: Jun Li <jun.li@nxp.com>
Tested-by: Jun Li <jun.li@nxp.com>
2019-11-25 16:03:05 +08:00
Fugang Duan bb526c17a4 MLK-22972 dmaengine: imx-sdma: correct the script number for v3
Correct the ram script number for v3.

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
2019-11-25 16:03:05 +08:00
Shengjiu Wang 64acbb6d0a dma: imx-sdma: Add pm_ops to support suspend & resume
Add pm_ops to support suspend & resume

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
2019-11-25 16:03:04 +08:00
Shengjiu Wang d75a298a95 dma: imx-sdma: Fix issue with IMX_DMATYPE_HDMI
There is no bds for HDMI, so add one more condition
for sdma_alloc_bd

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
2019-11-25 16:03:04 +08:00
Shengjiu Wang 95fdc2b77f MLK-22239-1: dmaengine: imx-sdma: Support 24bit/3bytes for sg mode
Support 24bit/3bytes for sg mode.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Acked-by: Robin Gong <yibin.gong@nxp.com>
2019-11-25 16:03:03 +08:00
Robin Gong b9416dfe21 dmaengine: imx-sdma: update sdma script for multi fifo on SAI
update sdma script for multi fifo SAI on i.mx8MQ. Besides,Add
new cell for sw_done/sw_done_selector, because PDM need enable
software done feature in sdma script(same multi fifo script).
The new fourth cell defined as below:
        Bit31: sw_done
        Bit15~bit0: selector
For example: 0x80000000 means sw_done enabled for done0 sector which
is for PDM on i.mx8mm.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
2019-11-25 16:03:02 +08:00
Shengjiu Wang 40373109c4 MLK-16885-1: DMA: imx-sdma: update the buswidth that is supported
update buswidth that is supported by sdma.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Signed-off-by: Srikanth Krishnakar <Srikanth_Krishnakar@mentor.com>
(cherry picked from commit c6e6f9cf2661dc1a5ba6fbcfdd15f096191ed47d)
2019-11-25 16:03:02 +08:00
Shengjiu Wang a89c75d447 MLK-11259-1: dmaengine: imx-sdma: support dual fifo for DEV_TO_DEV
As SSI has dual fifo, add src_dualfifo and dst_dualfifo in imx_dma_data
to support dual fifo in DMA_DEV_TO_DEV.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit cfde1308f170166a0099ca39ee8733895f9626f0)
(Vipul: Fixed merge conflicts)
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Signed-off-by: Srikanth Krishnakar <Srikanth_Krishnakar@mentor.com>

(cherry picked from commit 0ea90e5f83725fe5e4b8933cc546c1ff22156717)
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
2019-11-25 16:03:01 +08:00
Robin Gong e977370b6d dmaengine: imx-sdma: add sdma resume back after megafast off
On i.mx6sx or i.mx7d chip, megafast could be off in suspend which
means sdma controller will be power-ed off, thus sdma driver
should resume back including firmware loaded again.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
[ Aisheng: fix rebase conflict ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25 16:03:00 +08:00
Shengjiu Wang a3e3585408 dmaengine: imx-sdma: Add hdmi audio support in sdma
Add hdmi audio support.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
2019-11-25 16:02:59 +08:00
Nicolin Chen ff3799c817 dmaengine: imx-sdma: support allocate memory from iram
Allocate memory from SoC internal SRAM so that we can turn off
voltage of external DDR to save power if 'iram' property in dts.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
2019-11-25 16:02:59 +08:00
Robin Gong e4770db1f1 dmaengine: imx-sdma: fix ecspi1 rx dma not work on i.mx8mm
Because the number of ecspi1 rx event on i.mx8mm is 0, the condition
check ignore such special case without dma channel enabled, which caused
ecspi1 rx works failed. Actually, no need to check event_id0, checking
event_id1 is enough for DEV_2_DEV case because it's so lucky that event_id1
never be 0.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
2019-11-25 16:02:58 +08:00
Robin Gong d89ee194f6 dmaengine: imx-sdma: remove ERR009165 on i.mx6ul
ECSPI issue fixed from i.mx6ul at hardware level, no need
ERR009165 anymore on those chips such as i.mx8mq. Add i.mx6sx
from where i.mx6ul source.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
2019-11-25 16:02:57 +08:00
Robin Gong 7542e1d08a dma: engine: imx-sdma: add mcu_2_ecspi script
Add mcu_2_ecspi script to fix ecspi errata ERR009165.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
2019-11-25 16:02:56 +08:00
Robin Gong ea884be272 dmaengine: imx-sdma: remove dupilicated sdma_load_context
Since sdma_transfer_init() will do sdma_load_context before any
sdma transfer, no need once more in sdma_config_channel().

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
2019-11-25 16:02:56 +08:00
Robin Gong cdb5dd1f2b MLK-17385: dma: imx-sdma: update sdma script for multi fifo on SAI
update sdma script for multi fifo SAI on i.mx8MQ.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
[ Aisheng: fix build error ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-11-25 16:02:55 +08:00
Robin Gong 2cb2cdf8ed Revert "dmaengine: imx-sdma: refine to load context only once"
This reverts commit ad0d92d7ba, because
in spi-imx case, burst length may be changed dynamically.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
2019-11-25 16:02:53 +08:00
Han Xu f84f5223ac dma: mxs-dma: change the way to register the probe function
change the old way to register the probe function in driver

Signed-off-by: Han Xu <han.xu@nxp.com>
2019-11-25 16:02:51 +08:00
Han Xu 016b719166 MLK-19897: dma: mxs-dma: filter out the unrelated dma channels
update mxs-dma filter function to firstly filter the dma channels only
for mxs-dma, rather than checking unrelated dma chans in following code.

Signed-off-by: Han Xu <han.xu@nxp.com>
2019-11-25 16:02:51 +08:00
Robby Cai 3d64db930d media: pxp device: fix kernel dump when run pxp_test
In 5.x, the first parameter of dma_alloc_coherent() can't be 0, otherwise
the following dump will arise when run the command:
`/unit_tests/Display/pxp_test.out -I "-o 1.yuv" '. This patch fixed this.
And also, use register_chrdev instead of misc_register to make it clean.

[   53.838653] Internal error: Oops: 17 [#1] SMP ARM
[   53.844538] Modules linked in:
[   53.847610] CPU: 0 PID: 754 Comm: pxp_test.out Not tainted 5.4.0-rc5-03564-g9792b86 #46
[   53.855620] Hardware name: Freescale i.MX6 SoloX (Device Tree)
[   53.861473] PC is at dma_alloc_attrs+0x10/0x114
[   53.866015] LR is at pxp_device_ioctl+0x90c/0xe98
[   53.870728] pc : [<c01bf1e8>]    lr : [<c05eb360>]    psr: a0070013
[   53.877001] sp : ed4e7e74  ip : 00000001  fp : b6591f9c
[   53.882232] r10: 00000000  r9 : e47efd40  r8 : ed4e7ecc
[   53.887463] r7 : ed508cc0  r6 : c1408b08  r5 : 00000000  r4 : 00000051
[   53.893997] r3 : 00000cc1  r2 : e47efd4c  r1 : 00055000  r0 : 00000240
[   53.900533] Flags: NzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
[   53.907675] Control: 10c5387d  Table: ad14804a  DAC: 00000051
[   53.913428] Process pxp_test.out (pid: 754, stack limit = 0x(ptrval))
[   53.919878] Stack: (0xed4e7e74 to 0xed4e8000)
[   53.924245] 7e60:                                              00000051 b6591cf4 c1408b08
[   53.932434] 7e80: ed508cc0 ed4e7ecc e47efd40 00000000 b6591f9c c05eb360 00000000 c0605e08
[   53.940622] 7ea0: ed42ac00 c0607e3c 00000034 e47fe3c0 ed4e6000 00000034 c1408b08 c0605cc0
[   53.948810] 7ec0: ed4e7f78 00000000 ed4e6000 00000000 00054600 00000000 00000000 00000000
[   53.956998] 7ee0: c1408b08 0479b828 00000000 c1408b08 b6591cf4 e47fb640 c02b7b8c b6591cf4
[   53.965187] 7f00: ed4e6000 eca65e00 b6591f9c c02b71e0 c02c4bbc c0192be8 ec2dc380 c018dc54
[   53.973374] 7f20: c1408b08 00000001 00000000 0479b828 c15344fd 00000004 00004000 e47fb3c0
[   53.981562] 7f40: c15344fd c112a1d4 c110a05c c02c4bcc 00000000 00000000 c02c4aa8 00000000
[   53.989750] 7f60: e47fab41 0479b828 bee8aad0 e47fb641 e47fb640 00000004 c0145004 b6591cf4
[   53.997938] 7f80: ed4e6000 00000036 b6591f9c c02b7b8c b6591cf4 bee8aad0 b6591ce8 00000036
[   54.006125] 7fa0: c01011c4 c0101000 b6591cf4 bee8aad0 00000004 c0145004 b6591cf4 b6ee603c
[   54.014313] 7fc0: b6591cf4 bee8aad0 b6591ce8 00000036 00077858 00000000 bee8aad0 b6591f9c
[   54.022502] 7fe0: b6ee6018 b6591cac b6ed5848 b6e604bc 60070010 00000004 00000000 00000000
[   54.030699] [<c01bf1e8>] (dma_alloc_attrs) from [<00000034>] (0x34)
[   54.036981] Code: e92d4ff0 e1a05000 e2800d09 e59f60ec (e140a0d8)
[   54.043222] ---[ end trace d872f4c07e2464bf ]---

Signed-off-by: Robby Cai <robby.cai@nxp.com>
2019-11-25 15:45:52 +08:00
Robby Cai 1f862ce17f dma: pxp: porting pxp dma driver from imx_4.19.y
Porting pxp dma drivers v2 and v3 from imx_4.19.y

Signed-off-by: Robby Cai <robby.cai@nxp.com>
2019-11-25 15:45:52 +08:00
Tony Lindgren bacdcb6675 dmaengine: cppi41: Fix cppi41_dma_prep_slave_sg() when idle
Yegor Yefremov <yegorslists@googlemail.com> reported that musb and ftdi
uart can fail for the first open of the uart unless connected using
a hub.

This is because the first dma call done by musb_ep_program() must wait
if cppi41 is PM runtime suspended. Otherwise musb_ep_program() continues
with other non-dma packets before the DMA transfer is started causing at
least ftdi uarts to fail to receive data.

Let's fix the issue by waking up cppi41 with PM runtime calls added to
cppi41_dma_prep_slave_sg() and return NULL if still idled. This way we
have musb_ep_program() continue with PIO until cppi41 is awake.

Fixes: fdea2d09b9 ("dmaengine: cppi41: Add basic PM runtime support")
Reported-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cc: stable@vger.kernel.org # v4.9+
Link: https://lore.kernel.org/r/20191023153138.23442-1-tony@atomide.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-10-23 21:15:21 +05:30
Jeffrey Hugo 7667819385 dmaengine: qcom: bam_dma: Fix resource leak
bam_dma_terminate_all() will leak resources if any of the transactions are
committed to the hardware (present in the desc fifo), and not complete.
Since bam_dma_terminate_all() does not cause the hardware to be updated,
the hardware will still operate on any previously committed transactions.
This can cause memory corruption if the memory for the transaction has been
reassigned, and will cause a sync issue between the BAM and its client(s).

Fix this by properly updating the hardware in bam_dma_terminate_all().

Fixes: e7c0fe2a5c ("dmaengine: add Qualcomm BAM dma driver")
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20191017152606.34120-1-jeffrey.l.hugo@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-10-18 13:27:58 +05:30
Baolin Wang ec1ac30959 dmaengine: sprd: Fix the possible memory leak issue
If we terminate the channel to free all descriptors associated with this
channel, we will leak the memory of current descriptor if the current
descriptor is not completed, since it had been deteled from the desc_issued
list and have not been added into the desc_completed list.

Thus we should check if current descriptor is completed or not, when freeing
the descriptors associated with one channel, if not, we should free it to
avoid this issue.

Fixes: 9b3b8171f7 ("dmaengine: sprd: Add Spreadtrum DMA driver")
Reported-by: Zhenfang Wang <zhenfang.wang@unisoc.com>
Tested-by: Zhenfang Wang <zhenfang.wang@unisoc.com>
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Link: https://lore.kernel.org/r/170dbbc6d5366b6fa974ce2d366652e23a334251.1570609788.git.baolin.wang@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-10-15 15:47:24 +05:30
Radhey Shyam Pandey 6c6de1ddb1 dmaengine: xilinx_dma: Fix control reg update in vdma_channel_set_config
In vdma_channel_set_config clear the delay, frame count and master mask
before updating their new values. It avoids programming incorrect state
when input parameters are different from default.

Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Acked-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/1569495060-18117-3-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-10-15 15:41:55 +05:30
Radhey Shyam Pandey 68fe2b520c dmaengine: xilinx_dma: Fix 64-bit simple AXIDMA transfer
In AXI DMA simple mode also pass MSB bits of source and destination
address to xilinx_write function. It fixes simple AXI DMA operation
mode using 64-bit addressing.

Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Link: https://lore.kernel.org/r/1569495060-18117-2-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-10-15 15:41:55 +05:30
Robin Gong bd73dfabdd dmaengine: imx-sdma: fix size check for sdma script_number
Illegal memory will be touch if SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3
(41) exceed the size of structure sdma_script_start_addrs(40),
thus cause memory corrupt such as slob block header so that kernel
trap into while() loop forever in slob_free(). Please refer to below
code piece in imx-sdma.c:
for (i = 0; i < sdma->script_number; i++)
	if (addr_arr[i] > 0)
		saddr_arr[i] = addr_arr[i]; /* memory corrupt here */
That issue was brought by commit a572460be9 ("dmaengine: imx-sdma: Add
support for version 3 firmware") because SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3
(38->41 3 scripts added) not align with script number added in
sdma_script_start_addrs(2 scripts).

Fixes: a572460be9 ("dmaengine: imx-sdma: Add support for version 3 firmware")
Cc: stable@vger.kernel
Link: https://www.spinics.net/lists/arm-kernel/msg754895.html
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reported-by: Jurgen Lambrecht <J.Lambrecht@TELEVIC.com>
Link: https://lore.kernel.org/r/1569347584-3478-1-git-send-email-yibin.gong@nxp.com
[vkoul: update the patch title]
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-10-14 13:33:44 +05:30
Sameer Pujar 9ec691f48b dmaengine: tegra210-adma: fix transfer failure
>From Tegra186 onwards OUTSTANDING_REQUESTS field is added in channel
configuration register(bits 7:4) which defines the maximum number of reads
from the source and writes to the destination that may be outstanding at
any given point of time. This field must be programmed with a value
between 1 and 8. A value of 0 will prevent any transfers from happening.

Thus added 'has_outstanding_reqs' bool member in chip data structure and is
set to false for Tegra210, since the field is not applicable. For Tegra186
it is set to true and channel configuration is updated with maximum
outstanding requests.

Fixes: 433de642a7 ("dmaengine: tegra210-adma: add support for Tegra186/Tegra194")
Cc: stable@vger.kernel.org
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://lore.kernel.org/r/1568626513-16541-1-git-send-email-spujar@nvidia.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-10-14 12:40:38 +05:30
Zhenfang Wang 8b6bc5fd71 dmaengine: sprd: Fix the link-list pointer register configuration issue
We will set the link-list pointer register point to next link-list
configuration's physical address, which can load DMA configuration
from the link-list node automatically.

But the link-list node's physical address can be larger than 32bits,
and now Spreadtrum DMA driver only supports 32bits physical address,
which may cause loading a incorrect DMA configuration when starting
the link-list transfer mode. According to the DMA datasheet, we can
use SRC_BLK_STEP register (bit28 - bit31) to save the high bits of the
link-list node's physical address to fix this issue.

Fixes: 4ac6954647 ("dmaengine: sprd: Support DMA link-list mode")
Signed-off-by: Zhenfang Wang <zhenfang.wang@unisoc.com>
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Link: https://lore.kernel.org/r/eadfe9295499efa003e1c344e67e2890f9d1d780.1568267061.git.baolin.wang@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-10-14 10:32:18 +05:30
Linus Torvalds 5c6bd5de3c Main MIPS changes for v5.4:
- boot_mem_map is removed, providing a nice cleanup made possible by the
   recent removal of bootmem.
 
 - Some fixes to atomics, in general providing compiler barriers for
   smp_mb__{before,after}_atomic plus fixes specific to Loongson CPUs or
   MIPS32 systems using cmpxchg64().
 
 - Conversion to the new generic VDSO infrastructure courtesy of Vincenzo
   Frascino.
 
 - Removal of undefined behavior in set_io_port_base(), fixing the
   behavior of some MIPS kernel configurations when built with recent
   clang versions.
 
 - Initial MIPS32 huge page support, functional on at least Ingenic SoCs.
 
 - pte_special() is now supported for some configurations, allowing among
   other things generic fast GUP to be used.
 
 - Miscellaneous fixes & cleanups.
 
 And platform specific changes:
 
 - Major improvements to Ingenic SoC support from Paul Cercueil, mostly
   enabled by the inclusion of the new TCU (timer-counter unit) drivers
   he's spent a very patient year or so working on. Plus some fixes for
   X1000 SoCs from Zhou Yanjie.
 
 - Netgear R6200 v1 systems are now supported by the bcm47xx platform.
 
 - DT updates for BMIPS, Lantiq & Microsemi Ocelot systems.
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Merge tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS updates from Paul Burton:
 "Main MIPS changes:

   - boot_mem_map is removed, providing a nice cleanup made possible by
     the recent removal of bootmem.

   - Some fixes to atomics, in general providing compiler barriers for
     smp_mb__{before,after}_atomic plus fixes specific to Loongson CPUs
     or MIPS32 systems using cmpxchg64().

   - Conversion to the new generic VDSO infrastructure courtesy of
     Vincenzo Frascino.

   - Removal of undefined behavior in set_io_port_base(), fixing the
     behavior of some MIPS kernel configurations when built with recent
     clang versions.

   - Initial MIPS32 huge page support, functional on at least Ingenic
     SoCs.

   - pte_special() is now supported for some configurations, allowing
     among other things generic fast GUP to be used.

   - Miscellaneous fixes & cleanups.

  And platform specific changes:

   - Major improvements to Ingenic SoC support from Paul Cercueil,
     mostly enabled by the inclusion of the new TCU (timer-counter unit)
     drivers he's spent a very patient year or so working on. Plus some
     fixes for X1000 SoCs from Zhou Yanjie.

   - Netgear R6200 v1 systems are now supported by the bcm47xx platform.

   - DT updates for BMIPS, Lantiq & Microsemi Ocelot systems"

* tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (89 commits)
  MIPS: Detect bad _PFN_SHIFT values
  MIPS: Disable pte_special() for MIPS32 with RiXi
  MIPS: ralink: deactivate PCI support for SOC_MT7621
  mips: compat: vdso: Use legacy syscalls as fallback
  MIPS: Drop Loongson _CACHE_* definitions
  MIPS: tlbex: Remove cpu_has_local_ebase
  MIPS: tlbex: Simplify r3k check
  MIPS: Select R3k-style TLB in Kconfig
  MIPS: PCI: refactor ioc3 special handling
  mips: remove ioremap_cachable
  mips/atomic: Fix smp_mb__{before,after}_atomic()
  mips/atomic: Fix loongson_llsc_mb() wreckage
  mips/atomic: Fix cmpxchg64 barriers
  MIPS: Octeon: remove duplicated include from dma-octeon.c
  firmware: bcm47xx_nvram: Allow COMPILE_TEST
  firmware: bcm47xx_nvram: Correct size_t printf format
  MIPS: Treat Loongson Extensions as ASEs
  MIPS: Remove dev_err() usage after platform_get_irq()
  MIPS: dts: mscc: describe the PTP ready interrupt
  MIPS: dts: mscc: describe the PTP register range
  ...
2019-09-22 09:30:30 -07:00
Linus Torvalds 04cbfba620 dmaengine updates for v5.4-rc1
- Move Dmaengine DT bindings to YAML and convert Allwinner to schema.
  - FSL dma device_synchronize implementation
  - DW split acpi and of helpers and updates to driver and support for Elkhart
    Lake
  - Move filter fn as private for omap-dma and edma drivers and improvements
    to these drivers
  - Mark expected switch fall-through in couple of drivers
  - Renames of shdma and nbpfaxi binding document
  - Minor updates to bunch of drivers
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Merge tag 'dmaengine-5.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma

Pull dmaengine updates from Vinod Koul:

 - Move Dmaengine DT bindings to YAML and convert Allwinner to schema.

 - FSL dma device_synchronize implementation

 - DW split acpi and of helpers and updates to driver and support for
   Elkhart Lake

 - Move filter fn as private for omap-dma and edma drivers and
   improvements to these drivers

 - Mark expected switch fall-through in couple of drivers

 - Renames of shdma and nbpfaxi binding document

 - Minor updates to bunch of drivers

* tag 'dmaengine-5.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (55 commits)
  dmaengine: ti: edma: Use bitmap_set() instead of open coded edma_set_bits()
  dmaengine: ti: edma: Only reset region0 access registers
  dmaengine: ti: edma: Do not reset reserved paRAM slots
  dmaengine: iop-adma.c: fix printk format warning
  dmaengine: stm32-dma: Use struct_size() helper
  dt-bindings: dmaengine: dma-common: Fix the dma-channel-mask property
  dmanegine: ioat/dca: Use struct_size() helper
  dmaengine: iop-adma: remove set but not used variable 'slots_per_op'
  dmaengine: dmatest: Add support for completion polling
  dmaengine: ti: omap-dma: Remove variable override in omap_dma_tx_status()
  dmaengine: ti: omap-dma: Remove 'Assignment in if condition'
  dmaengine: ti: edma: Remove 'Assignment in if condition'
  dmaengine: dw: platform: Split OF helpers to separate module
  dmaengine: dw: platform: Split ACPI helpers to separate module
  dmaengine: dw: platform: Move handle check to dw_dma_acpi_controller_register()
  dmaengine: dw: platform: Switch to acpi_dma_controller_register()
  dmaengine: dw: platform: Use devm_platform_ioremap_resource()
  dmaengine: dw: platform: Enable iDMA 32-bit on Intel Elkhart Lake
  dmaengine: dw: platform: Use struct dw_dma_chip_pdata
  dmaengine: dw: Export struct dw_dma_chip_pdata for wider use
  ...
2019-09-17 19:04:40 -07:00
Linus Torvalds 2b97c39514 ARM: SoC platform updates for v5.4
The main change this time around is a cleanup of some of the oldest
 platforms based on the XScale and ARM9 CPU cores, which are between 10
 and 20 years old.
 
 The Kendin/Micrel/Microchip KS8695, Winbond/Nuvoton W90x900 and Intel
 IOP33x/IOP13xx platforms are removed after we determined that nobody is
 using them any more.
 
 The TI Davinci and NXP LPC32xx platforms on the other hand are still in
 active use and are converted to the ARCH_MULTIPLATFORM build, meaning
 that we can compile a kernel that works on these along with most other
 ARMv5 platforms. Changes toward that goal are also merged for IOP32x,
 but additional work is needed to complete this. Patches for the
 remaining ARMv5 platforms have started but need more work and some
 testing.
 
 Support for the new ASpeed AST2600 gets added, this is based on the
 Cortex-A7 ARMv7 core, and is a newer version of the existing ARMv5 and
 ARMv6 chips in the same family.
 
 Other changes include a cleanup of the ST-Ericsson ux500 platform
 and the move of the TI Davinci platform to a new clocksource driver.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC platform updates from Arnd Bergmann:
 "The main change this time around is a cleanup of some of the oldest
  platforms based on the XScale and ARM9 CPU cores, which are between 10
  and 20 years old.

  The Kendin/Micrel/Microchip KS8695, Winbond/Nuvoton W90x900 and Intel
  IOP33x/IOP13xx platforms are removed after we determined that nobody
  is using them any more.

  The TI Davinci and NXP LPC32xx platforms on the other hand are still
  in active use and are converted to the ARCH_MULTIPLATFORM build,
  meaning that we can compile a kernel that works on these along with
  most other ARMv5 platforms. Changes toward that goal are also merged
  for IOP32x, but additional work is needed to complete this. Patches
  for the remaining ARMv5 platforms have started but need more work and
  some testing.

  Support for the new ASpeed AST2600 gets added, this is based on the
  Cortex-A7 ARMv7 core, and is a newer version of the existing ARMv5 and
  ARMv6 chips in the same family.

  Other changes include a cleanup of the ST-Ericsson ux500 platform and
  the move of the TI Davinci platform to a new clocksource driver"

[ The changes had marked INTEL_IOP_ADMA and USB_LPC32XX as being
  buildable on other platforms through COMPILE_TEST, but that causes new
  warnings that I most definitely do not want to see during the merge
  window as that could hide other issues.

  So the COMPILE_TEST option got disabled for them again   - Linus ]

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (61 commits)
  ARM: multi_v5_defconfig: make DaVinci part of the ARM v5 multiplatform build
  ARM: davinci: support multiplatform build for ARM v5
  arm64: exynos: Enable exynos-chipid driver
  ARM: OMAP2+: Delete an unnecessary kfree() call in omap_hsmmc_pdata_init()
  ARM: OMAP2+: move platform-specific asm-offset.h to arch/arm/mach-omap2
  ARM: davinci: dm646x: Fix a typo in the comment
  ARM: davinci: dm646x: switch to using the clocksource driver
  ARM: davinci: dm644x: switch to using the clocksource driver
  ARM: aspeed: Enable SMP boot
  ARM: aspeed: Add ASPEED AST2600 architecture
  ARM: aspeed: Select timer in each SoC
  dt-bindings: arm: cpus: Add ASPEED SMP
  ARM: imx: stop adjusting ar8031 phy tx delay
  mailmap: map old company name to new one @microchip.com
  MAINTAINERS: at91: remove the TC entry
  MAINTAINERS: at91: Collect all pinctrl/gpio drivers in same entry
  ARM: at91: move platform-specific asm-offset.h to arch/arm/mach-at91
  MAINTAINERS: Extend patterns for Samsung SoC, Security Subsystem and clock drivers
  ARM: s3c64xx: squash samsung_usb_phy.h into setup-usb-phy.c
  ARM: debug-ll: Add support for r7s9210
  ...
2019-09-16 15:48:14 -07:00
Mark Brown b769c5ba8a
Merge branch 'spi-5.4' into spi-next 2019-09-15 10:32:06 +01:00
Lukas Wunner bf75703d09
dmaengine: bcm2835: Avoid accessing memory when copying zeroes
The BCM2835 DMA controller is capable of synthesizing zeroes instead of
copying them from a source address. The feature is enabled by setting
the SRC_IGNORE bit in the Transfer Information field of a Control Block:

"Do not perform source reads.
 In addition, destination writes will zero all the write strobes.
 This is used for fast cache fill operations."
https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf

The feature is only available on 8 of the 16 channels. The others are
so-called "lite" channels with a limited feature set and performance.

Enable the feature if a cyclic transaction copies from the zero page.
This reduces traffic on the memory bus.

A forthcoming use case is the BCM2835 SPI driver, which will cyclically
copy from the zero page to the TX FIFO. The idea to use SRC_IGNORE was
taken from an ancient GitHub conversation between Martin and Noralf:
https://github.com/msperl/spi-bcm2835/issues/13#issuecomment-98180451

Tested-by: Nuno Sá <nuno.sa@analog.com>
Tested-by: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Stefan Wahren <wahrenst@gmx.net>
Acked-by: Martin Sperl <kernel@martin.sperl.org>
Cc: Florian Kauer <florian.kauer@koalo.de>
Link: https://lore.kernel.org/r/b2286c904408745192e4beb3de3c88f73e4a7210.1568187525.git.lukas@wunner.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-11 15:56:46 +01:00