[ Upstream commit 24ebec25fb ]
Unprivileged memory accesses generated by the so-called "translated"
instructions (e.g. STTR) at EL1 can cause EL0 watchpoints to fire
unexpectedly if kernel debugging is enabled. In such cases, the
hw_breakpoint logic will invoke the user overflow handler which will
typically raise a SIGTRAP back to the current task. This is futile when
returning back to the kernel because (a) the signal won't have been
delivered and (b) userspace can't handle the thing anyway.
Avoid invoking the user overflow handler for watchpoints triggered by
kernel uaccess routines, and instead single-step over the faulting
instruction as we would if no overflow handler had been installed.
(Fixes tag identifies the introduction of unprivileged memory accesses,
which exposed this latent bug in the hw_breakpoint code)
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Fixes: 57f4959bad ("arm64: kernel: Add support for User Access Override")
Reported-by: Luis Machado <luis.machado@linaro.org>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit bba25915b1 ]
The 'phy-mode' property is currently defined as 'rgmii' for Jetson
Xavier. This indicates that the RGMII RX and TX delays are set by the
MAC and the internal delays set by the PHY are not used.
If the Marvell PHY driver is enabled, such that it is used and not the
generic PHY, ethernet failures are seen (DHCP is failing to obtain an
IP address) and this is caused because the Marvell PHY driver is
disabling the internal RX and TX delays. For Jetson Xavier the internal
PHY RX and TX delay should be used and so fix this by setting the
'phy-mode' to 'rgmii-id' and not 'rgmii'.
Fixes: f89b58ce71 ("arm64: tegra: Add ethernet controller on Tegra194")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit 61d2ca503d ]
This was mistakenly copied from the downstream dts, however the upstream
driver works differently.
I only tested this with the pm8150_gpios node (used with volume button),
but the 2 others should be the same.
Fixes: e92b61c8e7 ("arm64: dts: qcom: pm8150l: Add base dts file")
Fixes: 229d5bcad0 ("arm64: dts: qcom: pm8150b: Add base dts file")
Fixes: 5101f22a5c ("arm64: dts: qcom: pm8150: Add base dts file")
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20200420153543.14512-1-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit fe2aff0c57 ]
The thermal trip points have unit name but no reg property, so we can
remove them. It also fixes the following warnings from 'make dtbs_check'
after adding the thermal yaml bindings.
arch/arm64/boot/dts/qcom/apq8016-sbc.dt.yaml: thermal-zones:
gpu-thermal:trips: 'trip-point@0' does not match any of the regexes:
'^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', 'pinctrl-[0-9]+'
arch/arm64/boot/dts/qcom/apq8016-sbc.dt.yaml: thermal-zones:
camera-thermal:trips: 'trip-point@0' does not match any of the regexes:
'^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', 'pinctrl-[0-9]+'
arch/arm64/boot/dts/qcom/apq8016-sbc.dt.yaml: thermal-zones:
modem-thermal:trips: 'trip-point@0' does not match any of the regexes:
'^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', 'pinctrl-[0-9]+'
arch/arm64/boot/dts/qcom/msm8916-mtp.dt.yaml: thermal-zones:
gpu-thermal:trips: 'trip-point@0' does not match any of the regexes:
'^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', 'pinctrl-[0-9]+'
arch/arm64/boot/dts/qcom/msm8916-mtp.dt.yaml: thermal-zones:
camera-thermal:trips: 'trip-point@0' does not match any of the regexes:
'^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', 'pinctrl-[0-9]+'
arch/arm64/boot/dts/qcom/msm8916-mtp.dt.yaml: thermal-zones:
modem-thermal:trips: 'trip-point@0' does not match any of the regexes:
'^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$', 'pinctrl-[0-9]+'
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Link: https://lore.kernel.org/r/2d3d045c18a2fb85b28cf304aa11ae6e6538d75e.1585562459.git.amit.kucheria@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit 72b29215ac ]
Fixing several unit name warnings:
Warning (unit_address_vs_reg): /oscillator@0: node has a unit name, but no reg property
Warning (unit_address_vs_reg): /oscillator@1: node has a unit name, but no reg property
Warning (unit_address_vs_reg): /oscillator@2: node has a unit name, but no reg property
Warning (unit_address_vs_reg): /thermal-zones/cpu_thermal/trips/trip-point@0: node has a unit name, but no reg property
Warning (unit_address_vs_reg): /thermal-zones/cpu_thermal/trips/trip-point@1: node has a unit name, but no reg property
Warning (unit_address_vs_reg): /thermal-zones/cpu_thermal/trips/cpu_crit@0: node has a unit name, but no reg property
Warning (unit_address_vs_reg): /thermal-zones/cpu_thermal/cooling-maps/map@0: node has a unit name, but no reg property
Warning (unit_address_vs_reg): /thermal-zones/cpu_thermal/cooling-maps/map@1: node has a unit name, but no reg property
Warning (unit_address_vs_reg): /reserved-memory/vpu_dma_mem_region: node has a reg or ranges property, but no unit name
Warning (simple_bus_reg): /soc/pinctrl@10005000: simple-bus unit address format error, expected "1000b000"
Warning (simple_bus_reg): /soc/interrupt-controller@10220000: simple-bus unit address format error, expected "10221000"
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20200210063523.133333-4-hsinyi@chromium.org
[mb: drop fixes for '_' in property name]
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit bb5cce12ac ]
The Arm Ltd. boards were using an outdated address convention in the DT
node names, by separating the high from the low 32-bits of an address by
a comma.
Remove the comma from the node name suffix to be DT spec compliant.
Link: https://lore.kernel.org/r/20200513103016.130417-3-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit 78631aecc5 ]
The GIC DT nodes for the fastmodels were not fully compliant with the
DT binding, which has certain expectations about child nodes and their
size and address cells values.
Use smaller #address-cells and #size-cells values, as the binding
requests, and adjust the reg properties accordingly.
This requires adjusting the interrupt nexus nodes as well, as one
field of the interrupt-map property depends on the GIC's address-size.
Since the .dts files share interrupt nexus nodes across different
interrupt controllers (GICv2 vs. GICv3), we need to use the only
commonly allowed #address-size value of <1> for both.
Link: https://lore.kernel.org/r/20200513103016.130417-11-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit a78aee9e43 ]
The GIC DT nodes for the Juno boards were not fully compliant with
the DT binding, which has certain expectations about child nodes and
their size and address cells values.
Use smaller #address-cells and #size-cells values, as the binding
requests, and adjust the reg properties accordingly.
This requires adjusting the interrupt nexus nodes as well, as one
field of the interrupt-map property depends on the GIC's address-size.
Link: https://lore.kernel.org/r/20200513103016.130417-10-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit c2671acbbb ]
The sfp compatible should be 'sff,sfp', not 'sff,sfp+'. We used patched
kernel where the latter was working.
Fixes: 7109d817db ("arm64: dts: marvell: add DTS for Turris Mox")
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit 9ecded10b4 ]
The GX and AXG SCP sram nodes were using invalid compatible and
node names for the sram entries.
Fixup the sram entries node names, and use proper compatible for them.
It notably fixes:
sram@c8000000: 'scp-shmem@0', 'scp-shmem@200' do not match any of the regexes: '^([a-z]*-)?sram(-section)?@[a-f0-9]+$', 'pinctrl-[0-9]+'
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200326165958.19274-3-narmstrong@baylibre.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
Verify the PCIe PLL_SYS reference clock source on EVK board.
The external OSC clock is used as PCIe REF clock source in default.
NOTE: Change the ext_osc of pcie/pcie_phy to '0' when enable SYS_PLL
clock mode.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Added device tree support for SPDIF loopback mode on imx8mp-evk.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
[ Upstream commit 579d1b3faa ]
This patch fixes two issues present in the current function for encoding
arm64 logical immediates when using the 32-bit variants of instructions.
First, the code does not correctly reject an all-ones 32-bit immediate,
and returns an undefined instruction encoding.
Second, the code incorrectly rejects some 32-bit immediates that are
actually encodable as logical immediates. The root cause is that the code
uses a default mask of 64-bit all-ones, even for 32-bit immediates.
This causes an issue later on when the default mask is used to fill the
top bits of the immediate with ones, shown here:
/*
* Pattern: 0..01..10..01..1
*
* Fill the unused top bits with ones, and check if
* the result is a valid immediate (all ones with a
* contiguous ranges of zeroes).
*/
imm |= ~mask;
if (!range_of_ones(~imm))
return AARCH64_BREAK_FAULT;
To see the problem, consider an immediate of the form 0..01..10..01..1,
where the upper 32 bits are zero, such as 0x80000001. The code checks
if ~(imm | ~mask) contains a range of ones: the incorrect mask yields
1..10..01..10..0, which fails the check; the correct mask yields
0..01..10..0, which succeeds.
The fix for both issues is to generate a correct mask based on the
instruction immediate size, and use the mask to check for all-ones,
all-zeroes, and values wider than the mask.
Currently, arch/arm64/kvm/va_layout.c is the only user of this function,
which uses 64-bit immediates and therefore won't trigger these bugs.
We tested the new code against llvm-mc with all 1,302 encodable 32-bit
logical immediates and all 5,334 encodable 64-bit logical immediates.
Fixes: ef3935eeeb ("arm64: insn: Add encoder for bitwise operations using literals")
Suggested-by: Will Deacon <will@kernel.org>
Co-developed-by: Xi Wang <xi.wang@gmail.com>
Signed-off-by: Xi Wang <xi.wang@gmail.com>
Signed-off-by: Luke Nelson <luke.r.nels@gmail.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200508181547.24783-2-luke.r.nels@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit ab8ad279ce ]
flush_icache_range() contains a bodge to avoid issuing IPIs when the kgdb
trap handler is running because issuing IPIs is unsafe (and not needed)
in this execution context. However the current test, based on
kgdb_connected is flawed: it both over-matches and under-matches.
The over match occurs because kgdb_connected is set when gdb attaches
to the stub and remains set during normal running. This is relatively
harmelss because in almost all cases irq_disabled() will be false.
The under match is more serious. When kdb is used instead of kgdb to access
the debugger then kgdb_connected is not set in all the places that the
debug core updates sw breakpoints (and hence flushes the icache). This
can lead to deadlock.
Fix by replacing the ad-hoc check with the proper kgdb macro. This also
allows us to drop the #ifdef wrapper.
Fixes: 3b8c9f1cdf ("arm64: IPI each CPU after invalidating the I-cache for kernel mappings")
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200504170518.2959478-1-daniel.thompson@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit 9d2d75ede5 ]
Prior to commit 8eb7e28d4c ("arm64/mm: move runtime pgds to
rodata"), idmap_pgd_dir, tramp_pg_dir, reserved_ttbr0, swapper_pg_dir,
and init_pg_dir were contiguous at the end of the kernel image. The
maintenance at the end of __create_page_tables assumed these were
contiguous, and affected everything from the start of idmap_pg_dir
to the end of init_pg_dir.
That commit moved all but init_pg_dir into the .rodata section, with
other data placed between idmap_pg_dir and init_pg_dir, but did not
update the maintenance. Hence the maintenance is performed on much
more data than necessary (but as the bootloader previously made this
clean to the PoC there is no functional problem).
As we only alter idmap_pg_dir, and init_pg_dir, we only need to perform
maintenance for these. As the other dirs are in .rodata, the bootloader
will have initialised them as expected and cleaned them to the PoC. The
kernel will initialize them as necessary after enabling the MMU.
This patch reworks the maintenance to only cover the idmap_pg_dir and
init_pg_dir to avoid this unnecessary work.
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20200427235700.112220-1-gshan@redhat.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Add support for 8mic rev E PDM mic array board
support for gpio leds and software keys events:
SW1: KEY_F9 Factory reset for Android
SW2: VOLUME_MUTE
SW3: VOLUME_UP
SW4: VOLUME_DOWN
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Enable nxp 88w8987 bluetooth HSP.
Note:
- 88w8987 bt i2s only support pcm mode A.
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
commit ef3e40a7ea upstream.
When using the PtrAuth feature in a guest, we need to save the host's
keys before allowing the guest to program them. For that, we dump
them in a per-CPU data structure (the so called host context).
But both call sites that do this are in preemptible context,
which may end up in disaster should the vcpu thread get preempted
before reentering the guest.
Instead, save the keys eagerly on each vcpu_load(). This has an
increased overhead, but is at least safe.
Cc: stable@vger.kernel.org
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 0370964dd3 upstream.
On a VHE system, the EL1 state is left in the CPU most of the time,
and only syncronized back to memory when vcpu_put() is called (most
of the time on preemption).
Which means that when injecting an exception, we'd better have a way
to either:
(1) write directly to the EL1 sysregs
(2) synchronize the state back to memory, and do the changes there
For an AArch64, we already do (1), so we are safe. Unfortunately,
doing the same thing for AArch32 would be pretty invasive. Instead,
we can easily implement (2) by calling the put/load architectural
backends, and keep preemption disabled. We can then reload the
state back into EL1.
Cc: stable@vger.kernel.org
Reported-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 3204be4109 upstream.
AArch32 CP1x registers are overlayed on their AArch64 counterparts
in the vcpu struct. This leads to an interesting problem as they
are stored in their CPU-local format, and thus a CP1x register
doesn't "hit" the lower 32bit portion of the AArch64 register on
a BE host.
To workaround this unfortunate situation, introduce a bias trick
in the vcpu_cp1x() accessors which picks the correct half of the
64bit register.
Cc: stable@vger.kernel.org
Reported-by: James Morse <james.morse@arm.com>
Tested-by: James Morse <james.morse@arm.com>
Acked-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 7c582bf4ed upstream.
aarch32 has pairs of registers to access the high and low parts of 64bit
registers. KVM has a union of 64bit sys_regs[] and 32bit copro[]. The
32bit accessors read the high or low part of the 64bit sys_reg[] value
through the union.
Both sys_reg_descs[] and cp15_regs[] list access_csselr() as the accessor
for CSSELR{,_EL1}. access_csselr() is only aware of the 64bit sys_regs[],
and expects r->reg to be 'CSSELR_EL1' in the enum, index 2 of the 64bit
array.
cp15_regs[] uses the 32bit copro[] alias of sys_regs[]. Here CSSELR is
c0_CSSELR which is the same location in sys_reg[]. r->reg is 'c0_CSSELR',
index 4 in the 32bit array.
access_csselr() uses the 32bit r->reg value to access the 64bit array,
so reads and write the wrong value. sys_regs[4], is ACTLR_EL1, which
is subsequently save/restored when we enter the guest.
ACTLR_EL1 is supposed to be read-only for the guest. This register
only affects execution at EL1, and the host's value is restored before
we return to host EL1.
Convert the 32bit register index back to the 64bit version.
Suggested-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200529150656.7339-2-james.morse@arm.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit a194c33f45 upstream.
Will reported a UBSAN warning:
UBSAN: null-ptr-deref in arch/arm64/kernel/smp.c:596:6
member access within null pointer of type 'struct acpi_madt_generic_interrupt'
CPU: 0 PID: 0 Comm: swapper Not tainted 5.7.0-rc6-00124-g96bc42ff0a82 #1
Call trace:
dump_backtrace+0x0/0x384
show_stack+0x28/0x38
dump_stack+0xec/0x174
handle_null_ptr_deref+0x134/0x174
__ubsan_handle_type_mismatch_v1+0x84/0xa4
acpi_parse_gic_cpu_interface+0x60/0xe8
acpi_parse_entries_array+0x288/0x498
acpi_table_parse_entries_array+0x178/0x1b4
acpi_table_parse_madt+0xa4/0x110
acpi_parse_and_init_cpus+0x38/0x100
smp_init_cpus+0x74/0x258
setup_arch+0x350/0x3ec
start_kernel+0x98/0x6f4
This is from the use of the ACPI_OFFSET in
arch/arm64/include/asm/acpi.h. Replace its use with offsetof from
include/linux/stddef.h which should implement the same logic using
__builtin_offsetof, so that UBSAN wont warn.
Reported-by: Will Deacon <will@kernel.org>
Suggested-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Jeremy Linton <jeremy.linton@arm.com>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/lkml/20200521100952.GA5360@willie-the-truck/
Link: https://lore.kernel.org/r/20200608203818.189423-1-ndesaulniers@google.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
During the USB certification, the Image may be changed, so it
is not aligned with rootfs, and cause this test fixture module
not loading, therefore the related test will fail.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
We need passthrough dsp to domu, it is in vpu ss,
without power off it, vpu ss will not be really off.
And domu audio also needs dsp to work proper for hifi.
Reviewed-by: Shijie Qin <shijie.qin@nxp.com>
Reviewed-by: zhang sanshan <pete.zhang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
display-subsystem in imx8qm-ss-dc.dtsi cover the domu dts.
dpu2_disp0 and dpu2_disp1 are added into “ports”, however dpu2 do not enable.
It cause bind failed and it have no display shown.
Change-Id: I2a16708ba49a64b61d6bd87ffdce82c0734dad2c
Signed-off-by: zhang sanshan <pete.zhang@nxp.com>
(cherry picked from commit 75b467a4eadd1b541cbdf1ef81de12550edbdc44)
Add the iMX8DXL PCIe EP support and verified on EVK board.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Add the PCIe EP mode on iMX8MQ/MM/MP platforms.
And enable the EP mode on EVK boards.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Add the iMX8QM PCIEA EP support and verified on MEK board.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Add the iMX8QXP PCIe EP mode, and verified on MEK board.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Separate iMX PCIe RC and EP modes, and enable them in defconfig.
Build-in the PCIe EP subsystem and EP tests.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Add "fsl,imx8mm-ocotp" as fallback compatible of i.MX8MP ocotp
to support SoC UID read.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Different "arecords" tasks getting i2c_adapter_lock_bus and
clk_prepare_lock at the same time cause the deadlock.
Task A gets the clk_prepare_lock and waiting for the
i2c_adapter_lock_bus when it tries to open MCLK which is gated by
a pin of IO Expander on the same i2c bus.
Task B gets the i2c_adapter_lock_bus and waiting for the
clk_prepare_lock when configs wm8960 through i2c.
The usages of i2c mux, i2c device and clock prepare lock do not have
obvious error.
So, avoid the deadlock by using "pinctrl-assert-gpios"
to set the GPIO gate of MCLK when kernel boot instead of using
"gpio-gate-clock" to set the GPIO gate every time using it.
Task A blocked call trace:
[ 112.367398] Call trace:
[ 112.369840] __switch_to+0x104/0x170
[ 112.373420] __schedule+0x224/0x560
[ 112.376910] schedule+0x40/0xe0
[ 112.380050] __rt_mutex_slowlock+0x60/0xf8
[ 112.384150] rt_mutex_slowlock+0xac/0x188
[ 112.388164] rt_mutex_lock+0x58/0x60
[ 112.391750] i2c_adapter_lock_bus+0x10/0x18
[ 112.395939] i2c_transfer+0x4c/0xf8
[ 112.399430] i2c_transfer_buffer_flags+0x58/0x80
[ 112.404058] regmap_i2c_write+0x1c/0x50
[ 112.407893] _regmap_raw_write_impl+0x514/0x610
[ 112.412427] _regmap_bus_raw_write+0x60/0x78
[ 112.416701] _regmap_write+0x58/0xa8
[ 112.420281] _regmap_update_bits+0xf0/0x108
[ 112.424468] regmap_update_bits_base+0x60/0x90
[ 112.428923] pca953x_gpio_set_value+0xac/0xc8
[ 112.433284] gpiod_set_value_nocheck+0x54/0x98
[ 112.437726] gpiod_set_value_cansleep+0x38/0x48
[ 112.442264] clk_sleeping_gpio_gate_prepare+0x14/0x20
[ 112.447321] clk_core_prepare+0x58/0xe0
[ 112.451155] clk_prepare+0x24/0x40
[ 112.454571] wm8960_set_bias_level_out3+0x120/0x1f8
Task B blocked call trace:
[ 115.927987] Call trace:
[ 115.930429] __switch_to+0x104/0x170
[ 115.934001] __schedule+0x224/0x560
[ 115.937491] schedule+0x40/0xe0
[ 115.940638] schedule_preempt_disabled+0x20/0x38
[ 115.945260] __mutex_lock.isra.0+0x17c/0x5b8
[ 115.949532] __mutex_lock_slowpath+0x10/0x18
[ 115.953808] mutex_lock+0x34/0x50
[ 115.957131] clk_prepare_lock+0x40/0x98
[ 115.960968] clk_core_get_rate+0x14/0x70
[ 115.964895] clk_get_rate+0x14/0x28
[ 115.968393] lpi2c_imx_xfer+0x78/0x610
[ 115.972144] __i2c_transfer+0x14c/0x390
[ 115.975979] i2c_smbus_xfer_emulated+0xd8/0x630
[ 115.980513] __i2c_smbus_xfer+0x118/0x210
[ 115.984529] pca954x_select_chan+0x74/0xb8
[ 115.988628] __i2c_mux_master_xfer+0x38/0x80
[ 115.992903] __i2c_transfer+0x14c/0x390
[ 115.996743] i2c_transfer+0x5c/0xf8
[ 116.000236] i2c_transfer_buffer_flags+0x58/0x80
[ 116.004859] regmap_i2c_write+0x1c/0x50
[ 116.008696] _regmap_bus_formatted_write+0x6c/0xb8
[ 116.013489] _regmap_write+0x58/0xa8
[ 116.017071] regmap_write+0x48/0x70
[ 116.020564] snd_soc_component_write+0x30/0x40
[ 116.025015] wm8960_set_pll+0x1e8/0x210
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Add i.MX8DXL inmate/root dts. Needs to use non-m4 flash.bin and use the
following command to boot the 2nd Linux:
./jailhouse cell linux imx8dxl-linux-demo.cell Image -d
imx8dxl-evk-inmate.dtb -c "clk_ignore_unused console=ttyLP4,115200
earlycon=lpuart32,mmio32,0x5a060010,115200 cma=32MB root=/dev/mmcblk0p2 rootwait rw"
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Set decimation factor to 64 this allows to support all
possible sample rates for SPK0641HT4H-1 on 8mic board
Example: 16khz: BCLK = 16khz * 64 = 1024000 Hz
[ 8000 - 11025] low power mode
[16000 - 64000] performance mode
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Use fsl,dataline,dsd channel mask to enable only SAI
datalines available per SAI block; On SAI5 0xf enables
4 datalines on SAI5_RX; Up to 4 channels capture, one
channel per dataline.
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Limit the maximum allowed bandwidth for LCDIF due to HW limitation in
i.MX8MQ: LCDIF can dcan rive up to 720p60 because of DDR/NoC QoS issue.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
[ Upstream commit 3b1f6c5e4d ]
Fix the assigned-clock-parents to higher frequency clock to avoid h264
encode timeout:
[ 134.763465] mtk_vpu 10020000.vpu: vpu ipi 4 ack time out !
[ 134.769008] [MTK_VCODEC][ERROR][18]: vpu_enc_send_msg() vpu_ipi_send msg_id c002 len 32 fail -5
[ 134.777707] [MTK_VCODEC][ERROR][18]: vpu_enc_encode() AP_IPIMSG_ENC_ENCODE 0 fail
venc_sel is the clock used by h264 encoder, and venclt_sel is the clock
used by vp8 encoder. Assign venc_sel to vcodecpll_ck and venclt_sel to
vcodecpll_370p5.
vcodecpll 1482000000
vcodecpll_ck 494000000
venc_sel 494000000
...
vcodecpll_370p5 370500000
venclt_sel 370500000
Fixes: fbbad0287c ("arm64: dts: Using standard CCF interface to set vcodec clk")
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20200504124442.208004-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit c604fd810b ]
Dts files with Rockchip rk3399 'gpu' nodes were manually verified.
In order to automate this process arm,mali-midgard.txt
has been converted to yaml. In the new setup dtbs_check with
arm,mali-midgard.yaml expects interrupts and interrupt-names values
in the same order. Fix this for rk3399.
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/gpu/
arm,mali-midgard.yaml
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200425143837.18706-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit c617ed8850 ]
The status was removed of the '&gmac2phy' node with the apply
of a patch long time ago, so fix status for '&gmac2phy'
in 'rk3328-evb.dts'.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20200425122345.12902-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Add mu alias to make power key driver could probe successfully,
otherwise it might use wrong resource number to enable irq group
which cause failure.
Reviewed-by: zhang sanshan <pete.zhang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 31f7e2b7fed10b72b2e4fe7c28284c79e4889481)
The VPU ENC is removed from smmu, it will cause smmu abort.
Drop the PI resources, it is not able to assign and report fail.
Reviewed-by: zhang sanshan <pete.zhang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
DomU mipi dsi needs this, so give access, otherwise domu crash
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 8a6cd912c31d69e043b78e1b054cc8aa3472f66f)
Give SAI0 pad to domu and audio sys reg space.
Reviewed-by: zhang sanshan <pete.zhang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 817b83494247ef5b43287d27ca6331348d960e1e)
There is a limitation on imx8mm when SAI shared with A core
and M core, and M core is in stop mode, SAI can't be accessed.
So we disable SAI2 node which is newly added to avoid
compatible issue.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
The interrupt parent of PMU node should be gic, so correct it to fix the pmu
no sampling/overflow interrupt issue.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
GPIO4/3 needs to be given access for DomU for otg usb.
MIPI GPIO needs to be passthrough DOmU
LSIO_GPIO1 interrupts gives to DomU, dom0 not need the interrupt
currently.
Reviewed-by: zhang sanshan <pete.zhang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 1615076996096b26353baefd79211f24e6aa835e)
Add psci node for inmate dts, otherwise secondary cpus could
not be booted up.
Reviewed-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 028306eb6a60c51769156755c7526b8512b8ff38)
commit 1cf6022bd9 upstream.
Quoth the man page:
```
If the tracee was restarted by PTRACE_SYSCALL or PTRACE_SYSEMU, the
tracee enters syscall-enter-stop just prior to entering any system
call (which will not be executed if the restart was using
PTRACE_SYSEMU, regardless of any change made to registers at this
point or how the tracee is restarted after this stop).
```
The parenthetical comment is currently true on x86 and powerpc,
but not currently true on arm64. arm64 re-checks the _TIF_SYSCALL_EMU
flag after the syscall entry ptrace stop. However, at this point,
it reflects which method was used to re-start the syscall
at the entry stop, rather than the method that was used to reach it.
Fix that by recording the original flag before performing the ptrace
stop, bringing the behavior in line with documentation and x86/powerpc.
Fixes: f086f67485 ("arm64: ptrace: add support for syscall emulation")
Cc: <stable@vger.kernel.org> # 5.3.x-
Signed-off-by: Keno Fischer <keno@juliacomputing.com>
Acked-by: Will Deacon <will@kernel.org>
Tested-by: Sudeep Holla <sudeep.holla@arm.com>
Tested-by: Bin Lu <Bin.Lu@arm.com>
[catalin.marinas@arm.com: moved 'flags' bit masking]
[catalin.marinas@arm.com: changed 'flags' type to unsigned long]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add property fsl,spi-only-use-cs1-sel to mark this board only uses
CS1 without CS0.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Some tja1100 cards phy address is 0x2, some cards is 0x5.
tja1101 cards phy address is 0x2.
To make thing simple, and to support tja1100 and tja1101
cards by one dts file, we define the tja110x card phy
address to 0x2 in default bsp.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
When imx8dxl enet1 is fused as below, enet1 doesn't support
RGMII mode, so add tja1100 RMII phy support.
ENET1 otp fuse: word 0xa, bit1
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
passthrough vpu/esai/pcie/edma and etc to domu, to let domu
could use more functions which is a must for android auto in
domu.
Reviewed-by: zhang sanshan <pete.zhang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enable wdog for rpmsg dts to make wdog function could work properly.
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When M4 boots from flexspi, linux should not use that, otherwise
M4 will hang.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Create imx8qxp-mek-lcdif.dts and imx8qxp-mek-lcdif-rpmsg.dts files for
the display use-case of LCDIF.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
files
Enable cm40 lpuart in imx8dxl-evk.dts and disable it in
imx8dxl-evk-rpmsg.dts.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Adding lpuart device in cm40 subsystem needs to add cm40_lpuart node and
Low-Power Clock Gating which is used for uart. Add serial4 alias for 8dxl.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
commit 15ddc3e17a upstream.
Using SDMA1 with UART1 is causing a "Timeout waiting for CH0" error.
This patch changes to ahb clock from SDMA1_ROOT to AHB which fixes the
timeout error.
Fixes: 6c3debcbae ("arm64: dts: freescale: Add i.MX8MN dtsi support")
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 190c7f6fd4 upstream.
The device tree compiler complains that the dwc3 nodes have regs
properties but no matching unit addresses.
Add the unit addresses to the device node name. While at it, also rename
the nodes from "dwc3" to "usb", as guidelines require device nodes have
generic names.
Fixes: 7144224f2c ("arm64: dts: rockchip: support dwc3 USB for rk3399")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20200327030414.5903-7-wens@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 83b994129f upstream.
In some board device tree files, "rk805" was used for the RK805 PMIC's
node name. However the policy for device trees is that generic names
should be used.
Replace the "rk805" node name with the generic "pmic" name.
Fixes: 1e28037ec8 ("arm64: dts: rockchip: add rk805 node for rk3328-evb")
Fixes: 955bebde05 ("arm64: dts: rockchip: add rk3328-rock64 board")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20200327030414.5903-3-wens@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 5ac0869fb3 upstream.
In the process of moving the VIM3 audio nodes to a G12B specific dtsi
for enabling the SM1 based VIM3L, the frddr_a status = "okay" property
got dropped.
This re-enables the frddr_a node to fix audio support.
Fixes: 4f26cc1c96 ("arm64: dts: khadas-vim3: move common nodes into meson-khadas-vim3.dtsi")
Reported-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Tested-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20191018140216.4257-1-narmstrong@baylibre.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit d51c214541 ]
The second argument is the end "pointer", not the length.
Fixes: d28f6df130 ("arm64/kexec: Add core kexec support")
Cc: <stable@vger.kernel.org> # 4.8.x-
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Fix SAI3 pads for ak5552 ADC support; add multi
clock entries to support all sample rates
Use fsl,imx-audio-ak5552 for asoc machine driver
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Fix SAI3 pads for ak5552 dac support, add multi
clock entries to support all sample rates
Use fsl,imx-audio-ak5552 and disable ak4458_3 to
follow default config
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Correct fec phy reg id, allow to use nfsroot
Fixes: mdio_bus 30be0000.ethernet-1: MDIO device at
address 1 is missing.
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
The spdif capture need the power supply be enabled on audio board,
otherwise the input signal can't be transferred to chip.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The LCDIF3 is included in the HDMIMIX block, so it is
necessary to enable hdmimix power domain for LCDIF3 to
avoid any potential hang issue.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
By default, usdhc2 is for SD boot.
The patch is to enable usdhc2 on M.2 interface for SDIO wlan,
then it requires users use eMMC boot instead of SD boot.
The HW rework:
- install R1429 - R1436
- remove R1617 - R1621, R1603
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Add mmc alias, otherwise when sdhc0 disable in dts, sdhc1 will be detected
as mmc0, however uboot still pass mmcblk1p2 as root storage and
not able to find rootfs, so add alias for sdhc
Reviewed-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Reported-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
commit 027d0c7101 upstream.
The static analyzer in GCC 10 spotted that in huge_pte_alloc() we may
pass a NULL pmdp into pte_alloc_map() when pmd_alloc() returns NULL:
| CC arch/arm64/mm/pageattr.o
| CC arch/arm64/mm/hugetlbpage.o
| from arch/arm64/mm/hugetlbpage.c:10:
| arch/arm64/mm/hugetlbpage.c: In function ‘huge_pte_alloc’:
| ./arch/arm64/include/asm/pgtable-types.h:28:24: warning: dereference of NULL ‘pmdp’ [CWE-690] [-Wanalyzer-null-dereference]
| ./arch/arm64/include/asm/pgtable.h:436:26: note: in expansion of macro ‘pmd_val’
| arch/arm64/mm/hugetlbpage.c:242:10: note: in expansion of macro ‘pte_alloc_map’
| |arch/arm64/mm/hugetlbpage.c:232:10:
| |./arch/arm64/include/asm/pgtable-types.h:28:24:
| ./arch/arm64/include/asm/pgtable.h:436:26: note: in expansion of macro ‘pmd_val’
| arch/arm64/mm/hugetlbpage.c:242:10: note: in expansion of macro ‘pte_alloc_map’
This can only occur when the kernel cannot allocate a page, and so is
unlikely to happen in practice before other systems start failing.
We can avoid this by bailing out if pmd_alloc() fails, as we do earlier
in the function if pud_alloc() fails.
Fixes: 66b3923a1a ("arm64: hugetlb: add support for PTE contiguous bit")
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reported-by: Kyrill Tkachov <kyrylo.tkachov@arm.com>
Cc: <stable@vger.kernel.org> # 4.5.x-
Cc: Will Deacon <will@kernel.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 0225fd5e0a upstream.
In the unlikely event that a 32bit vcpu traps into the hypervisor
on an instruction that is located right at the end of the 32bit
range, the emulation of that instruction is going to increment
PC past the 32bit range. This isn't great, as userspace can then
observe this value and get a bit confused.
Conversly, userspace can do things like (in the context of a 64bit
guest that is capable of 32bit EL0) setting PSTATE to AArch64-EL0,
set PC to a 64bit value, change PSTATE to AArch32-USR, and observe
that PC hasn't been truncated. More confusion.
Fix both by:
- truncating PC increments for 32bit guests
- sanitizing all 32bit regs every time a core reg is changed by
userspace, and that PSTATE indicates a 32bit mode.
Cc: stable@vger.kernel.org
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit a9a8ba90fa upstream.
Rather than chunking via PAGE_SIZE, this commit changes the arch
implementations to chunk in explicit 4k parts, so that calculations on
maximum acceptable latency don't suddenly become invalid on platforms
where PAGE_SIZE isn't 4k, such as arm64.
Fixes: 0f961f9f67 ("crypto: x86/nhpoly1305 - add AVX2 accelerated NHPoly1305")
Fixes: 012c82388c ("crypto: x86/nhpoly1305 - add SSE2 accelerated NHPoly1305")
Fixes: a00fa0c887 ("crypto: arm64/nhpoly1305 - add NEON-accelerated NHPoly1305")
Fixes: 16aae3595a ("crypto: arm/nhpoly1305 - add NEON-accelerated NHPoly1305")
Cc: stable@vger.kernel.org
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Reviewed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The current DT file for the i.MX8x MEK platform has a pin conflict for
IMX8QXP_SPI0_CS1 bewteen the sai1 node and the adma_pwm node(as needed
by the parallel display panel backlight control). This patch enables
the adma_pwm node in display specific DT file to avoid the conflict.
Also, the lcdif_backlight is moved to display specific as it is
referencing the adma_pwm node.
Fixes: 62408b1461 ("LF-1189-13 arm64: dts: imx8qxp-mek: Add adma_pwm support")
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
iMX8MN DDR4 and LPDDR4 SOM on Audio Board 2.0
enable base support, ADC and SPDIF.
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
iMX8MM LPDDR4 SOM on Audio Board 2.0 enable base support
SPDIF, ADC and dual DAC
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Add missing sai mclk0 dummy clk expected by SAI
driver, fix error:
fsl-sai 30020000.sai: failed to get mclk0 clock: -2
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
imx8mm EVK 8mic Rev E PDM to PCM software
decimation support MIC capture on SAI5
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Add support for 8mic rev E PDM mic array board
support for gpio leds and software keys events:
SW1: KEY_F9 Factory reset for Android
SW2: VOLUME_MUTE
SW3: VOLUME_UP
SW4: VOLUME_DOWN
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Add missing vcc-supply assing buck4_reg which corresponds
to VDD_3V3 from pmic, fixes probe pca6416 driver
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Lower power audio needs the audiomix power domain be enabled when running
For the resource in audiomix is used by M7 core.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
The dpu node 'interrupts' and 'interrupt-names' properties should
reflect all dpu interrupts including the missing 'reserved' interrupt.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Since snvs clock runtime management added for snvs_rtc, all snvs_pwrkey
should also added snvs clock, otherwise, snvs clock will be off after
snvs-rct driver suspend and snvs_pwrkey interrupt may come after that,
hence, kernel will hang.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT gate controls
SAI PLL bus clock - it must be enabled if SAI PLL
programming is required.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
We need passthrough sdhc0_lpcg and enlarge irqsteer_lvds0
to simplify dom0 dts and make domu could access the address space
Acked-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When moving to new ivshmem in jailhouse, INTx requires physical
continus interrupt, so we choose 4 interrupts not used by any hardware.
Acked-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Let's use SPI 154-157 for PCI INTx interrupt which is not used
by any hardware.
Acked-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
select UIO_IVSHMEM for dual linux communication, and mark ivshmem as y
for easy usage
Acked-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This property will block the SS phy enter P3 when link at U3,
so remove it.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
This patch adds power-domain-names property for ldb nodes, so that
the ldb driver can attach multiple power domains and enable runtime
PM support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
This patch adds power domain property for ldb phy node, so that
the phy driver can enable runtime PM support.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Enable the RPMSG on iMX8MN LPDDR4 EVK platform, and verify the rpmsg
audio feature.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Add support for AK5558 on AB1. which is required by LPDDR4 EVK board.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Need to change compatible to basler,basler-camera-vvcam to prevent breaking
exiting basler camera compatibility.
Signed-off-by: Oliver F. Brown <oliver.brown@nxp.com>
This patch builds in i.MX8qm/qxp/mp LDB encoder drivers by default.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
This patch builds in Mixel LVDS (combo) PHY drivers by default.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
commit 1578e5d031 upstream.
On arm64 linux gcc uses -fasynchronous-unwind-tables -funwind-tables
by default since gcc-8, so now the de facto platform ABI is to allow
unwinding from async signal handlers.
However on bare metal targets (aarch64-none-elf), and on old gcc,
async and sync unwind tables are not enabled by default to avoid
runtime memory costs.
This means if linux is built with a baremetal toolchain the vdso.so
may not have unwind tables which breaks the gcc platform ABI guarantee
in userspace.
Add -fasynchronous-unwind-tables explicitly to the vgettimeofday.o
cflags to address the ABI change.
Fixes: 28b1a824a4 ("arm64: vdso: Substitute gettimeofday() with C implementation")
Cc: Will Deacon <will@kernel.org>
Reported-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit c9a4ef6645 ]
In assembly, many instances of __emit_inst(x) expand to a directive. In
a few places __emit_inst(x) is used as an assembler macro argument. For
example, in arch/arm64/kvm/hyp/entry.S
ALTERNATIVE(nop, SET_PSTATE_PAN(1), ARM64_HAS_PAN, CONFIG_ARM64_PAN)
expands to the following by the C preprocessor:
alternative_insn nop, .inst (0xd500401f | ((0) << 16 | (4) << 5) | ((!!1) << 8)), 4, 1
Both comma and space are separators, with an exception that content
inside a pair of parentheses/quotes is not split, so the clang
integrated assembler splits the arguments to:
nop, .inst, (0xd500401f | ((0) << 16 | (4) << 5) | ((!!1) << 8)), 4, 1
GNU as preprocesses the input with do_scrub_chars(). Its arm64 backend
(along with many other non-x86 backends) sees:
alternative_insn nop,.inst(0xd500401f|((0)<<16|(4)<<5)|((!!1)<<8)),4,1
# .inst(...) is parsed as one argument
while its x86 backend sees:
alternative_insn nop,.inst (0xd500401f|((0)<<16|(4)<<5)|((!!1)<<8)),4,1
# The extra space before '(' makes the whole .inst (...) parsed as two arguments
The non-x86 backend's behavior is considered unintentional
(https://sourceware.org/bugzilla/show_bug.cgi?id=25750).
So drop the space separator inside `.inst (...)` to make the clang
integrated assembler work.
Suggested-by: Ilie Halip <ilie.halip@gmail.com>
Signed-off-by: Fangrui Song <maskray@google.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Link: https://github.com/ClangBuiltLinux/linux/issues/939
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
The lvds-channel@0 fsl,data-mapping property is wrongly moved
out from lvds-channel@0 node to the parent ldb node by a previous
commit. This patch fixes the property.
Fixes: 46552dfa17 ("MLK-23694-12 arm64: dts: imx8mp-evk: integrate LVDS bridge display in")
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Fancy Fang <chen.fang@nxp.com>
For kernel 5.4, we use community driver for ov5640, so correct some
properties to satify the need of ov5640 driver.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
set media axi clock to 500MHz and apb clock to 200MHz for 4K
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Guoniu.zhou <guoniu.zhou@nxp.com>
add compatible string "fsl,imx8-vipsi" to identify the vip core
for PM Qos
Signed-off-by: minjie.zhuang@nxp.com
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
commit 556d687a4c upstream.
In order to use compat_* type defininitions in device drivers
outside of CONFIG_COMPAT, move the inclusion of asm-generic/compat.h
ahead of the #ifdef.
All other architectures already do this.
Acked-by: Will Deacon <will@kernel.org>
Reviewed-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Naresh Kamboju <naresh.kamboju@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit: 27a22fbdee ]
Clang reports a warning on the __tlbi(aside1is, 0) macro expansion since
the value size does not match the register size specified in the inline
asm. Construct the ASID value using the __TLBI_VADDR() macro.
Fixes: 222fc0c850 ("arm64: compat: Workaround Neoverse-N1 #1542419 for compat user-space")
Reported-by: Nathan Chancellor <natechancellor@gmail.com>
Cc: James Morse <james.morse@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit 222fc0c850 ]
Compat user-space is unable to perform ICIMVAU instructions from
user-space. Instead it uses a compat-syscall. Add the workaround for
Neoverse-N1 #1542419 to this code path.
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit ee9d90be9d ]
Systems affected by Neoverse-N1 #1542419 support DIC so do not need to
perform icache maintenance once new instructions are cleaned to the PoU.
For the errata workaround, the kernel hides DIC from user-space, so that
the unnecessary cache maintenance can be trapped by firmware.
To reduce the number of traps, produce a fake IminLine value based on
PAGE_SIZE.
Signed-off-by: James Morse <james.morse@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit 05460849c3 ]
Cores affected by Neoverse-N1 #1542419 could execute a stale instruction
when a branch is updated to point to freshly generated instructions.
To workaround this issue we need user-space to issue unnecessary
icache maintenance that we can trap. Start by hiding CTR_EL0.DIC.
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Add DMA configurations for LPSPI nodes on i.MX8QX/QM/DXL.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Enable lpspi3 by default for imx8dxl-evk and imx8dxl-ddr3-evk.
Add imx8dxl-evk-lpspi-slave.dtb to support lpspi3 slave mode on
imx8dxl-evk.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Integrate local HDMI display into EVK DTB to support the
DSI + LVDS + HDMI triple display, and previous single
display support for DSI, LVDS or HDMI is also remained.
Put LCDIF3 port to the same display-subsystem node as
LCDIF1 and LCDIF2 to realize this kind of triple display.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Liu Ying <victor.liu@nxp.com>
Integrate LVDS bridge with single channel display into EVK DTB
to support DSI + LVDS dual display, and the previous single
display support for DSI or LVDS is also remained. Put LCDIF1
and LCDIF2 ports into one display-subystem node to implement
this kind of dual display.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Liu Ying <victor.liu@nxp.com>
As other devices in mediamix domain have already enabled
power domains, LDB is also required to enable the power
domains.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Liu Ying <victor.liu@nxp.com>
The mediamix block control module access requires the
'IMX8MP_CLK_MEDIA_APB_ROOT' clock to be enabled, so
add this clock to this device node.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Liu Ying <victor.liu@nxp.com>
To align with the port names of 'lcdif2_disp' and 'lcdif3_disp',
rename 'lcdif_disp0' to 'lcdif1_disp'.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Liu Ying <victor.liu@nxp.com>
Since the 'mipi_phy1_ref' clock rate is usually set to
be 27MHz and won't be changed after boot up. So assign
27MHz rate instead of 594MHz to this clock is much more
reasonable.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Liu Ying <victor.liu@nxp.com>
The 'disp1_pix' clock is used to provide pixel clock for
LCDIF1 and its rate is closely related with the display
mode resolution which is configured. So this clock rate
is dynamically determined and unnecessary to be assigned
with a default value at boot up.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Liu Ying <victor.liu@nxp.com>
The 'video_pll1' clock is shared by MIPI and LVDS displays
and each of the display has a specific requirement for the
PLL rate which can be satified by set 'video_pll1' rate to
be 2079MHz. So assign 2079MHz rate to 'video_pll1' under
CCM device.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Liu Ying <victor.liu@nxp.com>
Inculding below cleanup for BD71847 pmic driver:
--Remove ldo4 which's not used by board, otherwise,ldo4 will be on
since it's always_on.
--Remove buck5 which's not used by board too,although that may be off
by kernel requlator common framework after kernel bootup.
--Add dvs-run-voltage/dvs-idle-voltage setting for buck2 as i.mx8mm.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
[ Upstream commit 46f94c7818 ]
If the mv88e6xxx DSA driver is built as a module, it causes the
ethernet driver to re-probe when it's loaded. This in turn causes
the gigabit PHY to be momentarily reset and reprogrammed. However,
we attempt to reprogram the PHY immediately after deasserting reset,
and the PHY ignores the writes.
This results in the PHY operating in the wrong mode, and the copper
link states down.
Set a reset deassert delay of 10ms for the gigabit PHY to avoid this.
Fixes: babc5544c2 ("arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal")
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit f9f711efd4 ]
If the kernel configuration option CONFIG_PCIE_DW_PLAT_HOST is enabled
then this can cause the kernel to incorrectly probe the generic
designware PCIe platform driver instead of the Tegra194 designware PCIe
driver. This causes a boot failure on Tegra194 because the necessary
configuration to access the hardware is not performed.
The order in which the compatible strings are populated in Device-Tree
is not relevant in this case, because the kernel will attempt to probe
the device as soon as a driver is loaded and if the generic designware
PCIe driver is loaded first, then this driver will be probed first.
Therefore, to fix this problem, remove the "snps,dw-pcie" string from
the compatible string as we never want this driver to be probe on
Tegra194.
Fixes: 2602c32f15 ("arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit 3e9a1a8b7f ]
Register range of display clocks is 0x10000, as it can be seen from
DE2 documentation.
Fix it.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Fixes: 2c796fc8f5 ("arm64: dts: allwinner: a64: add necessary device tree nodes for DE2 CCU")
[wens@csie.org: added fixes tag]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Update the model string of i.MX8MP EVK board to align with upstream kernel.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
Add easrc clk control in dsp driver, easrc is added to offload audio
playback pipeline in imx8mp board.
Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
Correct ldo1/ldo2 voltage as below:
ldo1 --NVCC_SNVS_1V8
ldo2 --VDD_SNVS_0V8
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
(cherry picked from commit d11796134f55d88b49d79bf25d6c42b677ff47bc)
commit 9cc3d0c691 upstream.
The aarch32_vdso_pages[] array never has entries allocated in the C_VVAR
or C_VDSO slots, and as the array is zero initialized these contain
NULL.
However in __aarch32_alloc_vdso_pages() when
aarch32_alloc_kuser_vdso_page() fails we attempt to free the page whose
struct page is at NULL, which is obviously nonsensical.
This patch removes the erroneous page freeing.
Fixes: 7c1deeeb01 ("arm64: compat: VDSO setup for compat layer")
Cc: <stable@vger.kernel.org> # 5.3.x-
Cc: Vincenzo Frascino <vincenzo.frascino@arm.com>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit dde061b865 upstream.
Without a VBUS supply the dwc3 driver won't go into otg mode.
Fixes: eb4ea0857c ("arm64: dts: fsl: librem5: Add a device tree for the Librem5 devkit")
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit b8fdef311a upstream.
Compilers with branch protection support can be configured to enable it by
default, it is likely that distributions will do this as part of deploying
branch protection system wide. As well as the slight overhead from having
some extra NOPs for unused branch protection features this can cause more
serious problems when the kernel is providing pointer authentication to
userspace but not built for pointer authentication itself. In that case our
switching of keys for userspace can affect the kernel unexpectedly, causing
pointer authentication instructions in the kernel to corrupt addresses.
To ensure that we get consistent and reliable behaviour always explicitly
initialise the branch protection mode, ensuring that the kernel is built
the same way regardless of the compiler defaults.
[This is a reworked version of b8fdef311a ("arm64: Always
force a branch protection mode when the compiler has one") for backport.
Kernels prior to 74afda4016 ("arm64: compile the kernel with ptrauth
return address signing") don't have any Makefile machinery for forcing
on pointer auth but still have issues if the compiler defaults it on so
need this reworked version. -- broonie]
Fixes: 7503197562 (arm64: add basic pointer authentication support)
Reported-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
[catalin.marinas@arm.com: remove Kconfig option in favour of Makefile check]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit fc2266011a upstream.
For thumb instructions, call_undef_hook() in traps.c first reads a u16,
and if the u16 indicates a T32 instruction (u16 >= 0xe800), a second
u16 is read, which then makes up the the lower half-word of a T32
instruction. For T16 instructions, the second u16 is not read,
which makes the resulting u32 opcode always have the upper half set to
0.
However, having the upper half of instr_mask in the undef_hook set to 0
masks out the upper half of all thumb instructions - both T16 and T32.
This results in trapped T32 instructions with the lower half-word equal
to the T16 encoding of setend (b650) being matched, even though the upper
half-word is not 0000 and thus indicates a T32 opcode.
An example of such a T32 instruction is eaa0b650, which should raise a
SIGILL since T32 instructions with an eaa prefix are unallocated as per
Arm ARM, but instead works as a SETEND because the second half-word is set
to b650.
This patch fixes the issue by extending instr_mask to include the
upper u32 half, which will still match T16 instructions where the upper
half is 0, but not T32 instructions.
Fixes: 2d888f48e0 ("arm64: Emulate SETEND for AArch32 tasks")
Cc: <stable@vger.kernel.org> # 4.0.x-
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Fredrik Strupe <fredrik@strupe.net>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit a81e5442d7 upstream.
The TI sci-clk driver can scan the DT for all clocks provided by system
firmware and does this by checking the clocks property of all nodes, so
we must add this to the dwc3 nodes so USB clocks are available.
Without this USB does not work with latest system firmware i.e.
[ 1.714662] clk: couldn't get parent clock 0 for /interconnect@100000/dwc3@4020000
Fixes: cc54a99464 ("arm64: dts: ti: k3-am6: add USB suppor")
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Cc: stable@kernel.org
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 4ae7a3c3d7 upstream.
The commit c35a516a46 ("arm64: dts: allwinner: H5: Add PMU node")
introduced support for the PMU found on the Allwinner H5. However, the
binding only allows for a single compatible, while the patch was adding
two.
Make sure we follow the binding.
Fixes: c35a516a46 ("arm64: dts: allwinner: H5: Add PMU node")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Cc: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 4c7eeb9af3 upstream.
The commit 7aa9b9eb7d ("arm64: dts: allwinner: H6: Add PMU mode")
introduced support for the PMU found on the Allwinner H6. However, the
binding only allows for a single compatible, while the patch was adding
two.
Make sure we follow the binding.
Fixes: 7aa9b9eb7d ("arm64: dts: allwinner: H6: Add PMU mode")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Cc: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This patch adds DPU LCDIF support with rpmsg on the i.MX8qxp MEK platform.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
As the dts file name doesn't contain 'rpmsg', we should remove the
rpmsg support to avoid user's confusion.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch introduces DPU LCDIF dts include file,
so that it may be included in some dts files as needed.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds IT6263 LVDS0/1 dual channel support with rpmsg on
the i.MX8qxp MEK platform.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds JDI WUXGA LVDS0/1 panel support with rpmsg on
the i.MX8qxp MEK platform.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
As the dts file names don't contain 'rpmsg', we should remove the
rpmsg support to avoid user's confusion.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
As the dts file names don't contain 'rpmsg', we should remove the
rpmsg support to avoid user's confusion.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch introduces IT6263 LVDS0/1 dual channel dts include files,
so that they may be included in some dts files as needed.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch introduces JDI WUXGA LVDS0/1 panel dts include files,
so that they may be included in some dts files as needed.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds JDI WUXGA LVDS1 panel support with rpmsg on
the i.MX8qm MEK platform.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
As the dts file name doesn't contain 'rpmsg', we should remove the
rpmsg support to avoid user's confusion.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch introduces JDI WUXGA LVDS1 panel dts include file,
so that it may be included in some dts files as needed.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Move mipi_csi clock changes from imx8mp.dtsi into 0v2775 dtb,
to avoid failures for ov5460.
Tested with VSI ISP demo 28/02/20 release.
Not tested with camera on CSI2.
Fixes: 636de0a39e ("Add ov2775 dtb for imx8mp")
Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Acked-by: G.n. Zhou <guoniu.zhou@nxp.com>
This patch builds in SEIKO 43WVF1G LCD panel driver by default.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch builds in DRM_IMX LCDIF mux display driver by default.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Change the reserved RPMSG base address from 0xb8000000 to 0x55000000,
refer to the reserved memory conflictions with DDR ECC.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Add the PCIe power domain into the PCIe DTS node refer to the power
consumption refine.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-and-tested-by: Jacky Bai <ping.bai@nxp.com>
This patch builds in SEIKO 43WVF1G LCD panel driver by default.
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch builds in DRM_IMX LCDIF mux display driver by default.
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds Seiko WVGA LCD panel support on the i.MX8qxp mek platform.
The panel is driven by DPU in DC0 subsystem.
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds backlight support for LCDIF display on
i.MX8qxp mek platform.
The backlight brightness is controlled by PWM.
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds adma_pwm support for i.MX8qxp mek platform.
The PWM can be used to control display panel's backlight.
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds PWM pinctrl setting support for LCDIF display.
The PWM can be used to control display panel's backlight.
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds all pinctrl settings for LCDIF to send
out parallel display signals to externel display device.
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds pwm device tree support for i.MX8qxp ADMA support.
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds pwm lpcg clocks support for i.MX8qxp ADMA subsystem.
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
LCDIF mux found in i.MX8qxp SoC muxes different inputs to
parallel display interface. The control register for the
mux lives in LCDIF mux regs region. This patch adds a
relevant LCDIF mux regs syscon node for that region.
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
i.MX8qxp DPU display stream1 may drive a parallel display through
pixel link to LCDIF mux. This patch adds lcdif endpoint to DPU node.
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
Tested-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Add extra pcie dts file to enable wireless (like NXP
88w8997 and CYPRESS 4356/4359) since most of A0 chips
pcie has issue, which is convenient for tester to verify
wireless on comming release with golden chips.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Correct ldo1/ldo2 voltage as below:
ldo1 --NVCC_SNVS_1V8
ldo2 --VDD_SNVS_0V8
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
(cherry picked from commit 6e1db954c1261c9a8a40f7c4e33f03173c4d05b6)
(cherry picked from commit c159238cd48be1814736ed1eed8905572777d195)
Add CM7 remote proc node, decrease rpmsg dma node to 2MB only for
pcie usage.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add cm4 node for remoteproc usage. Currently added ipc-only
for partitioned M4 usage, late this property will be dropped
and check partitioned M4 in driver.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Make sure all the needed clocks are enabled for mipi_csi,
do not rely on mipi_dsi or lcdif to enable them.
Needed: media_cam1_pix, media_axi_root, media_apb_root
Tested with VSI ISP demo.
Not tested with camera on CSI2.
Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Tested-by: Oliver Brown <oliver.brown@nxp.com>
Add property audio-interface for set sai or esai.
Add imx8mp-evk-dsp.dts for supporting cplay in mp board.
Signed-off-by: Zhang Peng <peng_zhang_8@nxp.com>
commit d79e9d7c1e upstream.
The correct setting for the RGMII ports on LS1046ARDB is to
enable delay on both Rx and Tx so the interface mode used must
be PHY_INTERFACE_MODE_RGMII_ID.
Since commit 1b3047b520 ("net: phy: realtek: add support for
configuring the RX delay on RTL8211F") the Realtek 8211F PHY driver
has control over the RGMII RX delay and it is disabling it for
RGMII_TXID. The LS1046ARDB uses two such PHYs in RGMII_ID mode but
in the device tree the mode was described as "rgmii".
Changing the phy-connection-type to "rgmii-id" to address the issue.
Fixes: 3fa395d2c4 ("arm64: dts: add LS1046A DPAA FMan nodes")
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 4022d808c4 upstream.
The correct setting for the RGMII ports on LS1043ARDB is to
enable delay on both Rx and Tx so the interface mode used must
be PHY_INTERFACE_MODE_RGMII_ID.
Since commit 1b3047b520 ("net: phy: realtek: add support for
configuring the RX delay on RTL8211F") the Realtek 8211F PHY driver
has control over the RGMII RX delay and it is disabling it for
RGMII_TXID. The LS1043ARDB uses two such PHYs in RGMII_ID mode but
in the device tree the mode was described as "rgmii_txid".
This issue was not apparent at the time as the PHY driver took the
same action for RGMII_TXID and RGMII_ID back then but it became
visible (RX no longer working) after the above patch.
Changing the phy-connection-type to "rgmii-id" to address the issue.
Fixes: bf02f2ffe5 ("arm64: dts: add LS1043A DPAA FMan support")
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 6f5459da2b upstream.
Building an arm64 defconfig with clang's integrated assembler, this error
occurs:
<instantiation>:2:2: error: unrecognized instruction mnemonic
_ASM_EXTABLE 9999b, 9f
^
arch/arm64/mm/cache.S:50:1: note: while in macro instantiation
user_alt 9f, "dc cvau, x4", "dc civac, x4", 0
^
While GNU as seems fine with case-sensitive macro instantiations, clang
doesn't, so use the actual macro name (_asm_extable) as in the rest of
the file.
Also checked that the generated assembly matches the GCC output.
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Fixes: 290622efc7 ("arm64: fix "dc cvau" cache operation on errata-affected core")
Link: https://github.com/ClangBuiltLinux/linux/issues/924
Signed-off-by: Ilie Halip <ilie.halip@gmail.com>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit b54d390086 ]
The LS1043A SoC is affected by the A050385 erratum stating that
FMAN DMA read or writes under heavy traffic load may cause FMAN
internal resource leak thus stopping further packet processing.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
increase the resolution limitation from 1920x1080 to 1920x1920
I have submitted the patch on branch 4.19.y
I don't know why branch 5.4 doesn't include this patch
so I submit it again
Signed-off-by: Ming Qian <ming.qian@nxp.com>
Currently hsio root clock is always on, which should be handled
by hsiomix power domain driver but there is problem on doing that,
see commit 5aaceda10a ("MLK-23671-02 arm64: dts: imx8mp: Add the
rpm-always-on flag for hsiomix domain"):
"The hsiomix power domain need to be runtime always-on to maintain USB's
wakeup ability. As this domain need to be boot on by default, no one
will call the power on callback during system boot up, the clock
enable/disable will mismatch, so remove the clocks from this domain.
the necessary clocks will be handled in TF-A."
There is one clock(AXI_DIV) shared between hsiomix and USB, with
rpm-always-on property added, like above commit description, power
domain driver will not do enable/disable and think it's always on, but
it can be disabled by USB driver, afterwards if power domain driver does
hsiomix register access, system will hang because the required clock was
disabled.
Now with above commit and change in TF-A, those clocks are not
controlled by Linux for power domain operations, but user driver(i.e. USB
and PCIE) has to handle it.
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
USB controller isolation is controlled by hsiomix power domain,
instead of usb_otg1_pd and usb_otg2_pd, those 2 power domains are
for USB PHY isolation and in our case, PHY is power is kept always
on(but can be suspended).
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
1. add i2c-rpmsg support for i2c3
2. reserve memory for LPA, for the accessable memory
of m7: 0x40000000-0xbfffffff.
3. support LPA, playback only
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Add two ov5640 support for iMX8DX platform. One work at DVP mode,
the other work at MIPI mode.
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
USBOTG2 PHY's output name should be PHY ipg clock, but not controller
ahb clock, it is aligned with USBOTG1 PHY's output clock.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
the HDMI APB clock & 266M REF clock should be on when doing HDMIMIX power domain
on/off, so add these clock to hdmimix pd node.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
There is hardware issue: TKT0535653
SDMA3 can't work without setting AUDIOMIX_CLKEN0[SDMA2] (bit-26) to 1
The workaround is:
As the reset state of AUDIOMIX_CLKEN0[SDMA2] is enabled,
we just need to keep it on as reset state, don't touch it
in kernel, then every thing is same as before.
So for sdma node, it only need to care about AHB and IPG clock,
the gate of AUDIOMIX_CLKEN0[SDMA2] is always enabled.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Add i2c controller and irqsteer device node for CI_PI subsystem of iMX8QXP
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
"fsl,imx8qm-usb" is not defined at driver, and "fsl,imx27-usb"
is older model. We need to use the closest model for it to get
the newer features, like runtime pm.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Will Deacon