OTG power is only enabled on OTG1 (POGO), and is enabled by setting a bit in
a register in the charger, not by toggling GPIO. The GPIO control config in
the OTG regulator blocks are thus removed.
Move digitizer pin muxing from standard pinux block to the lpsr pinmux block.
GPIO1.0..GPIO1.7 requires mux config in separate mux control register, which
then requires the pin muxing to be defined in a new lpsr pinmux block.
Move wifi pinmux to be configured at boot and not when the brcmfmac driver
is loaded (attempt to resolve device init issues).
Replace original sdhci power cycle config with new wifi-pwrseq config.
Also disable extra muxing of SD1_WP pad to output CLKO2 32K wifi sleep clock (disable 32K sleep clock) and force 100 MHz
MMC bus speed while debugging load/sleep/wakeup issues.
Enable uart2 clk to let inmate could access uart
And disable CAAM for inmate
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>
(cherry picked from commit 59e4096c1bf0ef39e94b2b3ea81629f8862b59ec)
Correct pci and reserved memory for jailhouse
For i.MX8MQ, the top address are reserved for optee.
For i.MX8QXP/QM, the pci reg needs to be updated because to support
OP-TEE the memory region are moved 32MB lower.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Flynn xu <flynn.xu@nxp.com>
(cherry picked from commit f74537d35206b2a953069987ccf2b0550d2e130e)
With optee enabled, optee will reside on the top 32M memory region of RAM,
which used to be jailhouse's execute address, now shrink inmates memory by
32M to give place to jailhouse.
Signed-off-by: Flynn xu <flynn.xu@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit f5a0803376d077750a8ec9c43dc96869dc251972)
With optee enabled, optee will reside on the top 32M memory region of RAM,
which used to be jailhouse's execute address, now reserve memory from
0xb3c00000 to 0xb8000000 for jailhouse and it's inmates.
Signed-off-by: Flynn xu <flynn.xu@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit fd50832fb48a81b01fdeb731d55e15ee1e534850)
Reserve 4KB memory at the GUEST_RAM0_BASE, this area will be used
as a magic number area, U-Boot will write this area and XEN will
check this area during U-Boot/Linux reseting/rebooting.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Flynn xu <flynn.xu@nxp.com>
(cherry picked from commit ed0659fb66dfb5b9fad51e9d920d5fb0a8a93f41)
We are using SPI 33 for virtual PL031, but dom0 not passthrough
the interrupt, so domu are not able to use this.
In this patch also correct domu android car rtc node interrupts
property.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Flynn xu <flynn.xu@nxp.com>
(cherry picked from commit 8dfead313460e0fa3c8d47248ee4e4fe2c80a638)
Android auto use sai0 for bluetooth phone audio output,
so enable sai0 for android auto.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit cadfe60f5cd87f80de1a30624861296a21f581fb)
Similar with QXP MEK we switch to ASRC to support
multiple rates.
Thus we introduce:
- asrc clocks
- make asrc PD depend on esai PD
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
(cherry picked from commit d804a5cac96d7d6071a2b4808a6ebe262f20952c)
DCSS needs special display timings for MIPI-DSI panel in order to do a
proper display on it.
In order to not break other display controller using this panel, add
custom display-timings for this specific use-case
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
- Since the l1ss is not enabled yet, configure
the clkreq# as gpio on 8qm/qxp mek boards.
Re-configure the clkreq# as input and open
drain when l1ss is enabled later.
- Correct the perst# configurations of 8qm.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
(cherry picked from commit cb7ec372ae90798a46b11e979243c3f058d8b26f)
Correct the interrupt line for adv7535.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Tested-by: Robert Chiras <robert.chiras@nxp.com>
Acked-by: Fancy Fang <chen.fang@nxp.com>
Because now DSP supports ASRC we need to power up pd_asrc0
each time pd_esai0 is powered up.
Current power domain tree looks like this:
* pd_audio
* pd_audio_clk0
* pd_audio_clk1
* pd_dma0_chan6
* pd_dma0_chan7
* pd_esai0
* pd_dma0_chan0
* pd_dma0_chan1
[....]
* pd_asrc0
We need to make pd_asrc0 dependent on pd_esai0, thus we move
pd_dm0_chan6 node as a child of pd_asrc0.
Thus, the new power domain hierarch will look like this:
* pd_audio
* pd_audio_clk0
* pd_audio_clk1
* pd_dma0_chan0
* pd_dma0_chan1
[....]
* pd_asrc0
* pd_dma0_chan6
* pd_dma0_chan7
* pd_esai0
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 04c4825baad9344e5f3dfa1c69de3957199d3ab0)
We introduce ASRC clocks (only "ipg", "mem", "asrc0..3" are
relevant for us), then remove ASRC related EDMA channels and
interrupts lines because they will be managed by DSP.
There is one more step required: fire up the power domain for ASRC
this is tricky and will be done in the next patch.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit e9e613dc18a732e82227028f1c822862448ddc22)
Once 32Khz low power clock enable for Murata 1CQ module, Bluetooth core
may enter low power idle status that cause HCI communication error when
HCI device is down for 2 seconds after initialization.
Currently, remove the LP 32Khz input for the module.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Correct the pad confirations of the pcie perst and epdev_on
on 8qm/qxp platforms.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit 28d5b68c1fa7568a2444915b71fab12e8a2d4350)
ISI channel 0,1 or 2,3 could concatenate to support 4K image.
ISI channel 1,2 couldn't support such function,
otherwise image will lost line data.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit 18d3cf890a41ac773aefddd2ebe285d4b0197f5d)
Keep wlreg_on regulator on during system suspended status due to
external wifi module power requirement. Also keep the old Murata
1CQ M.2 card support.
To set the PIN to "latch" status before the GPIO controller is power
off during suspend, and set the PIN to "PASS" status after GPIO
controller status restored during system resume back.
Reviewed-by: yang.tian <yang.tian@nxp.com>
Tested-by: yang.tian <yang.tian@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit: 015599e40fd5cc942f8f6a8d4b6c3475440a114e)
This patch fixes the interrupts used by ADV7535. Initial patch
configured the GPIO0 IO00 as IO pin for the DSI_INT, used by ADV7535,
but the correct one is IO01, since IO00 is used by PWM.
Fixes: c2f1eceb5629 ("arm64: dts: imx8qm/qxp mek: Configure interrupts
for adv7535")
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
M4 will run flexspi XIP image on iMX8MM. Thus, we have to disable flexspi
in M4 dedicated DTS, otherwise the M4 will crash because flexspi probe
in kernel will re-configure the controller.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
(cherry picked from commit 2a370901a663bb518303ed2d5e774f1faa41f5fd)
Fix the wrong configuration of "dmas" in dts. This leads the spi
transfer error in dma mode and cause this issue.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
For ECSPI test, add these two dts files.
imx6ul-14x14-evk-ecspi.dts: enable ecspi4 function. Because ethernet2
uses the same pins with ecspi4, so disable fec1/fec2.
imx6ul-14x14-evk-ecspi-slave.dts: Add "spi-slave" attribute to enable
slave mode.
Wire Connection:
J1704:
3 - SCS
4 - MOSI
5 - MISO
6 - SCK
7 - GND
Modify "Makefile" to build these two dts files.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
- Fix busfreq optee mode to not install the linux assembly function
used to synchronize all CPU in case of SMP mode
- Fix l2cache OPTEE/Linux share mutex operations
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
(cherry picked from commit 68f47bb3328e56c63d647f855fc654f4736658ce)
Default value must be prefixed by "0".
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit e1f214bd631bda58ab7850866447a53e4a479ac8)
Default value must be prefixed by "0".
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 1a8e10215cc07c83b0e26b55fef94aae18151633)
a) Default value must be prefixed by "0".
b) Map 2 pins case to rx=0xff tx=0x11.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit cb4d69f098ee003edc2dcfec7075b043a78345e6)
Default value must be prefixed by "0".
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit a38075f068fd07dda55cb5bb5d74450ba29d6483)
Default value must be prefixed by "0".
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit b81a9884f85f750673a4ee0da60096d330add7a5)
a) Default value must be prefixed by "0".
b) Map 2 pins case to rx=0xff tx=0x11.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit bb1d5eac8b6ba4371ec04f362071c06cd3f5066b)
Default value must be prefixed by "0".
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 5252bd4b838eaa849fafdfa42a9e322a012a1e98)
Default value must be prefixed by "0".
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 4ce702331a6c7b5a84fe4fdc210b62147e04fa84)
Configure the interrupt for ADV7535 so that it can generate interrupts
events for HDP when the HDMI cable is plugged in or out.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
disable intmux in m4 dts for it is component in m4 domain
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 252831d4b0699c9ee609613a7c00ab8f77bfbeb9)
disable intmux in m4 dts for it is component in m4 domain
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 2742df294bac6e1ccc1ed7e899c0b5c85a51ccbf)
On i.MX8MM DDR4 EVK board, the GPIO pin to control LED is
NAND_CE3_B, correct it to make LED work properly and avoid
below failure message during kernel boot up:
[ 3.274994] leds-gpio leds: Error applying setting, reverse things back
[ 3.275015] leds-gpio: probe of leds failed with error -22
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Rename fsl-imx8qxp-mek.dts to fsl-imx8qxp-mek.dtsi.
remove /dts-v1/ from dtsi.
Add memreserve for dom0 dts.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 491045dead2f3294cb5ca78a6e667af00495ae48)
HDMI power domain is under DC0, however DC0 is used by the first OS,
so domu has no permission to use HDMI.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Flynn xu <flynn.xu@nxp.com>
alloc_contig_range easily return -EBUSY when try to isolate pages,
there are lots of messages with PFNs busy when run GPU tests.
[ 622.370671] alloc_contig_range: [4ea70, 4ea7c) PFNs busy
[ 626.518072] alloc_contig_range: [4ea90, 4ea9c) PFNs busy
these problems are related wht CMA migration for fragments,
need enlarge GPU reserved size to reduce CMA fragments.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
The dts file was removed but makefile was not updated so build broke.
Fix by removing from makefile.
Fixes: a9c2aa010d ("MLK-20252 ARM64: dts: correct imx8mm root memory")
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Add rtc pl031 and a dummy clock node.
The pl031 is emulated by XEN, the address and interrupt is fixed in XEN.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Flynn xu <flynn.xu@nxp.com>
Correct the memory for root linux.
Because rpmsg reserved memory, we could not support 2nd Linux now with
the new memory. So remove the support for 2nd linux.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Flynn xu <flynn.xu@nxp.com>
Currently, the adma_lcdif clocks are wrong. Correct these clocks.
Fix suggestion received from:
Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
i2c2 and i2c3 are work at 100KHz, so no need to set the pad to fast
slew rate, slow slew rate is enough.
This patch can also fix the synaptics_dsx touch work unstable issue.
When config the i2c bus pad to fast slew rate, synaptics_dsx touch
sometimes can't be recognized through i2c bus. Seems this touch
i2c slave device sensitive to the pad slew rate setting.
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
For imx8mq-evk board, B4 board change touch/mipi-hdmi connected i2c bus
from i2c1 to i2c3. The default dual-display dts file is for the B4
board.
This patch adds a new dts file to also support dual-display on B3 (or
lower) boards.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Configure imx8qm/qxp pin as RTC 32KHz clock output as the
low power clock source for some WIFI chip.
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
i.MX7ULP SoC revision is available from B0, the SIM_JTAG_ID
register bit[31:28] indicates SoC revision as below:
4b'0001 B0
4b'0010 B1
This register is NOT available on A0, tested on B1 chip
as below:
root@imx7ulpevk:~# cat /sys/devices/soc0/revision
2.1
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
Tested-by: Ye Li <ye.li@nxp.com>
The IMX_DMATYPE_SAI(24) performance is not enough to support high
sample rate/channels of audio case, there is a lot of underrun and
the sound is noise, the reason is that with this script, sdma copy data
through a long path (SDMA->pl301_audio -> pl301_display -> … ->
pl301_wakeup -> AIPS1 -> SPBA2 -> SAI).
The IMX_DMATYPE_SSI_SP(2) performance is better, which go through a shorter
path (SDMA -> SPBA2 -> SAI).
So we switch to use the IMX_DMATYPE_SSI_SP script, then 384k/32b/16c is
supported well.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit d5b70e9232218c419f7f6f843249e4bba84156b6)
Because reset and pwn pin of gpio1 are not configurated for ov5640,
so it leads to read ov5640 register fail.
Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
With cpu-idle enabled, we observe that DSI panel display is NOT
working on i.MX8QXP MEK board, still under debugging, since cpu-idle
ONLY saves ~15mA in runtime, it is NOT valuable enough compare to
whole system, so disable it for now until everything is stable enough.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Nitin Garg <nitin.garg@nxp.com>
- When OPTEE OS is present and if it support the busfreq
for the running the i.MX, the busfreq is executed in
the OPTEE OS by calling a specific SMC function
- Only a WFE function is copied into the OCRAM to
synchronize all Cores in multi-core devices
- OPTEE OS add a DT property 'busfreq=1' in the 'firmware/optee'
node to indicate the busfreq support
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
According to Hardware test result, when config the usdhc pad io drive
strength to high, there are some overshoot on the clock/data signal
when sd/emmc work at SDR104/HS400/HS200 mode. When change the usdhc
data/cmd/clk pad io strength to low, can't see any overshoot, and
data transfer can also work well and pass the stress test.
So change all the usdhc pad io drive strength to low.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Revert "MLK-17344-2: ARM64: dts: add constraint-rate for hdmi of imx8qm"
This reverts commit 86dbbb61cf.
On imx8qm B0 fix the DPLL jitter issue for HDMI module, so the constraint
for sample rate should be removed
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The PMU's interrupt is PPI. Correct the pmu interrupt parent of i.MX8MQ/MM.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
After commit 2911e974c8 ("MLK-19098 ARM: dts: imx7ulp-evk: use OTG
ID function instead of GPIO") , the ID pinctrl is set by chipidea
driver, so we need to restore its setting after system resume
due to pinctrl setting is lost at VLLS state.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Add the missing attribute dmas and dma-names for ecspi1~3 to fix the
following error log.
LOG: spi_imx 30820000.ecspi: dma setup error -19, use pio
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
iMX8MM DDR3L validation board uses FPGA to link with SPI NOR flash with
ECSPI1. Add pin configurations and ecspi1 node to enable ECSPI1 to access
SPI NOR.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Create a new dts 'fsl-imx8mm-ddr4-evk-rm67191.dts' to support
panel 'RM67191' display which is attached to DSIM controller
directly on IMX8MM DDR4 board to avoid conflict with ADV7535
display.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Create a new dts 'fsl-imx8mm-evk-revb-rm67191.dts' to support
panel 'RM67191' display which is attached to DSIM controller
directly on IMX8MM LPDDR4 EVK RevC board to avoid conflict
with ADV7535 display.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
There is noise issue with 192kHz recoding with ESAI + CS42xx8 on imx8qxp
mek board.
This issue is caused by the round trip delay due to longer trace length
on board. After we switch to tx master, rx slave mode, the issue is gone.
so the setting can workaround the issue, the reason is that the bitclock,
frame clock and data is generated from one side, for recording, is from
codec, the asynchronous of clock and data is eliminated.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
There is noise issue with 192kHz recoding with ESAI + CS42xx8 on imx8qm
mek board.
This issue is caused by the round trip delay due to longer trace length
on board. After we switch to tx master, rx slave mode, the issue is gone.
so the setting can workaround the issue, the reason is that the bitclock,
frame clock and data is generated from one side, for recording, is from
codec, the asynchronous of clock and data is eliminated.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Since the 8mm ddr4 evk board is same to the -revb evk board.
Configure the pcie ref clk as the internal pll clock.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Introduce new dts files, there are some requirement that one dts
file could not support normal linux and android auto on xen,
such as the can_rpmsg change, so introduce a new dts file.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Use the external osc as the pcie refclk on 8mm evk
rev c board.
Create another -revb.dts for the back compatible usage.
Because that internal pll is used as pcie ref clock on
the rev b board in default.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Add the DTS file for iMX8MM DDR3L validation board to support basic
modules: I2C, UART, ENET RMII, SD, NAND and USB. Bus freq is disabled
since we currently don't support it for DDR3L.
This board has a FPGA which owns the ENET PHY RESET and WDOG_B, so The ENET
won't work due to PHY RESET is hold high at default. And system reboot won't
work neither.
Signed-off-by: Ye Li <ye.li@nxp.com>
some NAND chips use two CS such as MT29F64G08AFAAA, which require two
enable both CE setting in IOMUX, otherwise the data may write to wrong
pages.
Signed-off-by: Han Xu <han.xu@nxp.com>
In SPF-29420-B2, the SCU_GPIO0_03 is used as AUD_DEC_1V8 for wm8960
codec. With this chage, the headphone plugin/plugout detection
can be enabled.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Passthrough hifi dsp to DomU, smmu is enabled for dsp,
so the mu13_B side also needs to be mapped into smmu table.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Passthrough esai0 to domu, the audio in dom0 is broken for now.
Because of there are some shared clock/power for sai and esai,
we could not cleanly parition the audio. So only support audio
in domu now, in future, we could use paravirtualized audio.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This patch adds cpu-idle support for i.MX8QXP, since different
platforms have different cpu-idle latency value, so move the
cpu-idle node to platform dtsi.
Add GPT as platform broadcast timer, its clock and power are
managed in TF-A.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
Map M41 reserved DDR memory for rpmsg
Add init-smmu-bypass, because m41 is started by SCU at early stage,
configure sid for a running master needs some specific handle. For
CM41, we configure S2CR with BYPASS in init stage.
Add mipi csi gpio
Add can_rpmsg node, this node is only used by android auto kernel.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When M4 using XIP flexspi, need disable flexspi0 from device tree,
otherwise there will be conflict.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Ye Li <Ye.Li@nxp.com>
Move the mipi csi en/rst pinctrl configuration from gpio1 to
specific node for mipi csi.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
This fixes the wrongly ordering of assigned clocks for dcss.
Fixes: 4db22d33851f8401 ("clk: imx8mq: Switch to newly added composite-8m clock")
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reported-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Tested-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>
Parse the clock tree and stop when you find one of the
audio_plls. If this audio_pll cannot support the required
rate, change the parent to the other pll.
Set rate to rate * 1024 so we can support all parameter
configurations with a minimum clock rate.
This is required to support all rates multiple of 11025 and 8000.
Signed-off-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Fix PCIEA rsrc id, then uboot could program SID correctly for PCIEA.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Andy Duan <fugang.duan@nxp.com>
The SC_P_MCLK_OUT0_ADMA_ACM_MCLK_OUT0 pin was conflicting with the pins
needed by the eLCDIF, so it was commented out with a TODO.
In order to fix this conflict, re-write this pinctrl group in the lcdif
specific dts file so that the conflict is handled properly.
Fixes: 471c6dc358fe ("ARM64: dts: imx8dx: Add dts file for lcdif")
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
The pwm_adma_lcdif node was created with status "okay" in the mek.dts
file, causing a pin conflict with the audio subsystem, even though the
lcdif pwm is not needed in this dts file.
Move this node into it's specific dts file: mek-lcdif, since it is only
needed by the lcdif.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Remove explicit 'CONFIG_SND_SOC_FSL_DSP=y' because
it is already selected SND_SOC_IMX_DSP.
Reported-by: Jana Build <jana.build@nxp.com>
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Add nodes for the ADMA eLCDIF controller found in i.MX8QXP and specific
dts file for it's usage with the Seiko 43WVF1G LCD panel.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
This allows us to decode and render frames using ESAI Digital
Audio interface and cs4228 codec.
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Finally! We register DSP as a sound card.
Reviewed-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Steinar Bakkemo